JP2007013080A - 半導体素子の製造方法 - Google Patents
半導体素子の製造方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 82
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 57
- 238000000034 method Methods 0.000 title claims abstract description 48
- 239000000758 substrate Substances 0.000 claims abstract description 60
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 46
- 125000006850 spacer group Chemical group 0.000 claims abstract description 37
- 238000005530 etching Methods 0.000 claims abstract description 9
- 238000005468 ion implantation Methods 0.000 claims description 52
- 239000012535 impurity Substances 0.000 claims description 39
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 19
- 229920005591 polysilicon Polymers 0.000 claims description 19
- 150000002500 ions Chemical class 0.000 claims description 13
- 239000002344 surface layer Substances 0.000 claims description 10
- 230000000694 effects Effects 0.000 abstract description 11
- 230000003071 parasitic effect Effects 0.000 abstract description 11
- 238000012421 spiking Methods 0.000 abstract description 8
- 230000000994 depressogenic effect Effects 0.000 abstract description 3
- 239000002019 doping agent Substances 0.000 abstract 2
- 230000006866 deterioration Effects 0.000 abstract 1
- 150000004767 nitrides Chemical class 0.000 description 17
- 229910052710 silicon Inorganic materials 0.000 description 10
- 239000010703 silicon Substances 0.000 description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 9
- 238000007796 conventional method Methods 0.000 description 8
- 230000008569 process Effects 0.000 description 8
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 4
- 230000008901 benefit Effects 0.000 description 4
- 229910052796 boron Inorganic materials 0.000 description 4
- 230000005684 electric field Effects 0.000 description 4
- -1 halo ion Chemical class 0.000 description 3
- 230000007423 decrease Effects 0.000 description 2
- 239000006185 dispersion Substances 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 239000010410 layer Substances 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 241000293849 Cordylanthus Species 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 125000001475 halogen functional group Chemical group 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L29/4983—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET with a lateral structure, e.g. a Polysilicon gate with a lateral doping variation or with a lateral composition variation or characterised by the sidewalls being composed of conductive, resistive or dielectric material
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26586—Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
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- H01L29/107—Substrate region of field-effect devices
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- H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66613—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
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- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
- H01L29/7834—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with a non-planar structure, e.g. the gate or the source or the drain being non-planar
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Abstract
【解決手段】半導体基板31のゲート形成領域に溝34を形成するステップ、溝34の両側壁にスペーサ35aを形成するステップ、基板31のソース形成領域に第1導電型不純物ドープト領域36を形成するステップ、基板31のドレイン形成領域に第2導電型の不純物をドープした第1LDD領域37aを形成するステップ、ゲート絶縁膜39及びゲート導電膜40を形成するステップ、エッチングによりゲート41を形成するステップ、ゲート41の両側の基板の表層部に第2LDD領域37bを形成するステップ、ゲート41の両側壁にゲートスペーサ43を形成するステップ及びゲート41両側の基板表層部に非対称構造のソース領域44a、ドレイン領域44bを形成するステップを含む。
【選択図】 図3G
Description
図4Bは、ゲート導電膜を形成した段階における素子の構造を示す断面図である。図4Bに示したように、第2溝38及びパッド窒化膜33含む全面にゲート絶縁膜39を形成した後、第1溝34及び第2溝38を埋め込むようにゲート導電膜40を形成する。
32 パッド酸化膜
33 パッド窒化膜
34 溝(第1溝)
35 非ドープトポリシリコン膜
35a ポリシリコンスペーサ
36 p型不純物ドープト領域
37a 第1LDD領域
37b 第2LDD領域
38 第2溝
39 ゲート絶縁膜
40 ゲート導電膜
41 ゲート
42 キャッピング絶縁膜
43 ゲートスペーサ
44a ソース領域
44b ドレイン領域
Claims (13)
- 半導体基板のゲート形成領域に溝を形成するステップと、
該溝の両側壁にスペーサを形成するステップと、
前記スペーサに隣接する前記半導体基板のソース形成領域に、1次傾斜イオン注入により第1導電型の不純物元素を注入し、不純物ドープト領域を形成するステップと、
前記スペーサに隣接する前記半導体基板のドレイン形成領域に、2次傾斜イオン注入により第2導電型の不純物元素を注入し、第1LDD領域を形成するステップと、
前記溝及び前記スペーサを含む前記半導体基板上に、ゲート絶縁膜及びゲート導電膜を順に形成するステップと、
エッチングにより、前記ゲート導電膜及び前記ゲート絶縁膜を除去し、ゲートを形成するステップと、
不純物元素をイオン注入することにより、前記ゲートの両側における前記半導体基板の表層部に、第2LDD領域を形成するステップと、
前記ゲートの両側壁にゲートスペーサを形成するステップと、
前記ゲートスペーサを含むゲートの両側における前記半導体基板の表層部に、非対称構造のソース領域及びドレイン領域を形成するステップと、
を含むことを特徴とする半導体素子の製造方法。 - 前記溝を、500〜1000Åの深さに形成することを特徴とする請求項1に記載の半導体素子の製造方法。
- 前記溝を形成するステップと前記スペーサを形成するステップとの間に、しきい値電圧調節用のイオン注入を実施するステップを、さらに含むことを特徴とする請求項1に記載の半導体素子の製造方法。
- 前記しきい値電圧調節用のイオン注入を、傾斜角10〜20゜の傾斜イオン注入法により実施することを特徴とする請求項3に記載の半導体素子の製造方法。
- 前記しきい値電圧調節用のイオン注入を、前記半導体基板を180゜回転させることにより、2回実施することを特徴とする請求項4に記載の半導体素子の製造方法。
- 前記スペーサを、ポリシリコンで形成することを特徴とする請求項1に記載の半導体素子の製造方法。
- 前記スペーサを、500〜1500Åの厚さに形成することを特徴とする請求項1に記載の半導体素子の製造方法。
- 前記不純物ドープト領域を、前記第1導電型であるp型不純物の濃度が1×1018〜5×1018イオン/cm3になるように、前記1次傾斜イオン注入法により形成することを特徴とする請求項1に記載の半導体素子の製造方法。
- 前記第1LDD領域を、前記第2導電型であるn型不純物の濃度が1×1018〜1×1020イオン/cm3になるように前記2次傾斜イオン注入法により形成することを特徴とする請求項1に記載の半導体素子の製造方法。
- 前記溝の側壁にスペーサを形成するステップと前記不純物ドープト領域を形成するステップとの間、又は前記不純物ドープト領域を形成するステップと前記ゲート絶縁膜及び前記ゲート導電膜を順に形成するステップとの間に、前記溝の底面における前記半導体基板の露出部をリセスするステップを、さらに含むことを特徴とする請求項1に記載の半導体素子の製造方法。
- 前記溝の底面における前記半導体基板の露出部を、深さ300〜500Åリセスすることを特徴とする請求項10に記載の半導体素子の製造方法。
- 前記溝の底面における前記半導体基板の露出部をリセスするステップと前記ゲート絶縁膜及び前記ゲート導電膜を順に形成するステップとの間に、しきい値電圧調節用のイオン注入を実施するステップを、さらに含むことを特徴とする請求項10に記載の半導体素子の製造方法。
- 前記第2LDD領域を形成のためのイオン注入を、傾斜イオン注入法により実施することを特徴とする請求項1に記載の半導体素子の製造方法。
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KR1020050058602A KR100668856B1 (ko) | 2005-06-30 | 2005-06-30 | 반도체 소자의 제조방법 |
KR10-2005-0058602 | 2005-06-30 |
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KR100951568B1 (ko) * | 2008-02-28 | 2010-04-09 | 주식회사 하이닉스반도체 | 반도체 소자의 트랜지스터 및 그 형성 방법 |
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KR100732767B1 (ko) * | 2005-12-29 | 2007-06-27 | 주식회사 하이닉스반도체 | 반도체 소자의 리세스 채널용 트렌치 형성방법 |
US7859026B2 (en) * | 2006-03-16 | 2010-12-28 | Spansion Llc | Vertical semiconductor device |
KR100948307B1 (ko) * | 2008-05-21 | 2010-03-17 | 주식회사 동부하이텍 | 반도체 소자의 제조 방법 |
CN101621029B (zh) * | 2008-07-03 | 2011-01-12 | 中芯国际集成电路制造(上海)有限公司 | 有选择的反窄宽度效应的dram单元结构及其生成方法 |
KR20100073439A (ko) * | 2008-12-23 | 2010-07-01 | 주식회사 동부하이텍 | 반도체 소자 및 이의 제조 방법 |
US8680577B2 (en) * | 2011-06-13 | 2014-03-25 | Stmicroelectronics, Inc. | Recessed gate field effect transistor |
CN104124142B (zh) * | 2013-04-23 | 2018-08-21 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件及其制造方法 |
CN104167357B (zh) * | 2013-05-17 | 2018-03-30 | 中国科学院微电子研究所 | 半导体器件及其制造方法 |
JP6797771B2 (ja) * | 2017-09-15 | 2020-12-09 | 株式会社東芝 | 半導体装置 |
CN114267640A (zh) * | 2020-09-16 | 2022-04-01 | 长鑫存储技术有限公司 | 半导体器件及其制备方法 |
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- 2005-06-30 KR KR1020050058602A patent/KR100668856B1/ko not_active IP Right Cessation
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- 2005-12-27 JP JP2005374061A patent/JP4859455B2/ja not_active Expired - Fee Related
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KR100951568B1 (ko) * | 2008-02-28 | 2010-04-09 | 주식회사 하이닉스반도체 | 반도체 소자의 트랜지스터 및 그 형성 방법 |
Also Published As
Publication number | Publication date |
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KR20070002902A (ko) | 2007-01-05 |
KR100668856B1 (ko) | 2007-01-16 |
US7300848B2 (en) | 2007-11-27 |
JP4859455B2 (ja) | 2012-01-25 |
US20070004126A1 (en) | 2007-01-04 |
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