JP2001308262A - 樹脂封止bga型半導体装置 - Google Patents
樹脂封止bga型半導体装置Info
- Publication number
- JP2001308262A JP2001308262A JP2000125579A JP2000125579A JP2001308262A JP 2001308262 A JP2001308262 A JP 2001308262A JP 2000125579 A JP2000125579 A JP 2000125579A JP 2000125579 A JP2000125579 A JP 2000125579A JP 2001308262 A JP2001308262 A JP 2001308262A
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- JP
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- Prior art keywords
- chip
- resin
- semiconductor device
- type semiconductor
- sealed
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/0651—Wire or wire-like electrical connections from device to substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06575—Auxiliary carrier between devices, the carrier having no electrical connection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06582—Housing for the assembly, e.g. chip scale package [CSP]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Wire Bonding (AREA)
Abstract
の侵入を回避することを目的とする。 【解決手段】 第1のチップ3を基板2に組立てた後、
第1のチップ3のワイヤ3a端を覆い、かつ第1のチッ
プ3と第2のチップ6のダイボンド間に空間を生じない
ように第2のチップ6をダイボンディングする。
Description
高密度に収納するため、第1のチップ上に第2のチップ
を載置し、スタック(積層)間の空間をなくすようにし
た樹脂封止BGA(Ball Grided Arra
y)型半導体装置に関するものである。
置を示す断面図であり、図において、11はボール、1
2はボール11上に載置された基板、13は基板12上
に載置された第1のチップ、14は第1のチップ13上
に載置された第2のチップ、13a,14aはそれぞれ
第1のチップ13,第2のチップ14にそれぞれ接続さ
れたワイヤ、15は全体を覆う封止樹脂である。このよ
うにして、チップサイズの異なる2つのチップを重ねて
実装し、1つのパッケージに組み込むようにして構成す
るものである。
型半導体装置は以上のように構成されているので、スタ
ック型の場合、第1のチップのワイヤと第2のチップの
電気的接触が生じるという問題点があった。又、第1の
チップと第2のチップ間に生じた空間への封止樹脂中に
配合されたフィラの侵入による第1のチップへのダメー
ジが生じるという問題点もあった。
ためになされたものであり、ワイヤとチップとの電気的
接触、及びフィラの侵入による第1のチップへのダメー
ジを回避し、同一パッケージにほぼ同一のサイズのチッ
プを複数個重ねて実装することにより、パッケージの外
形は同じで機能を2倍以上にすることを目的とする。
る樹脂封止BGA型半導体装置は、ボール上に基板を載
置するとともに、基板上に複数のチップを重ねて収納
し、全体を封止樹脂で覆うものであって、下部のチップ
に接続されたワイヤを覆い、かつ下部のチップと上部の
チップの間に空間を生じないように固着用接着層を塗布
したものである。
型半導体装置は、固着用接着層と上部のチップとの間に
絶縁テープを設けたものである。
一実施形態を図に基づいて説明する。図1はこの発明の
実施の形態1による樹脂封止BGA型半導体装置を示す
断面図であり、図において、1はボール、2はボール1
上に載置された基板、3は基板2上に固定材4を介して
載置された第1のチップ、5はチップのオーバコート
層、6はダイボンド樹脂からなる固定用接着層7を介し
て設けられた第2のチップ、3a,6aはそれぞれ第1
のチップ3,第2のチップ6に接続されたワイヤ、8は
全体を覆う封止樹脂である。
プ3のワイヤ3aを覆い、かつ第1のチップ3と第2チ
ップ6の間に空間をなくするに十分な量のダイボンド樹
脂を塗布する。そして第2のチップ6を第1のチップ3
の上に固定し、第1のチップ3のワイヤ3aと第2のチ
ップ6の電気的接触を回避できるようにするとともに、
第1のチップ3と第2のチップ6との空間に封止樹脂が
侵入することを防止できるようにする。
複数個収納した多機能の半導体装置の提供が可能であ
る。また、第1のチップ3と第2のチップ6の間に封止
樹脂が侵入することを防止したことで、フィラの影響に
よる第1のチップ3の故障を回避できることから、極め
て高い信頼性を有する、スタック型の樹脂封止BGA
(Ball Grided Array)型半導体装置
の提供が可能となった。
接着端面部分を示す拡大側面図、図3は接着層7の後退
量と相対的不良発生率との関係を示す図であり、図にお
いて、Lは接着層7の後退量、Aはコントロール領域、
Bは実用的なレベルの不良発生率である。第2のチップ
6を第1のチップ3に固定するダイボンド樹脂は、実質
的に図3に詳細に示すように、多少の後退は信頼性上何
ら問題は認められないが、望ましくは後退量Lは、0.
5mm以下に抑えるべきである。
態2による樹脂封止BGA型半導体装置を示す断面図で
あり、図において、第1のチップ3のワイヤ3aを覆う
ように、固着用接着層7に、絶縁テープ9をはさんで、
第2のチップ6をダイボンドするものであり、これによ
り、上下に重ねた第1のチップ3と第2のチップ6が電
気的に接触することを防止できる。ただし、この場合
は、先に例示した封止樹脂の侵入を防止することが難し
いので、固着用接着層7の厚さは、かなり厚くする必要
がある。
封止樹脂中のフィラのサイズと深い関係があり、実験で
は図2におけるギャップGは、フィラサイズの2倍程度
が実用的な値であることが確かめられている。フィラサ
イズは小さい程、信頼性上有利であるが、封止樹脂の製
造コストが高くなり、実用的でなくなる。
A型半導体装置によれば、ボール上に基板を載置すると
ともに、基板上に複数のチップを重ねて収納し、全体を
封止樹脂で覆うものであって、下部のチップに接続され
たワイヤを覆い、かつ下部のチップと上部のチップの間
に空間を生じないように固着用接着層を塗布したので、
チップとワイヤとの電気的接触を回避できるとともに、
チップ間の空間に封止樹脂が侵入するのを防止すること
ができる。
型半導体装置によれば、固着用接着層と上部のチップと
の間に絶縁テープを設けたので、チップ同士が電気的に
接触することを防止することができる。
A型半導体装置を示す断面図である。
A型半導体装置を示す拡大側面図である。
る。
A型半導体装置を示す断面図である。
面図である。
脂、9 絶縁テープ。
Claims (2)
- 【請求項1】 ボール上に基板を載置するとともに、上
記基板上に複数のチップを重ねて収納し、全体を封止樹
脂で覆う樹脂封止BGA型半導体装置において、下部の
チップに接続されたワイヤを覆い、かつ下部のチップと
上部のチップの間に空間を生じないように固着用接着層
を塗布したことを特徴とする樹脂封止BGA型半導体装
置。 - 【請求項2】 固着用接着層と上部のチップとの間に絶
縁テープを設けたことを特徴とする請求項1記載の樹脂
封止BGA型半導体装置。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000125579A JP2001308262A (ja) | 2000-04-26 | 2000-04-26 | 樹脂封止bga型半導体装置 |
US09/781,237 US6545365B2 (en) | 2000-04-26 | 2001-02-13 | Resin-sealed chip stack type semiconductor device |
KR1020010021691A KR20010099722A (ko) | 2000-04-26 | 2001-04-23 | 수지 봉지 칩 적층형 반도체 장치 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000125579A JP2001308262A (ja) | 2000-04-26 | 2000-04-26 | 樹脂封止bga型半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2001308262A true JP2001308262A (ja) | 2001-11-02 |
JP2001308262A5 JP2001308262A5 (ja) | 2007-06-07 |
Family
ID=18635508
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2000125579A Pending JP2001308262A (ja) | 2000-04-26 | 2000-04-26 | 樹脂封止bga型半導体装置 |
Country Status (3)
Country | Link |
---|---|
US (1) | US6545365B2 (ja) |
JP (1) | JP2001308262A (ja) |
KR (1) | KR20010099722A (ja) |
Cited By (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20030007098A (ko) * | 2001-07-11 | 2003-01-23 | 닛뽕덴끼 가부시끼가이샤 | 치수를 감소시킬 수 있는 적층형 칩-사이즈 패키지 반도체장치 |
JP2004221555A (ja) * | 2002-12-27 | 2004-08-05 | Sumitomo Bakelite Co Ltd | フィルム付き半導体素子、半導体装置およびそれらの製造方法 |
JP2004282056A (ja) * | 2003-02-27 | 2004-10-07 | Sumitomo Bakelite Co Ltd | 半導体装置、半導体素子の製造方法、および半導体装置の製造方法 |
US6930396B2 (en) | 2002-04-05 | 2005-08-16 | Nec Electronics Corporation | Semiconductor device and method for manufacturing the same |
US7030489B2 (en) | 2003-07-31 | 2006-04-18 | Samsung Electronics Co., Ltd. | Multi-chip module having bonding wires and method of fabricating the same |
JP2006183020A (ja) * | 2004-04-20 | 2006-07-13 | Hitachi Chem Co Ltd | 接着シート、半導体装置、及び半導体装置の製造方法 |
WO2006109506A1 (ja) * | 2005-03-30 | 2006-10-19 | Nippon Steel Chemical Co., Ltd. | 半導体装置の製造方法及び半導体装置 |
US7485490B2 (en) | 2001-03-09 | 2009-02-03 | Amkor Technology, Inc. | Method of forming a stacked semiconductor package |
JP2009065034A (ja) * | 2007-09-07 | 2009-03-26 | Renesas Technology Corp | 半導体装置の製造方法 |
JP2009099922A (ja) * | 2007-10-16 | 2009-05-07 | Hynix Semiconductor Inc | 積層半導体パッケージ及びこれの製造方法 |
US7615413B2 (en) | 2005-03-28 | 2009-11-10 | Kabushiki Kaisha Toshiba | Method of manufacturing stack-type semiconductor device and method of manufacturing stack-type electronic component |
US7675180B1 (en) | 2006-02-17 | 2010-03-09 | Amkor Technology, Inc. | Stacked electronic component package having film-on-wire spacer |
US7736999B2 (en) | 2006-03-16 | 2010-06-15 | Kabushiki Kaisha Toshiba | Manufacturing method of semiconductor device |
JP2010192937A (ja) * | 2010-06-07 | 2010-09-02 | Oki Semiconductor Co Ltd | 半導体装置及び半導体装置の製造方法 |
US7888805B2 (en) | 2004-02-25 | 2011-02-15 | Renesas Electronics Corporation | Semiconductor device package of stacked semiconductor chips with spacers provided therein |
US7994620B2 (en) | 2006-03-16 | 2011-08-09 | Kabushiki Kaisha Toshiba | Stacked semiconductor device |
US8017444B2 (en) | 2004-04-20 | 2011-09-13 | Hitachi Chemical Company, Ltd. | Adhesive sheet, semiconductor device, and process for producing semiconductor device |
US8129849B1 (en) | 2006-05-24 | 2012-03-06 | Amkor Technology, Inc. | Method of making semiconductor package with adhering portion |
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2001
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Also Published As
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US6545365B2 (en) | 2003-04-08 |
KR20010099722A (ko) | 2001-11-09 |
US20010035587A1 (en) | 2001-11-01 |
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