JP2000340908A - Prepreg, manufacture and manufacture of wiring board - Google Patents

Prepreg, manufacture and manufacture of wiring board

Info

Publication number
JP2000340908A
JP2000340908A JP15157499A JP15157499A JP2000340908A JP 2000340908 A JP2000340908 A JP 2000340908A JP 15157499 A JP15157499 A JP 15157499A JP 15157499 A JP15157499 A JP 15157499A JP 2000340908 A JP2000340908 A JP 2000340908A
Authority
JP
Japan
Prior art keywords
prepreg
surface roughness
less
thermosetting resin
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15157499A
Other languages
Japanese (ja)
Inventor
Koyo Hiramatsu
幸洋 平松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP15157499A priority Critical patent/JP2000340908A/en
Publication of JP2000340908A publication Critical patent/JP2000340908A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a prepreg, where a fine wiring can be formed on a surface and a via hole can easily be formed and to provide a manufacturing method of the prepreg and to manufacture a wiring board where the fine wiring is formed by using the prepreg. SOLUTION: A plate 5, whose average surface roughness Ra is not more than 10 μm and whose maximum surface roughness Rmax 70 μm is stacked at least on one face of a sheet body A where thermosetting resin, especially, polyphenylene ether resin is impregnated in a glass wove fabric via a releasing film 4 whose average surface roughness (Ra) is not more than 5 μm. The plate is heated to 40 to 220 deg.C, while the pressure of not less than 20 kgf/cm2 is applied. Then, a prepreg, whose average surface roughness Ra is not more than 5 μm and whose maximum surface roughness Rmax is not more than 50 μm, is generated. A via hole conductor is formed in the prepreg, and a wiring circuit layer formed of metal foil is formed on the surface. Thermosetting resin is hot cured, and a wiring board is manufactured.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、高密度、高機能回
路基板用に適したプリプレグ及びその製造方法並びにそ
れらを用いた配線基板の製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a prepreg suitable for high-density, high-performance circuit boards, a method for manufacturing the same, and a method for manufacturing a wiring board using the same.

【0002】[0002]

【従来技術】最近では、精密で高密度な回路を有する多
層プリント配線基板が求められるようになっているが、
このような微細高密度配線回路を有する配線基板は、従
来法のプリント基板では、コア基板に対し、コア基板を
貫通するビアホールを形成し、その内部にメッキ等を施
して層間の接続を行う場合が多く、ビアホールによって
回路設計が制限され高密度配線が難しかった。
2. Description of the Related Art Recently, a multilayer printed wiring board having a precise and high-density circuit has been demanded.
A wiring board having such a fine high-density wiring circuit is a conventional printed circuit board in which a via hole is formed through a core substrate with respect to a core substrate, and plating and the like are applied to the inside of the via hole to perform interlayer connection. In many cases, circuit design was limited by via holes, and high-density wiring was difficult.

【0003】また、所定の基板表面に絶縁層と配線回路
層を交互にコーティング及びメッキ等、あるいはビアホ
ール形成等を施して多層化する所謂ビルドアップ法も開
発されているが、ビルドアップ法もビアホールの配置上
の制約があり、高密度配線化が難しかった。しかも、ビ
ルドアップ法による多層化においては、配線回路層をエ
ッチング法で形成したり、さらにはビアホール内面にメ
ッキ等の手法によって導体を被着させる等の工程を繰り
返し行った場合、絶縁層がエッチング液やメッキ液等に
浸漬されるが、配線の高密度化に伴い、積層数が増加す
ると、絶縁層がこれらの薬品に浸漬される回数が多くな
る結果、絶縁層自体が吸湿し変質してしまうという問題
があった。また、全体に工程が複雑なので高価な配線基
板とならざるを得ず、一般的な配線板には使用されてい
なかった。
Also, a so-called build-up method has been developed in which a predetermined substrate surface is alternately coated and plated with an insulating layer and a wiring circuit layer, or a via hole is formed to form a multilayer structure. Therefore, it was difficult to achieve high-density wiring. In addition, in the case of multi-layering by the build-up method, if a process such as forming a wiring circuit layer by an etching method or applying a conductor to the inner surface of a via hole by plating or the like is repeated, the insulating layer is etched. Although it is immersed in a solution or plating solution, as the number of layers increases with the increase in wiring density, the number of times that the insulating layer is immersed in these chemicals increases, and as a result, the insulating layer itself absorbs moisture and deteriorates. There was a problem that it would. Further, since the process is complicated as a whole, it has to be an expensive wiring board, and has not been used for a general wiring board.

【0004】一般的に、配線板のコア基板として用いら
れる絶縁材料には、有機樹脂に対してガラスクロスを使
用したプリプレグが主に使用されており、配線板の機械
的特性及び熱的特性を向上させている。
In general, a prepreg using glass cloth for an organic resin is mainly used as an insulating material used as a core substrate of a wiring board, and the mechanical and thermal characteristics of the wiring board are reduced. Have improved.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、従来の
プリプレグは、繊維体を数十〜数百本束ねて織った織布
や不織布に熱硬化性の有機樹脂を含浸した複合体からな
るもので、基板表面には、触針法による表面粗さ測定に
よれば、図5に示すように、織布や不織布による凹凸
や、クラックが必然的に存在するものであった。このよ
うな表面に凹凸やクラックが存在するプリプレグを用い
てその表面に配線を形成する場合、線幅が100μm以
上の比較的大きな配線パターンを形成する場合には、格
別な問題はなかったが、回路の微細配線化に伴い、線幅
が50μm以下の微細配線を形成した場合には、プリプ
レグ表面の凹凸やクラックによって微細配線が変形した
り、場合によっては断線するなどの問題が有った。
However, the conventional prepreg is composed of a woven fabric or nonwoven fabric obtained by bundling dozens to hundreds of fibrous bodies and impregnating a thermosetting organic resin into a woven fabric or nonwoven fabric. According to the surface roughness measurement by the stylus method, as shown in FIG. 5, irregularities and cracks due to a woven or nonwoven fabric were inevitably present on the substrate surface. When forming a wiring on the surface using a prepreg having such irregularities or cracks on the surface, when forming a relatively large wiring pattern having a line width of 100 μm or more, there was no particular problem, In the case where a fine wiring having a line width of 50 μm or less is formed along with a fine wiring of a circuit, the fine wiring is deformed due to irregularities or cracks on the surface of the prepreg, and in some cases, there is a problem such as disconnection.

【0006】特に、このプリプレグに対して金属箔から
なる微細な配線を形成しようとする場合、金属箔が凹凸
によって部分的に密着不良を来たし、プリプレグ内部に
形成されたビアホール導体との接続不良を生じるなどの
問題が顕著であった。また、貫通ビアホールを加工する
際においてはドリルの芯がずれ、折損したり、炭酸ガス
レーザーやYAGレーザーで加工する際、レーザーの入
射状態が均一にできないため、ビアホールの形状が歪に
なりビアペーストの充填不良が発生し、配線板にした時
の導通不良が発生する問題が有った。
In particular, when a fine wiring made of a metal foil is to be formed on the prepreg, the metal foil may cause partial adhesion failure due to unevenness, and a connection failure with a via-hole conductor formed inside the prepreg may occur. The problems such as occurrence were remarkable. Also, when drilling through via holes, the drill core is misaligned or broken, and when drilling with a carbon dioxide gas laser or a YAG laser, the laser incident state cannot be made uniform. There is a problem that poor filling occurs and poor conduction occurs when the wiring board is used.

【0007】また、ビアホール内に導体ペーストを充填
する際に、ビアホール周辺に付着したペーストがプリプ
レグ表面の凹凸内にトラップされてしまい、配線回路層
を形成した場合に、トラップされた導体ペーストによっ
て配線回路層間がショートするなどの問題があった。
In addition, when the conductive paste is filled in the via hole, the paste attached to the periphery of the via hole is trapped in the unevenness on the surface of the prepreg, and when the wiring circuit layer is formed, the conductive paste trapped by the conductive paste is used. There were problems such as a short circuit between circuit layers.

【0008】一方、繊維状のアラミドを分散させた不織
布はアラミド繊維が不均一な状態で分布している為、ア
ラミド樹脂の多い部分や少ない部分が存在する。これに
よりビアホールの形成において安定した加工条件を見出
すことが困難である。また吸水率が2〜3%と高く、積
層や硬化時の加熱工程やハンダ付け等の高温で処理した
際にアラミドに含まれた水分が急激に蒸発し、基板表面
に膨れや割れが発生する問題があった。
On the other hand, in the nonwoven fabric in which fibrous aramid is dispersed, since aramid fibers are distributed in a non-uniform state, there are portions where the amount of aramid resin is large and portions where the aramid resin is small. This makes it difficult to find stable processing conditions in forming via holes. In addition, the water absorption is as high as 2 to 3%, and the moisture contained in the aramid evaporates rapidly when subjected to a high temperature treatment such as a heating step during lamination or curing, or soldering, thereby causing swelling or cracking on the substrate surface. There was a problem.

【0009】従って、本発明は、表面に微細な配線が形
成可能であって、且つ耐環境性に優れ、ビアホールの形
成が容易なプリプレグとその製造方法を提供することを
目的とするものである。また、かかるプリプレグを用い
て微細な配線を形成可能な配線基板の製造方法を提供す
ることを目的とするものである。
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a prepreg in which fine wiring can be formed on the surface, which is excellent in environmental resistance and in which via holes can be easily formed, and a method of manufacturing the same. . It is another object of the present invention to provide a method of manufacturing a wiring board capable of forming fine wiring using such a prepreg.

【0010】[0010]

【課題を解決するための手段】本発明者等は、上記のよ
うな課題について鋭意検討した結果、ガラス織布に熱硬
化性樹脂を含浸させたプリプレグの少なくとも片面に離
型性フィルムを配置し、これを所定の温度、圧力で熱処
理することにより、プリプレグ表面の凹凸を小さくでき
ることを見いだし、本発明に至った。
Means for Solving the Problems As a result of diligent studies on the above problems, the present inventors have found that a release film is disposed on at least one surface of a prepreg in which a thermosetting resin is impregnated into a glass woven fabric. It has been found that by subjecting the prepreg to a heat treatment at a predetermined temperature and pressure, the irregularities on the prepreg surface can be reduced, and the present invention has been accomplished.

【0011】即ち、本発明のプリプレグは、ガラス織布
と熱硬化性樹脂と複合体からなり、触針法により測定さ
れる20mmスパンにおける平均表面粗さ(Ra)が5
μm以下であり、且つ最大表面粗さ(Rmax)が50
μm以下であることを特徴とするものであり、前記熱硬
化性樹脂としては、ポリフェニレンエーテルであること
が望ましく、また前記ガラス織布と前記熱硬化性樹脂と
の体積比率が20:80〜80:20の割合からなるこ
とが望ましい。
That is, the prepreg of the present invention comprises a composite of a glass woven fabric, a thermosetting resin, and has an average surface roughness (Ra) of 5 mm over a span of 20 mm measured by a stylus method.
μm or less and the maximum surface roughness (Rmax) is 50
μm or less, and the thermosetting resin is desirably polyphenylene ether, and the volume ratio of the glass woven fabric to the thermosetting resin is 20:80 to 80. : 20 is desirable.

【0012】また、プリプレグの製造方法としては、ガ
ラス織布に熱硬化性樹脂を含浸させたシート体の少なく
とも片面に、平均表面粗さ(Ra)が5μm以下の離型
性フィルムを介して、平均表面粗さ(Ra)が10μm
以下、最大表面粗さ(Rmax)が70μm以下の平板
を積層し、20kgf/cm2 以上の圧力を印加しなが
ら40〜220℃の温度で加熱処理することを特徴とす
るものである。
Further, as a method for producing a prepreg, at least one surface of a sheet body in which a thermosetting resin is impregnated in a glass woven fabric is provided with a release film having an average surface roughness (Ra) of 5 μm or less. Average surface roughness (Ra) is 10 μm
Hereinafter, flat plates having a maximum surface roughness (Rmax) of 70 μm or less are laminated and subjected to heat treatment at a temperature of 40 to 220 ° C. while applying a pressure of 20 kgf / cm 2 or more.

【0013】さらに、配線基板の製造方法としては、ガ
ラス織布に熱硬化性樹脂を含有させた複合体からなり、
触針法によって測定される20mmスパンにおける平均
表面粗さ(Ra)が5μm以下であり、且つ最大表面粗
さ(Rmax)が50μm以下であるプリプレグに、ビ
アホールを形成し、該ビアホール内に金属ペーストを充
填してビアホール導体を形成する工程と、少なくともビ
アホール導体を形成した前記プリプレグ表面に金属箔か
らなる配線回路を形成する工程と、前記プリプレグ中の
熱硬化性樹脂を熱硬化させる工程を具備することを特徴
とするものである。
[0013] Further, as a method of manufacturing a wiring board, the method comprises a composite of a glass woven fabric and a thermosetting resin,
A via hole is formed in a prepreg having an average surface roughness (Ra) of 5 μm or less and a maximum surface roughness (Rmax) of 50 μm or less in a 20 mm span measured by a stylus method, and a metal paste is formed in the via hole. To form a via-hole conductor by filling the prepreg, at least a step of forming a wiring circuit made of a metal foil on the surface of the prepreg on which the via-hole conductor is formed, and a step of thermally curing a thermosetting resin in the prepreg. It is characterized by the following.

【0014】なお、上記のプリプレグとその製造方法お
よび配線基板の製造方法において、前記熱硬化性樹脂と
してポリフェニレンエーテル樹脂であることが望まし
い。
In the prepreg, the method for manufacturing the prepreg, and the method for manufacturing a wiring board, the thermosetting resin is preferably a polyphenylene ether resin.

【0015】本発明によれば、上記のような平坦化処理
によって、プリプレグの表面の平均表面粗さ(Ra)を
5μm以下、最大表面粗さ(Rmax)を50μm以下
とすることにより、配線回路形成時に微細配線を形成し
た場合に発生する配線の変形や断線、転写不良を防止で
き、かつ貫通ビアホールを形成が容易に行うことができ
る。
According to the present invention, by making the average surface roughness (Ra) of the prepreg surface 5 μm or less and the maximum surface roughness (Rmax) 50 μm or less by the above-mentioned flattening treatment, the wiring circuit It is possible to prevent deformation, disconnection, and transfer failure of the wiring that occur when a fine wiring is formed at the time of formation, and it is possible to easily form a through via hole.

【0016】また、プリプレグを積層したり、熱硬化時
の加熱工程やハンダ付け等の高温で処理した際に発生す
る基板表面に膨れや割れは、上記手法の処理を施すこと
により織布または不織布の繊維内に樹脂成分を均一に浸
透することができるために解決できる。
In addition, swelling or cracking on the surface of the substrate which occurs when the prepreg is laminated or heated at a high temperature, such as a heating step during thermosetting or soldering, is treated by the above-mentioned method to obtain a woven or non-woven fabric. The problem can be solved because the resin component can be uniformly infiltrated into the fibers.

【0017】さらに、このプリプレグを用いてビアホー
ル導体の形成、金属箔による回路形成を行った場合、従
来のプリプレグ表面の凹凸による微細配線の変形や断線
が解消され、金属箔による微細は配線回路の形成を容易
にすることができる。
Furthermore, when a via-hole conductor is formed using this prepreg and a circuit is formed using a metal foil, the deformation and disconnection of the fine wiring due to the unevenness of the conventional prepreg surface are eliminated, and the fineness due to the metal foil is reduced in the wiring circuit. Formation can be facilitated.

【0018】[0018]

【発明の実施の形態】本発明におけるプリプレグは、ガ
ラス織布に熱硬化性樹脂を含浸させた複合体からなるも
のである。なお、織布は有機樹脂中に合計20〜80体
積%の割合で均一に分散されたものであることが望まし
い。
BEST MODE FOR CARRYING OUT THE INVENTION A prepreg according to the present invention comprises a composite of glass woven fabric impregnated with a thermosetting resin. The woven fabric is desirably uniformly dispersed in the organic resin at a ratio of 20 to 80% by volume.

【0019】これは、織布の割合が20体積%よりも少
ないと、繊維の中まで樹脂が十分に含浸できず、硬化体
の強度低下や吸水率が高くなり、マイグレーションなど
の問題が発生し、信頼性に乏しくなり、80体積%より
も多いと、微細パターンを形成し、積層、硬化を行う
と、樹脂の流出が多くなり、配線の変形、断線の発生、
ランド上での樹脂のはい上がりによって内層ではビアホ
ール導体との接続不良、また表層ではメッキ不良を生じ
るなどの問題があるためである。
[0019] If the proportion of the woven fabric is less than 20% by volume, the resin cannot be sufficiently impregnated into the fiber, the strength of the cured product decreases, the water absorption rate increases, and problems such as migration occur. If the content is more than 80% by volume, a fine pattern is formed, and lamination and curing are performed.
This is because the rise of the resin on the lands causes problems such as poor connection with the via hole conductor in the inner layer and poor plating in the surface layer.

【0020】このような複合体中に含まれる熱硬化性樹
脂としては、PPE(ポリフェニレンエーテル樹脂)、
BTレジン(ビスマレイドトリアジン)、エポキシ樹
脂、ポリイミド樹脂、フッ素樹脂、フェノール樹脂、ポ
リアミノビスマレイミド等の樹脂からなり、とりわけ原
料として室温で液体の熱硬化性樹脂であることが望まし
いが、特に、PPE(ポリフェニレンエーテル樹脂)
は、吸水率が低く、耐熱性および熱膨張率が低い点で最
も望ましい。
The thermosetting resin contained in such a composite includes PPE (polyphenylene ether resin),
It is made of a resin such as BT resin (bismaleide triazine), epoxy resin, polyimide resin, fluororesin, phenol resin and polyaminobismaleimide. It is preferable that the raw material is a thermosetting resin which is liquid at room temperature. (Polyphenylene ether resin)
Is most preferable in terms of low water absorption, low heat resistance and low coefficient of thermal expansion.

【0021】一方、ガラス織布としては、ガラス繊維を
数百本束ねて糸状に形成したものを編んだものからな
り、ガラス繊維としては1〜20μmの径が適当であ
り、これを束ねた糸は円換算で50〜100μm程度の
直径を有するものが望ましい。
On the other hand, the glass woven cloth is formed by knitting a bundle formed by bundling several hundreds of glass fibers into a thread shape. The glass fiber has a diameter of 1 to 20 μm. Preferably have a diameter of about 50 to 100 μm in terms of a circle.

【0022】次に、本発明のプリプレグの製造方法を図
1および図2をもとに説明する。図1は、プリプレグ作
製の工程図であり、図2はプリプレグへの熱処理方法を
説明するための概略図である。まず、粘度が5〜50ポ
イズ、望ましくは5〜30ポイズのワニス状の熱硬化性
樹脂1を容器2に溜めておき、その中に織布3を通過さ
せることによりワニス状態の熱硬化性樹脂1を織布3内
に含浸させた後、乾燥して半硬化のシート体Aを作製す
る。このシート体Aは後工程での使用用途に応じてロー
ル状に巻き取ったり、所定の寸法に裁断することが可能
である。この時のシート体Aの平均表面粗さ(Ra)は
通常50μmを超えるものである。
Next, a method of manufacturing a prepreg of the present invention will be described with reference to FIGS. FIG. 1 is a process diagram for producing a prepreg, and FIG. 2 is a schematic diagram for explaining a heat treatment method for the prepreg. First, a varnish-like thermosetting resin 1 having a viscosity of 5 to 50 poise, desirably 5 to 30 poise is stored in a container 2, and a woven cloth 3 is passed through the varnish-like thermosetting resin 1. 1 is impregnated into the woven fabric 3 and then dried to produce a semi-cured sheet body A. The sheet body A can be wound into a roll or cut into a predetermined size depending on the use in a later step. At this time, the average surface roughness (Ra) of the sheet body A usually exceeds 50 μm.

【0023】次に、図2に示すように、上記のようにし
て作製したシート体Aの少なくとも片面、必要に応じて
は両面に離型性を有するフィルム4で挟み込み、なおか
つその両面をステンレス板のような平板5に挟み込み、
加熱及び加圧可能なプレス機6にセットする。
Next, as shown in FIG. 2, at least one side of the sheet body A prepared as described above, and if necessary, both sides thereof are sandwiched by a film 4 having releasability, and both sides thereof are made of a stainless steel plate. Sandwiched between flat plates 5 like
The heating and pressurizing press 6 is set.

【0024】この時に用いる離型性フィルム4は厚さが
30〜100μm程度であり、そのシート体Aとの接触
面は最終的にシート体Aの平均表面粗さを決定する最も
重要なものであり、これらのシート体Aと接触する表面
の平均表面粗さ(Ra)は5μm以下、特に2μm以下
であることが重要である。この材質としてはポリエチレ
ンテレフタレート(PET)やテフロン系、ポリオレフ
ィン系、ポリイミド系等のものが良好で表面にはSi等
の表面処理を施したものも有効である。
The release film 4 used at this time has a thickness of about 30 to 100 μm, and its contact surface with the sheet A is the most important factor for finally determining the average surface roughness of the sheet A. It is important that the average surface roughness (Ra) of the surface in contact with the sheet A is 5 μm or less, particularly 2 μm or less. As this material, polyethylene terephthalate (PET), Teflon-based, polyolefin-based, polyimide-based, or the like is preferable, and a material whose surface is subjected to a surface treatment such as Si is also effective.

【0025】そして、離型性フィルム4で挟み込んだシ
ート体Aをさらにステンレス板5で挟み込む。ステンレ
ス板5は、厚さが0.1〜2mmの剛性体からなること
が望ましく、そのステンレス板5の平均表面粗さ(R
a)は10μm以下、望ましくは5μm以下の鏡面に近
いもの、また、表面の最大表面粗さ(Rmax)は70
μm以下、望ましくは50μm以下のものが良い。
Then, the sheet A sandwiched between the release films 4 is further sandwiched between stainless steel plates 5. The stainless steel plate 5 is preferably made of a rigid body having a thickness of 0.1 to 2 mm, and has an average surface roughness (R
a) is close to a mirror surface of 10 μm or less, preferably 5 μm or less, and the maximum surface roughness (Rmax) of the surface is 70 μm or less.
μm or less, preferably 50 μm or less.

【0026】一方、加熱及び加圧する装置としては、一
般的に1軸式の単動プレス、2軸式の複動プレス、又は
2軸ロールタイプのラミネータ及び静水圧プレス機など
が上げられる。このような装置を使いシート体Aに加熱
加圧処理を行なう。
On the other hand, examples of a heating and pressurizing apparatus include a single-axis single-acting press, a two-axis double-acting press, and a two-axis roll-type laminator and a hydrostatic press. The sheet A is subjected to the heating and pressurizing treatment using such an apparatus.

【0027】加熱温度は40〜220℃、望ましくは織
布または不織布中に含浸されている樹脂の溶融粘度が極
小値となる温度を中心として前後±50℃の範囲での処
理が有効である。この加熱温度が40℃よりも低いと樹
脂の粘度低下に乏しく、離型性フィルムの表面状態に追
従できず、220℃よりも高いと樹脂成分の分解が発生
し、樹脂特性が劣化する。
The heating temperature is 40 to 220 ° C., preferably a treatment in the range of ± 50 ° C. around the temperature at which the melt viscosity of the resin impregnated in the woven or non-woven fabric becomes a minimum. If the heating temperature is lower than 40 ° C., the viscosity of the resin is hardly reduced, and the surface state of the release film cannot be followed. If the heating temperature is higher than 220 ° C., the resin component is decomposed, and the resin characteristics are deteriorated.

【0028】さらに、加圧条件は20〜100kgf/
cm2 、望ましくは20〜50kgf/cm2 であるこ
とが必要である。これは、圧力が20kgf/cm2
り小さいと、繊維の平滑化および樹脂の織布への浸透力
が弱く、100kgf/cm2 よりも大きいと溶融した
樹脂が流出したり、加圧処理後の繊維内に残留応力が発
生し、最大表面粗さが大きくなる。
Further, the pressing condition is 20 to 100 kgf /
cm 2 , preferably 20 to 50 kgf / cm 2 . If the pressure is less than 20 kgf / cm 2 , the smoothing of the fibers and the penetrating power of the resin into the woven fabric are weak. If the pressure is more than 100 kgf / cm 2 , the molten resin flows out or the pressure after the pressure treatment is increased. Residual stress occurs in the fiber, and the maximum surface roughness increases.

【0029】また、これらの処理時間は10〜180秒
程度が望ましい。このような処理を行なうことにより、
処理後のシート体Aの平均表面粗さ(Ra)を5μm以
下、特に2μm以下、最大表面粗さ(Rmax)を50
μm以下、特に30μm以下にすることができ、プリプ
レグを作製することが出来る。
The processing time is preferably about 10 to 180 seconds. By performing such processing,
The average surface roughness (Ra) of the sheet body A after the treatment is 5 μm or less, particularly 2 μm or less, and the maximum surface roughness (Rmax) is 50 μm.
μm or less, particularly 30 μm or less, and a prepreg can be manufactured.

【0030】次に、上記プリプレグを用いたビアホール
導体、配線回路層を具備する一単位の配線基板の製造方
法について図3をもとに説明する。まず、本発明のプリ
プレグ(a)に対してビアホール11を形成する
(b)。ビアホール11の形成には、ドリル、パンチン
グ、炭酸ガスレーザ、YAGレーザ、及びエキシマレー
ザ等の公知の方法が使用でき、所望の位置にビアホール
11を形成して導体ペーストを充填する(c)ことによ
りビアホール導体12を形成する。
Next, a method of manufacturing one unit of wiring board having a via hole conductor and a wiring circuit layer using the prepreg will be described with reference to FIG. First, a via hole 11 is formed in the prepreg (a) of the present invention (b). Known methods such as drilling, punching, a carbon dioxide laser, a YAG laser, and an excimer laser can be used for forming the via hole 11. The via hole 11 is formed at a desired position and filled with a conductive paste (c). The conductor 12 is formed.

【0031】導体ペースト中に配合される金属粉末とし
ては、銅、アルミニウム、銀、金のうち少なくとも1種
の低抵抗金属からなることが望ましく、有機溶剤とバイ
ンダーを添加しペーストを得ることができる。
The metal powder to be blended in the conductor paste is desirably made of at least one low-resistance metal among copper, aluminum, silver and gold, and a paste can be obtained by adding an organic solvent and a binder. .

【0032】次に、このビアホール導体12が形成され
たプリプレグ10のビアホール導体形成表面に配線回路
層を形成する。ここでは、配線回路層の形成方法とし
て、転写法について説明する。所定の転写シート13面
に、プリプレグ表面に形成する配線回路層を形成にあた
り、(d)転写シート13の表面に金属箔14を接着し
た後、(e)この金属箔14の表面にレジスト15を塗
布し、(f)露光、現像を行ない、しかる後に(g)エ
ッチング処理、レジスト除去を行って配線回路層16を
形成する。
Next, a wiring circuit layer is formed on the via-hole conductor forming surface of the prepreg 10 on which the via-hole conductor 12 is formed. Here, a transfer method will be described as a method for forming the wiring circuit layer. In forming a wiring circuit layer to be formed on the surface of the prepreg on a predetermined transfer sheet 13 surface, (d) a metal foil 14 is adhered to the surface of the transfer sheet 13, and (e) a resist 15 is coated on the surface of the metal foil 14. The wiring circuit layer 16 is formed by applying, (f) exposing and developing, and then (g) etching and removing the resist.

【0033】次に、転写シート13表面に形成された配
線回路層16をビアホール導体12が形成されたプリプ
レグ10に転写させる。転写させる方法としては、
(h)前記ビアホール導体12が形成されたプリプレグ
10の表面に位置合わせして、(i)配線回路層16が
形成された転写シート13とプリプレグ10とを積層し
て圧力10〜500kgf/cm2 程度の圧力を印加す
る。この時、絶縁シートとして、前述したような平均表
面粗さおよび最大表面粗さの小さいプリプレグ10を用
いることにより、配線回路層16を変形、断線させるこ
となく、プリプレグ中に転写することができる。
Next, the wiring circuit layer 16 formed on the surface of the transfer sheet 13 is transferred to the prepreg 10 on which the via-hole conductors 12 are formed. As a method of transferring,
(H) Positioning the surface of the prepreg 10 on which the via-hole conductors 12 are formed, (i) laminating the transfer sheet 13 on which the wiring circuit layer 16 is formed and the prepreg 10 and applying a pressure of 10 to 500 kgf / cm 2. About pressure. At this time, by using the prepreg 10 having a small average surface roughness and a maximum surface roughness as described above, the wiring circuit layer 16 can be transferred into the prepreg without deforming or breaking the wiring circuit layer 16.

【0034】そして(j)転写シート13を剥がしてプ
リプレグ10に配線回路層16を転写させることによ
り、配線回路層16がプリプレグ10の表面に埋め込ま
れた単層の配線基板17を作製することができる。その
後、(k)この配線基板を加熱加圧処理して完全硬化す
ることによって一単位の配線基板を作製することができ
る。
(J) By peeling off the transfer sheet 13 and transferring the wiring circuit layer 16 to the prepreg 10, a single-layer wiring substrate 17 in which the wiring circuit layer 16 is embedded in the surface of the prepreg 10 can be manufactured. it can. Thereafter, (k) the wiring substrate is heated and pressurized and completely cured, whereby a single unit of wiring substrate can be manufactured.

【0035】かかる方法においては、プリプレグの平均
表面粗さおよび最大表面粗さが小さいために、微細配線
を形成した配線回路層16を転写、積層硬化した場合、
微細配線の変形や断線及び転写不良を防止することがで
きる。
In this method, since the average surface roughness and the maximum surface roughness of the prepreg are small, when the wiring circuit layer 16 on which the fine wiring is formed is transferred and laminated and cured,
Deformation, disconnection, and transfer failure of the fine wiring can be prevented.

【0036】また、ビアホール(d)の形成にあたって
は、表面が平滑であるために、ビアホール形成のための
ドリルやレーザー光の侵入角度がプリプレグ表面に対し
て常に垂直となる結果、ビアホールが変形することがな
く、ビアホールの品質を高めることができ、このビアホ
ールに導体ペーストを充填したビアホール導体12と配
線回路層16とを良好に接続することができる。
In forming the via hole (d), since the surface is smooth, the penetration angle of a drill or a laser beam for forming the via hole is always perpendicular to the prepreg surface, so that the via hole is deformed. Therefore, the quality of the via hole can be improved, and the via hole conductor 12 in which the conductive paste is filled in the via hole and the wiring circuit layer 16 can be connected well.

【0037】[0037]

【実施例】実施例1 Eガラスで織られたガラスクロスを50体積%、ポリフ
ェニレンエーテル(PPE)樹脂50体積%の割合で、
ガラスクロス内にPPE樹脂が含浸されたプリプレグの
表裏面に、平均表面粗さ(Ra)が0.3μmのテフロ
ン系の離型性フィルムおよび平均表面粗さ3μm、最大
表面粗さ15μmのステンレス板を図2に示すように順
次配置して挟み込んだ。そして、かかる積層物を真空処
理のできる1軸式の単動プレス機にセットし135℃の
温度で50kg/cm2 の条件で熱処理した。
EXAMPLE 1 A glass cloth woven with E glass was 50% by volume and a polyphenylene ether (PPE) resin was 50% by volume.
A Teflon-based release film having an average surface roughness (Ra) of 0.3 μm and a stainless steel plate having an average surface roughness of 3 μm and a maximum surface roughness of 15 μm are formed on the front and back surfaces of a prepreg in which PPE resin is impregnated in a glass cloth. Were sequentially arranged as shown in FIG. Then, the laminate was set on a single-axis single-acting press capable of performing vacuum processing and heat-treated at a temperature of 135 ° C. under a condition of 50 kg / cm 2 .

【0038】この条件で得られたプリプレグの表面状態
を観察した。プリプレグの表面粗さは触針式の表面粗さ
測定機を用いて、20mmスパンにて任意の5箇所を測
定し、その平均値を算出した。その結果、プリプレグの
平均表面粗さ(Ra)は2.6μm、最大表面粗さ(R
max)が12μmの良好な表面を有するプリプレグが
得られた。なお、このプリプレグの上記表面粗さ測定機
による測定結果(チャート)を図4に示した。
The surface condition of the prepreg obtained under these conditions was observed. The surface roughness of the prepreg was measured using a stylus-type surface roughness measuring device at five arbitrary points over a span of 20 mm, and the average value was calculated. As a result, the average surface roughness (Ra) of the prepreg was 2.6 μm, and the maximum surface roughness (R) was
A prepreg having a good surface with a max) of 12 μm was obtained. FIG. 4 shows the measurement results (chart) of the prepreg by the surface roughness measuring instrument.

【0039】(配線基板の製造)次に、上記によって作
製した各プリプレグを用いて配線基板を製造した。ま
ず、プリプレグの所望の位置に炭酸ガスレーザーで直径
0.1mmのビアホールを形成し、そのホール内に銀を
メッキした銅粉末を含む銅ペーストを充填してビアホー
ル導体を形成した。
(Manufacture of Wiring Board) Next, a wiring board was manufactured using each prepreg manufactured as described above. First, a via hole having a diameter of 0.1 mm was formed at a desired position of a prepreg by a carbon dioxide gas laser, and the hole was filled with a copper paste containing copper powder plated with silver to form a via hole conductor.

【0040】一方、ポリエチレンテレフタレート(PE
T)樹脂からなる転写シートの表面に接着剤を塗布して
粘着性をもたせ、厚さ12μm、平均表面粗さ0.8μ
mの銅箔を一面に接着した。その後、フォトレジストを
塗布し露光現像を行った後、これを塩化第二鉄溶液中に
浸漬して非パターン部をエッチング除去して配線回路層
を形成した。なお、作製した配線回路層は、線幅が50
μm、配線と配線との間隔が50μmの超微細なパター
ンである。
On the other hand, polyethylene terephthalate (PE)
T) An adhesive is applied to the surface of a transfer sheet made of a resin so as to have tackiness, a thickness of 12 μm, and an average surface roughness of 0.8 μm.
m of copper foil was adhered to one surface. Then, after applying a photoresist and performing exposure and development, it was immersed in a ferric chloride solution to remove non-pattern portions by etching to form a wiring circuit layer. Note that the manufactured wiring circuit layer has a line width of 50.
It is an ultra-fine pattern having a thickness of 50 μm and an interval between wirings of 50 μm.

【0041】そして、プリプレグに先の配線回路層が形
成された転写シートを両面に位置決めして50kgf/
cm2 で加圧させた後、転写シートを剥がして、銅から
なる配線回路層を具備する一単位の配線基板を形成し
た。
Then, the transfer sheet having the wiring circuit layer formed thereon on the prepreg is positioned on both sides, and 50 kgf /
After pressing at a pressure of 2 cm 2 , the transfer sheet was peeled off to form a unit wiring board having a wiring circuit layer made of copper.

【0042】この時、転写された線幅が50μm、配線
と配線との間隔が50μmの超微細なパターンは回路が
変形することなく転写されており、導通確認を行なった
結果、断線、短絡のないものが得られた。また直径0.
1mmのビアホールに埋め込まれた導体ペーストと銅箔
からなる配線回路層との接続も問題ないことを確認し
た。
At this time, an ultra-fine pattern having a transferred line width of 50 μm and an interval between wirings of 50 μm was transferred without deformation of the circuit. Not what you got. It has a diameter of 0.
It was confirmed that there was no problem in connection between the conductive paste embedded in the 1 mm via hole and the wiring circuit layer made of copper foil.

【0043】この両面に、同様にして配線回路層を転写
した配線基板を3層重ね、50kgf/cm2 の圧力を
加え、200℃で1時間加熱して完全硬化させて多層配
線基板を作製した。
Similarly, three layers of the wiring board on which the wiring circuit layer was transferred were superimposed on both sides, a pressure of 50 kgf / cm 2 was applied, and the resultant was heated at 200 ° C. for one hour to be completely cured to produce a multilayer wiring board. .

【0044】得られた多層配線基板に対して、断面にお
ける配線回路層やビアホール導体の形成付近を観察した
結果、配線回路層とビアホール導体とは良好な接続状態
であり、各配線間の導通テストを行った結果、配線の断
線も認められなかった。
As a result of observing the vicinity of the formation of the wiring circuit layer and the via-hole conductor in the cross section of the obtained multilayer wiring board, the wiring circuit layer and the via-hole conductor were in a good connection state. As a result, no disconnection of the wiring was observed.

【0045】また、多層配線基板の最表面の配線回路層
表面に、NiおよびAuからなるメッキ層を3μmの厚
みで形成しても、メッキ液等のビアホール導体への侵入
は全く認められなかった。
Even if a plating layer made of Ni and Au was formed to a thickness of 3 μm on the outermost wiring circuit layer surface of the multilayer wiring board, no penetration of the plating solution or the like into the via-hole conductor was observed. .

【0046】比較例1 ポリフェニレンエーテル樹脂50体積%を、Eガラスで
織られたガラスクロスを50体積%の割合で含浸したプ
リプレグの表裏面に、平均表面粗さ(Ra)8μmのポ
リオレフィン系の離型性フィルムで挟み込み、さらに平
均表面粗さ(Ra)5μm、最大表面粗さ(Rmax)
32μmのステンレス板によって図2のように挟み込ん
だ。
Comparative Example 1 A 50% by volume polyphenylene ether resin was impregnated with 50% by volume of a glass cloth woven from E glass on the front and back surfaces of a prepreg having a polyolefin-based resin having an average surface roughness (Ra) of 8 μm. Sandwiched by a moldable film, and further, an average surface roughness (Ra) of 5 μm and a maximum surface roughness (Rmax)
It was sandwiched between 32 μm stainless steel plates as shown in FIG.

【0047】そして、この積層物を、真空処理のできる
1軸式の単動プレス機にセットし最高温度140℃、1
00kgf/cm2 の加圧条件で処理した。
Then, the laminate is set on a single-axis single-acting press capable of vacuum processing, and the maximum temperature is set to 140 ° C.
The treatment was performed under a pressure of 00 kgf / cm 2 .

【0048】この条件で得られたプリプレグの表面状態
を実施例1と同様な方法で評価し、平均表面粗さ(R
a)および最大表面粗さ(Rmax)を算出した結果、
平均表面粗さ(Ra)が8.1μm、最大表面粗さ(R
max)が28μmであり、プリプレグの表面粗さはポ
リオレフィン系の離型フィルムの表面粗さと同等の値を
示すような物が得られた。
The surface condition of the prepreg obtained under these conditions was evaluated in the same manner as in Example 1, and the average surface roughness (R
a) and the result of calculating the maximum surface roughness (Rmax),
The average surface roughness (Ra) is 8.1 μm, and the maximum surface roughness (R
max) was 28 μm, and a prepreg having a surface roughness equivalent to that of a polyolefin-based release film was obtained.

【0049】そして、実施例1と全く同様にして、転写
法によって銅からなる配線回路層を形成して一単位の配
線基板を形成した。この時、転写された線幅が50μ
m、配線と配線との間隔が50μmの超微細なパターン
は転写シートを剥がす際に樹脂不足により配線が一緒に
剥がれる部分が有り、かろうじて転写されている部分に
関しては配線の断線が確認された。
Then, in exactly the same manner as in Example 1, a wiring circuit layer made of copper was formed by a transfer method to form one unit of wiring substrate. At this time, the transferred line width is 50 μm.
In the case of m, an ultra-fine pattern having an interval between the wirings of 50 μm has a portion where the wiring is peeled off due to a lack of resin when the transfer sheet is peeled off, and the disconnection of the wiring was confirmed in the barely transferred portion.

【0050】また、直径0.1mmのビアホール導体と
銅箔からなる配線回路層との接続においては、プリプレ
グの樹脂分が減少しているため転写不良によって導通の
ない部分が多く確認された。
In the connection between the via-hole conductor having a diameter of 0.1 mm and the wiring circuit layer made of copper foil, since the resin content of the prepreg was reduced, many portions that were not conductive due to poor transfer were confirmed.

【0051】この両面に配線回路層を転写した配線基板
3層重ね、100kgf/cm2 の圧力を加え、200
℃で1時間加熱して完全硬化させて多層配線基板を作製
した。得られた多層配線基板に対して、断面における配
線回路層やビアホール導体の形成付近を観察した結果、
層間の密着不良による導通不良があり、硬化条件の効果
も見られず良品として扱えないものであった。
The three layers of the wiring board having the wiring circuit layer transferred on both sides thereof are stacked, and a pressure of 100 kgf / cm 2 is applied to
This was heated at a temperature of 1 hour and completely cured to produce a multilayer wiring board. As a result of observing the vicinity of the formation of the wiring circuit layer and the via-hole conductor in the cross section with respect to the obtained multilayer wiring board,
There was poor conduction due to poor adhesion between the layers, and the effect of the curing conditions was not seen, and the product could not be handled as a good product.

【0052】実施例2〜12、比較例2〜11 Eガラスで織られたガラスクロスを50体積%、ポリフ
ェニレンエーテル(PPE)樹脂50体積%の割合で、
ガラスクロス内にPPE樹脂が含浸されたプリプレグの
表裏面に、平均表面粗さ(Ra)が表1のテフロン系の
離型性フィルムおよび平均表面粗さおよび最大表面粗さ
が表1のステンレス板を図2に示すように順次配置して
挟み込んだ。そして、かかる積層物を真空処理のできる
1軸式の単動プレス機にセットし表1の条件で熱処理し
た。
Examples 2 to 12 and Comparative Examples 2 to 11 A 50% by volume glass cloth woven from E glass and a 50% by volume polyphenylene ether (PPE) resin were used.
A Teflon-based release film having an average surface roughness (Ra) of Table 1 and a stainless steel plate having an average surface roughness and a maximum surface roughness of Table 1 are provided on the front and back surfaces of a prepreg in which PPE resin is impregnated in a glass cloth. Were sequentially arranged as shown in FIG. Then, the laminate was set on a single-axis single-acting press capable of performing vacuum processing and heat-treated under the conditions shown in Table 1.

【0053】この条件で得られたプリプレグの表面状態
を観察し、実施例1と同様な方法でプリプレグの平均表
面粗さ、最大表面粗さを測定した。また、それぞれのプ
リプレグを用いて実施例1と同様にして多層配線基板を
作製し、加工性、転写性および変形/断線について評価
した。
The surface condition of the prepreg obtained under these conditions was observed, and the average surface roughness and the maximum surface roughness of the prepreg were measured in the same manner as in Example 1. Further, a multilayer wiring board was produced using each prepreg in the same manner as in Example 1, and the workability, the transferability, and the deformation / disconnection were evaluated.

【0054】なお、比較例12は、アラミド不織布にエ
ポキシ樹脂を50体積%含浸させたプリプレグに対し
て、実施例1と同一の条件で加圧加熱処理を施したもの
の結果である。
Comparative Example 12 is a result of a prepreg obtained by impregnating an aramid nonwoven fabric with 50% by volume of an epoxy resin under pressure and heat treatment under the same conditions as in Example 1.

【0055】[0055]

【表1】 [Table 1]

【0056】表1より、本発明の請求範囲外であるプリ
プレグの平均表面粗さ(Ra)が5μmを超える比較例
1、3〜5、8〜11は、加工性、転写性、変形・断線
が見られ、また、プリプレグの最大表面粗さが50μm
を超える比較例2、3、5、6、11は変形/断線が見
られた。また、アラミド不織布を用いた比較例12で
は、ビアホール加工時にビアホールの変形が顕著であっ
た。
From Table 1, it is found that Comparative Examples 1, 3 to 5, and 8 to 11 in which the average surface roughness (Ra) of the prepreg outside the scope of the present invention exceeds 5 μm are workability, transferability, deformation and disconnection. And the maximum surface roughness of the prepreg was 50 μm.
In Comparative Examples 2, 3, 5, 6, and 11 exceeding the above, deformation / disconnection was observed. In Comparative Example 12 using the aramid nonwoven fabric, the via hole was significantly deformed during the via hole processing.

【0057】これらの比較例に対して、本発明の条件で
加熱加圧されたプリプレグは平均表面粗さ(Ra)が5
μm以下、最大表面粗さが50μm以下が達成され、こ
れを用いた配線基板においても加工性、転写性、変形・
断線について良好な結果が得られた。
In contrast to these comparative examples, the prepreg heated and pressed under the conditions of the present invention had an average surface roughness (Ra) of 5
μm or less and a maximum surface roughness of 50 μm or less are achieved.
Good results were obtained for disconnection.

【0058】[0058]

【発明の効果】以上詳述したとおり、本発明によれば、
平均表面粗さおよび最大表面粗さの小さいプリプレグを
作製することができ、これを用いて配線基板を作製する
ことにより、銅箔で形成した微細な配線回路層を形成し
た場合ににおいても、配線回路層の変形や断線などの発
生のない良好な配線基板を作製することができる。
As described in detail above, according to the present invention,
A prepreg having a small average surface roughness and a maximum surface roughness can be manufactured, and a wiring board is manufactured using the prepreg, so that even when a fine wiring circuit layer formed of copper foil is formed, wiring can be performed. It is possible to manufacture a favorable wiring board without occurrence of deformation of the circuit layer or disconnection.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明のプリプレグの製造方法を説明するため
の工程図である。
FIG. 1 is a process chart for explaining a prepreg manufacturing method of the present invention.

【図2】本発明のプリプレグの熱処理方法を説明するた
めの図である。
FIG. 2 is a diagram for explaining a prepreg heat treatment method of the present invention.

【図3】本発明の配線基板の製造方法を示す工程図であ
る。
FIG. 3 is a process chart showing a method for manufacturing a wiring board according to the present invention.

【図4】本発明のプリプレグの表面粗さ測定機による測
定結果(チャート)である。
FIG. 4 is a measurement result (chart) of a prepreg of the present invention by a surface roughness measuring device.

【図5】従来のプリプレグの表面粗さ測定機による測定
結果(チャート)である。
FIG. 5 is a measurement result (chart) of a conventional prepreg measured by a surface roughness measuring device.

【符号の説明】 1 熱硬化性樹脂 3 ガラス織布 A プリプレグ 4 離型性フィルム 5 平板 6 プレス機[Description of Signs] 1 Thermosetting resin 3 Glass woven cloth A Pre-preg 4 Release film 5 Flat plate 6 Press machine

フロントページの続き Fターム(参考) 4F072 AA04 AA07 AB09 AB28 AD42 AG03 AG18 AL13 4L033 AB05 AC11 AC15 BA14 CA48 5E317 AA24 BB12 BB14 BB19 CC25 CD21 CD25 CD32 GG03 GG12 GG14 5E346 AA06 AA12 AA15 AA43 BB01 CC04 CC08 DD02 DD12 DD31 EE02 EE06 EE07 EE18 GG28 HH07 HH26 Continued on the front page F term (reference) 4F072 AA04 AA07 AB09 AB28 AD42 AG03 AG18 AL13 4L033 AB05 AC11 AC15 BA14 CA48 5E317 AA24 BB12 BB14 BB19 CC25 CD21 CD25 CD32 GG03 GG12 GG14 5E346 AA06 AA12 AA04 EE02 DD02 EE18 GG28 HH07 HH26

Claims (8)

【特許請求の範囲】[Claims] 【請求項1】ガラス織布と熱硬化性樹脂との複合体から
なり、触針法により測定される20mmスパンにおける
平均表面粗さ(Ra)が5μm以下、最大表面粗さ(R
max)が50μm以下であることを特徴とするプリプ
レグ。
An average surface roughness (Ra) of a composite of a glass woven fabric and a thermosetting resin in a 20 mm span measured by a stylus method is 5 μm or less, and a maximum surface roughness (R) is obtained.
(max) is 50 μm or less.
【請求項2】前記熱硬化性樹脂がポリフェニレンエーテ
ルであることを特徴とする請求項1記載のプリプレグ。
2. The prepreg according to claim 1, wherein said thermosetting resin is polyphenylene ether.
【請求項3】前記ガラス織布と前記熱硬化性樹脂との体
積比率が20:80〜80:20の割合からなることを
特徴とする請求項1記載のプリプレグ。
3. The prepreg according to claim 1, wherein the volume ratio of the glass woven fabric and the thermosetting resin is in a ratio of 20:80 to 80:20.
【請求項4】ガラス織布に熱硬化性樹脂を含浸させたシ
ート体の少なくとも片面に、平均表面粗さ(Ra)が5
μm以下の離型性フィルムを介して、平均表面粗さ(R
a)が10μm以下、最大表面粗さ(Rmax)が70
μm以下の平板を積層し、20kgf/cm2 以上の圧
力を印加しながら40〜220℃の温度で加熱処理する
ことを特徴とするプリプレグの製造方法。
4. A sheet body in which a thermosetting resin is impregnated into a glass woven fabric, has at least one surface with an average surface roughness (Ra) of 5 or more.
Through a release film of μm or less, the average surface roughness (R
a) is 10 μm or less, and the maximum surface roughness (Rmax) is 70
A method for producing a prepreg, comprising laminating flat plates having a size of not more than μm and performing heat treatment at a temperature of 40 to 220 ° C. while applying a pressure of 20 kgf / cm 2 or more.
【請求項5】前記熱硬化性樹脂がポリフェニレンエーテ
ルであることを特徴とする請求項4記載のプリプレグの
製造方法。
5. The method for producing a prepreg according to claim 4, wherein said thermosetting resin is polyphenylene ether.
【請求項6】ガラス織布に熱硬化性樹脂を含有させた複
合体からなり、触針法によって測定される20mmスパ
ンにおける平均表面粗さ(Ra)が5μm以下であり、
且つ最大表面粗さ(Rmax)が50μm以下であるプ
リプレグに、ビアホールを形成し、該ビアホール内に金
属ペーストを充填してビアホール導体を形成する工程
と、少なくともビアホール導体を形成した前記プリプレ
グ表面に金属箔からなる配線回路を形成する工程と、前
記プリプレグ中の熱硬化性樹脂を熱硬化させる工程を具
備することを特徴とする配線基板の製造方法。
6. An average surface roughness (Ra) in a 20 mm span measured by a stylus method is 5 μm or less, comprising a composite in which a thermosetting resin is contained in a glass woven fabric.
Forming a via hole in a prepreg having a maximum surface roughness (Rmax) of 50 μm or less, filling the via hole with a metal paste to form a via hole conductor, and forming at least a metal on the prepreg surface on which the via hole conductor is formed. A method for manufacturing a wiring board, comprising: a step of forming a wiring circuit made of a foil; and a step of thermosetting a thermosetting resin in the prepreg.
【請求項7】前記プリプレグが、ガラス織布に熱硬化性
樹脂を含浸させたシート体の少なくとも片面に、平均表
面粗さ(Ra)が5μm以下の離型性フィルムを介し
て、平均表面粗さ(Ra)が10μm以下、最大表面粗
さ(Rmax)が70μm以下の平板を積層し、20k
gf/cm2 以上の圧力を印加しながら40〜220℃
の温度で加熱処理することによって作製されたものであ
る請求項6記載の配線基板の製造方法。
7. The prepreg is provided on at least one surface of a sheet of glass woven fabric impregnated with a thermosetting resin via a release film having an average surface roughness (Ra) of 5 μm or less. A flat plate having a thickness (Ra) of 10 μm or less and a maximum surface roughness (Rmax) of 70 μm or less is laminated,
40-220 ° C while applying a pressure of gf / cm 2 or more
7. The method for manufacturing a wiring board according to claim 6, wherein the wiring board is manufactured by performing a heat treatment at a temperature of (1).
【請求項8】前記熱硬化性樹脂がポリフェニレンエーテ
ルである請求項6記載の配線基板の製造方法。
8. The method according to claim 6, wherein said thermosetting resin is polyphenylene ether.
JP15157499A 1999-05-31 1999-05-31 Prepreg, manufacture and manufacture of wiring board Pending JP2000340908A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15157499A JP2000340908A (en) 1999-05-31 1999-05-31 Prepreg, manufacture and manufacture of wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15157499A JP2000340908A (en) 1999-05-31 1999-05-31 Prepreg, manufacture and manufacture of wiring board

Publications (1)

Publication Number Publication Date
JP2000340908A true JP2000340908A (en) 2000-12-08

Family

ID=15521504

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15157499A Pending JP2000340908A (en) 1999-05-31 1999-05-31 Prepreg, manufacture and manufacture of wiring board

Country Status (1)

Country Link
JP (1) JP2000340908A (en)

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JP2007273530A (en) * 2006-03-30 2007-10-18 Kyocera Corp Composite board and wiring board
JP2007317749A (en) * 2006-05-23 2007-12-06 Matsushita Electric Works Ltd Printed wiring board material and method of manufacturing the same
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CN103477399B (en) * 2011-04-07 2016-07-06 日本写真印刷株式会社 Possess with Graphene be main constituent the transfer sheet of nesa coating and manufacture method, transparent conductor
JP2012221695A (en) * 2011-04-07 2012-11-12 Nissha Printing Co Ltd Transfer sheet including transparent conductive film containing graphene as main component and method for producing the same
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US9215797B2 (en) 2011-04-07 2015-12-15 Nissha Printing Co., Ltd. Transfer sheet provided with transparent conductive film mainly composed of graphene, method for manufacturing same, and transparent conductor
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JP2019157009A (en) * 2018-03-14 2019-09-19 日立化成株式会社 Prepreg, laminate, printed wiring board, semiconductor package and method for producing prepreg
JP7081231B2 (en) 2018-03-14 2022-06-07 昭和電工マテリアルズ株式会社 Manufacturing method of prepreg, laminated board, printed wiring board, semiconductor package and prepreg
JP2021000802A (en) * 2019-06-24 2021-01-07 昭和電工マテリアルズ株式会社 Method for manufacturing frp precursor, frp precursor, laminated sheet, laminate, printed wiring board and semiconductor package
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