IT1176975B - Dispositivo di memoria dinamico a semiconduttori a linee di bit ripiegate - Google Patents

Dispositivo di memoria dinamico a semiconduttori a linee di bit ripiegate

Info

Publication number
IT1176975B
IT1176975B IT23162/84A IT2316284A IT1176975B IT 1176975 B IT1176975 B IT 1176975B IT 23162/84 A IT23162/84 A IT 23162/84A IT 2316284 A IT2316284 A IT 2316284A IT 1176975 B IT1176975 B IT 1176975B
Authority
IT
Italy
Prior art keywords
memory device
semiconductor memory
bit lines
folded bit
dynamic semiconductor
Prior art date
Application number
IT23162/84A
Other languages
English (en)
Other versions
IT8423162A0 (it
Inventor
Yanagisawa Kazumasa
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of IT8423162A0 publication Critical patent/IT8423162A0/it
Application granted granted Critical
Publication of IT1176975B publication Critical patent/IT1176975B/it

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4099Dummy cell treatment; Reference voltage generators

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
IT23162/84A 1983-10-17 1984-10-16 Dispositivo di memoria dinamico a semiconduttori a linee di bit ripiegate IT1176975B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58192366A JPS6085492A (ja) 1983-10-17 1983-10-17 ダイナミツクメモリ装置

Publications (2)

Publication Number Publication Date
IT8423162A0 IT8423162A0 (it) 1984-10-16
IT1176975B true IT1176975B (it) 1987-08-26

Family

ID=16290082

Family Applications (1)

Application Number Title Priority Date Filing Date
IT23162/84A IT1176975B (it) 1983-10-17 1984-10-16 Dispositivo di memoria dinamico a semiconduttori a linee di bit ripiegate

Country Status (9)

Country Link
US (1) US4651306A (it)
JP (1) JPS6085492A (it)
KR (1) KR930000759B1 (it)
DE (1) DE3438069A1 (it)
FR (1) FR2553558B1 (it)
GB (2) GB2149250B (it)
HK (2) HK40890A (it)
IT (1) IT1176975B (it)
SG (1) SG31290G (it)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61110394A (ja) * 1984-10-31 1986-05-28 Mitsubishi Electric Corp 半導体記憶装置
JPS621189A (ja) * 1985-03-18 1987-01-07 Nec Corp Mosメモリ回路
JPS61296598A (ja) * 1985-06-21 1986-12-27 Mitsubishi Electric Corp Mosダイナミツクramのダミ−ワ−ド線駆動回路
JPS6221357A (ja) * 1985-07-22 1987-01-29 Toshiba Corp メモリシステム
JPS62197992A (ja) * 1986-02-25 1987-09-01 Mitsubishi Electric Corp ダイナミツクram
JPS62200596A (ja) * 1986-02-26 1987-09-04 Mitsubishi Electric Corp 半導体メモリ
JPS6421788A (en) * 1987-07-16 1989-01-25 Nec Corp Semiconductor memory device
JP2953708B2 (ja) * 1989-07-31 1999-09-27 株式会社東芝 ダイナミック型半導体記憶装置
JPH07235612A (ja) * 1994-02-23 1995-09-05 Mitsubishi Electric Corp 半導体装置のメモリセル構造
DE19703611A1 (de) * 1997-01-31 1998-08-06 Siemens Ag Anwendungsspezifisches integriertes Halbleiterprodukt mit Dummy-Elementen
JP2001006373A (ja) * 1999-06-23 2001-01-12 Hitachi Ltd 伝送回路とこれを用いた半導体集積回路及び半導体メモリ
FR2810150B1 (fr) * 2000-06-13 2002-10-04 St Microelectronics Sa Dispositif de memoire vive dynamique et procede de commande d'un acces en lecture d'une telle memoire
US6566191B2 (en) * 2000-12-05 2003-05-20 International Business Machines Corporation Forming electronic structures having dual dielectric thicknesses and the structure so formed

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2239737B1 (it) * 1973-08-02 1980-12-05 Texas Instruments Inc
DE3002017C2 (de) * 1980-01-21 1982-02-04 Siemens AG, 1000 Berlin und 8000 München Monolithisch integrierter Halbleiterspeicher
JPS601713B2 (ja) * 1980-12-25 1985-01-17 株式会社東芝 ダイナミックメモリ装置
EP0068894B1 (en) * 1981-06-29 1989-12-13 Fujitsu Limited Dynamic random access memory device
JPS58111183A (ja) * 1981-12-25 1983-07-02 Hitachi Ltd ダイナミツクram集積回路装置
US4493056A (en) * 1982-06-30 1985-01-08 International Business Machines Corporation RAM Utilizing offset contact regions for increased storage capacitance
US4547868A (en) * 1984-07-26 1985-10-15 Texas Instruments Incorporated Dummy-cell circuitry for dynamic read/write memory

Also Published As

Publication number Publication date
KR850003046A (ko) 1985-05-28
GB2149250B (en) 1987-07-15
KR930000759B1 (ko) 1993-02-01
GB8422521D0 (en) 1984-10-10
GB2175476A (en) 1986-11-26
SG31290G (en) 1990-08-03
JPS6085492A (ja) 1985-05-14
FR2553558A1 (fr) 1985-04-19
GB2149250A (en) 1985-06-05
DE3438069A1 (de) 1985-05-02
US4651306A (en) 1987-03-17
FR2553558B1 (fr) 1991-10-04
GB2175476B (en) 1987-07-15
GB8616198D0 (en) 1986-08-06
HK48190A (en) 1990-06-29
HK40890A (en) 1990-06-01
IT8423162A0 (it) 1984-10-16

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