IT1076627B - Matrice di memoria - Google Patents

Matrice di memoria

Info

Publication number: IT1076627B
Authority: IT; Italy
Prior art keywords: memory matrix; matrix; memory
Prior art date: 1976-03-22

Application number

IT21264/77A

Other languages

English (en)

Original Assignee

Rca Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1976-03-22

Filing date

1977-03-15

Publication date

1985-04-27

1977-03-15 Application filed by Rca Corp filed Critical Rca Corp

1985-04-27 Application granted granted Critical

1985-04-27 Publication of IT1076627B publication Critical patent/IT1076627B/it

Links

Classifications

- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
- G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
- G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
- G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines

IT21264/77A 1976-03-22 1977-03-15 Matrice di memoria IT1076627B (it)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
US05/668,909 US4044341A (en)	1976-03-22	1976-03-22	Memory array

Publications (1)

Publication Number	Publication Date
IT1076627B true IT1076627B (it)	1985-04-27

Family

ID=24684250

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
IT21264/77A IT1076627B (it)	1976-03-22	1977-03-15	Matrice di memoria

Country Status (7)

Country	Link
US (1)	US4044341A (it)
JP (1)	JPS52119035A (it)
DE (1)	DE2712537A1 (it)
FR (1)	FR2345787A1 (it)
GB (1)	GB1567508A (it)
IT (1)	IT1076627B (it)
SE (1)	SE408602B (it)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS53134337A (en) *	1977-03-25	1978-11-22	Hitachi Ltd	Sense circuit
JPS5817997B2 (ja) *	1978-03-31	1983-04-11	株式会社日立製作所	メモリシステム
US4208730A (en) *	1978-08-07	1980-06-17	Rca Corporation	Precharge circuit for memory array
DE2926094A1 (de) *	1979-06-28	1981-01-08	Ibm Deutschland	Verfahren und schaltungsanordnung zum entladen von bitleitungskapazitaeten eines integrierten halbleiterspeichers
JPS5621420A (en) *	1979-07-30	1981-02-27	Nec Corp	Programmable logic array
US4308595A (en) *	1979-12-19	1981-12-29	International Business Machines Corporation	Array driver
US4348596A (en) *	1979-12-27	1982-09-07	Rca Corporation	Signal comparison circuit
GB2070372B (en) *	1980-01-31	1983-09-28	Tokyo Shibaura Electric Co	Semiconductor memory device
JPS57150190A (en) *	1981-02-27	1982-09-16	Hitachi Ltd	Monolithic storage device
US4611299A (en) *	1982-02-22	1986-09-09	Hitachi, Ltd.	Monolithic storage device
JPS58147884A (ja) *	1982-02-26	1983-09-02	Toshiba Corp	ダイナミック型半導体記憶装置
JPS58186827A (ja) *	1982-04-23	1983-10-31	Oki Electric Ind Co Ltd	マイクロプロセツサ
JPS5928294A (ja) *	1982-08-06	1984-02-14	Toshiba Corp	半導体記憶装置
US4627032A (en) *	1983-11-25	1986-12-02	At&T Bell Laboratories	Glitch lockout circuit for memory array
JPS60125998A (ja) *	1983-12-12	1985-07-05	Fujitsu Ltd	半導体記憶装置
JPS61123168A (ja) *	1984-11-20	1986-06-11	Fujitsu Ltd	半導体記憶装置
US4758988A (en) *	1985-12-12	1988-07-19	Motorola, Inc.	Dual array EEPROM for high endurance capability
US4831594A (en) *	1986-09-25	1989-05-16	Texas Instrument, Inc.	Process and device for refreshing an array of dynamic memory cells during precharge of the column lines
JPS63237296A (ja) *	1987-03-25	1988-10-03	Toshiba Corp	半導体記憶装置
JPH02246087A (ja) *	1989-03-20	1990-10-01	Hitachi Ltd	半導体記憶装置ならびにその冗長方式及びレイアウト方式
JP2583606B2 (ja) *	1989-05-16	1997-02-19	富士通株式会社	センスアンプ回路
KR930000815B1 (ko) *	1990-02-20	1993-02-05	삼성전자 주식회사	Rom 회로
US5796671A (en) *	1996-03-01	1998-08-18	Wahlstrom; Sven E.	Dynamic random access memory

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US3648071A (en) *	1970-02-04	1972-03-07	Nat Semiconductor Corp	High-speed mos sense amplifier
US3735368A (en) *	1971-06-25	1973-05-22	Ibm	Full capacity monolithic memory utilizing defective storage cells
US3932848A (en) *	1975-01-20	1976-01-13	Intel Corporation	Feedback circuit for allowing rapid charging and discharging of a sense node in a static memory

1976
- 1976-03-22 US US05/668,909 patent/US4044341A/en not_active Expired - Lifetime
1977
- 1977-03-15 SE SE7702938A patent/SE408602B/xx not_active IP Right Cessation
- 1977-03-15 IT IT21264/77A patent/IT1076627B/it active
- 1977-03-17 GB GB11327/77A patent/GB1567508A/en not_active Expired
- 1977-03-22 DE DE19772712537 patent/DE2712537A1/de active Granted
- 1977-03-22 JP JP3201477A patent/JPS52119035A/ja active Granted
- 1977-03-22 FR FR7708555A patent/FR2345787A1/fr active Granted

Also Published As

Publication number	Publication date
FR2345787A1 (fr)	1977-10-21
GB1567508A (en)	1980-05-14
DE2712537A1 (de)	1977-10-06
DE2712537C3 (it)	1978-12-07
JPS571076B2 (it)	1982-01-09
SE7702938L (sv)	1977-09-23
US4044341A (en)	1977-08-23
DE2712537B2 (it)	1978-04-13
FR2345787B1 (it)	1983-03-25
JPS52119035A (en)	1977-10-06
SE408602B (sv)	1979-06-18

Legal Events

Date	Code	Title	Description
1999-10-27	TA	Fee payment date (situation as of event date), data collected since 19931001	Effective date: 19960327

Publication	Publication Date	Title
IT1076627B (it)	1985-04-27	Matrice di memoria
FR2317733A1 (fr)	1977-02-04	Matrice de memoire
IT1079567B (it)	1985-05-13	Memoria perfezionata
IT1114128B (it)	1986-01-27	Spettrometro con matrice di fotodiodi
SE417551B (sv)	1981-03-23	Minnesskyddssystem
NL7712341A (nl)	1978-05-12	Geheugenstelsel.
SE7802625L (sv)	1978-12-10	Halvledarminne
IT1079558B (it)	1985-05-13	Memoria perfezionata
IT1115319B (it)	1986-02-03	Memoria perfezionata
SE7704955L (sv)	1977-10-31	Utokningsbart huvudminne
SE7713502L (sv)	1978-05-31	Ackumulator
NL7809899A (nl)	1979-04-03	Geheugencel.
SE7703769L (sv)	1977-10-03	Infrarodstralare
NL7708974A (nl)	1978-02-20	Geheugenmatrix.
SE422379B (sv)	1982-03-01	Programminne
NL7605024A (nl)	1976-11-16	Matrixgeheugen.
IT1113763B (it)	1986-01-20	Memoria perfezionata
SE7710006L (sv)	1978-03-11	Minnesanordning
NL7808151A (nl)	1979-02-06	Statische geheugencel.
IT1073777B (it)	1985-04-17	Matrice di memoria
NL7709822A (nl)	1978-03-14	Geheugencel.
DK59777A (da)	1977-08-14	Kulde akkumulator
PL199418A1 (pl)	1978-04-24	Urzadzenie pamieci
AT351060B (de)	1979-07-10	Raumzelle
IT1014450B (it)	1977-04-20	Matrice di memoria