FR2535110B1 - Procede d'encapsulation d'un composant semi-conducteur dans un circuit electronique realise sur substrat et application aux circuits integres rapides - Google Patents
Procede d'encapsulation d'un composant semi-conducteur dans un circuit electronique realise sur substrat et application aux circuits integres rapidesInfo
- Publication number
- FR2535110B1 FR2535110B1 FR8217549A FR8217549A FR2535110B1 FR 2535110 B1 FR2535110 B1 FR 2535110B1 FR 8217549 A FR8217549 A FR 8217549A FR 8217549 A FR8217549 A FR 8217549A FR 2535110 B1 FR2535110 B1 FR 2535110B1
- Authority
- FR
- France
- Prior art keywords
- encapsulation
- substrate
- application
- integrated circuits
- electronic circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
- H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
- H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/24227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect not connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the semiconductor or solid-state body being mounted in a cavity or on a protrusion of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01057—Lanthanum [La]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01058—Cerium [Ce]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01076—Osmium [Os]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12043—Photo diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/15165—Monolayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Dispersion Chemistry (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8217549A FR2535110B1 (fr) | 1982-10-20 | 1982-10-20 | Procede d'encapsulation d'un composant semi-conducteur dans un circuit electronique realise sur substrat et application aux circuits integres rapides |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8217549A FR2535110B1 (fr) | 1982-10-20 | 1982-10-20 | Procede d'encapsulation d'un composant semi-conducteur dans un circuit electronique realise sur substrat et application aux circuits integres rapides |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2535110A1 FR2535110A1 (fr) | 1984-04-27 |
FR2535110B1 true FR2535110B1 (fr) | 1986-07-25 |
Family
ID=9278421
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR8217549A Expired FR2535110B1 (fr) | 1982-10-20 | 1982-10-20 | Procede d'encapsulation d'un composant semi-conducteur dans un circuit electronique realise sur substrat et application aux circuits integres rapides |
Country Status (1)
Country | Link |
---|---|
FR (1) | FR2535110B1 (fr) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR900001273B1 (ko) * | 1983-12-23 | 1990-03-05 | 후지쑤 가부시끼가이샤 | 반도체 집적회로 장치 |
DE3534502A1 (de) * | 1985-09-27 | 1987-04-09 | Licentia Gmbh | Verfahren zum herstellen einer klebekontaktierung |
DE3543643A1 (de) * | 1985-12-11 | 1987-06-19 | Licentia Gmbh | Verfahren zum aufbringen eines ic auf ein substrat |
US4843188A (en) * | 1986-03-25 | 1989-06-27 | Western Digital Corporation | Integrated circuit chip mounting and packaging assembly |
NL9000161A (nl) * | 1990-01-23 | 1991-08-16 | Koninkl Philips Electronics Nv | Halfgeleiderinrichting bevattende een drager en werkwijze voor het vervaardigen van de drager. |
US5177595A (en) * | 1990-10-29 | 1993-01-05 | Hewlett-Packard Company | Microchip with electrical element in sealed cavity |
US5608262A (en) * | 1995-02-24 | 1997-03-04 | Lucent Technologies Inc. | Packaging multi-chip modules without wire-bond interconnection |
US6571468B1 (en) | 2001-02-26 | 2003-06-03 | Saturn Electronics & Engineering, Inc. | Traceless flip chip assembly and method |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR1534329A (fr) * | 1966-08-16 | 1968-07-26 | Signetics Corp | Procédé de montage de circuits intégrés |
JPS4947713B1 (fr) * | 1970-04-27 | 1974-12-17 | ||
FR2438339A1 (fr) * | 1978-10-05 | 1980-04-30 | Suisse Horlogerie | Liaison electrique d'un circuit integre |
FR2498814B1 (fr) * | 1981-01-26 | 1985-12-20 | Burroughs Corp | Boitier pour circuit integre, moyen pour le montage et procede de fabrication |
-
1982
- 1982-10-20 FR FR8217549A patent/FR2535110B1/fr not_active Expired
Also Published As
Publication number | Publication date |
---|---|
FR2535110A1 (fr) | 1984-04-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
FR2553576B1 (fr) | Dispositif a circuits integres a semi-conducteurs et procede de fabrication d'un tel dispositif | |
DE3476493D1 (en) | A semiconductor integrated circuit device comprising an mos transistor and a bipolar transistor and a manufacturing method of the same | |
FR2599893B1 (fr) | Procede de montage d'un module electronique sur un substrat et carte a circuit integre | |
FR2532784B1 (fr) | Dispositif a circuits integres a semiconducteurs comprenant une gorge profonde remplie d'un materiau isolant et procede de fabrication d'un tel dispositif | |
FR2533072B1 (fr) | Procede de fabrication de circuits electroniques a base de transistors en couches minces et de condensateurs | |
IT8267548A0 (it) | Procedimento ed apparecchiatura per l esposizione di uno strato di gelatina fotosensibile depositate su un substrato particolarmente per la fabbricazione di dispositivi elettronici a semiconduttori | |
KR860004457A (ko) | 반도체 집적회로장치 및 그의 제조방법과 제조장치 | |
FR2555364B1 (fr) | Procede de fabrication de connexions d'un dispositif a circuits integres a semi-conducteurs comportant en particulier un mitset | |
FR2524707B1 (fr) | Procede d'encapsulation de composants semi-conducteurs, et composants encapsules obtenus | |
FR2533750B1 (fr) | Dispositif electronique, notamment dispositif a circuits integres a semiconducteurs | |
KR840000985A (ko) | 반도체 집적회로 및 그 제조방법 | |
EP0092871A3 (en) | Semiconductor integrated circuits and method of manufacturing | |
JPS56140646A (en) | Method of manufacturing semiconductor circuit on semiconductor silicon substrate | |
FR2614168B1 (fr) | Dispositif a circuits electroniques multicouches et son procede de fabrication | |
FR2550012B1 (fr) | Dispositif a circuits integres a semi-conducteurs | |
EP0248314A3 (fr) | Connexion par soudure de composants électroniques | |
KR860000712A (ko) | 반도체 집적회로 및 그 회로 패턴 설계방법 | |
IT1134845B (it) | Metodo e dispositivo per il montaggio in posizione di componenti elettronici su basette per circuiti | |
DE3677986D1 (de) | Verfahren zur digitalen regelung der flankensteilheit der ausgangssignale von leistungsverstaerkern der fuer einen computer bestimmten halbleiterchips mit hochintegrierten schaltungen. | |
FR2516723B1 (fr) | Dispositif a circuits integres a semi-conducteurs | |
FR2535110B1 (fr) | Procede d'encapsulation d'un composant semi-conducteur dans un circuit electronique realise sur substrat et application aux circuits integres rapides | |
FR2588121B1 (fr) | Procede et dispositif de soudage d'elements sur les plots correspondants d'une plaquette telle que notamment une plaquette de circuits integres de haute densite | |
DE3482719D1 (de) | Halbleiterelement und herstellungsverfahren. | |
FR2531812B1 (fr) | Dispositif a circuits integres a semiconducteurs du type " bi-cmos-ic " et son procede de fabrication | |
KR860005450A (ko) | 반도체 집적 회로장치 및 그의 제조방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |