FR2614168B1 - Dispositif a circuits electroniques multicouches et son procede de fabrication - Google Patents
Dispositif a circuits electroniques multicouches et son procede de fabricationInfo
- Publication number
- FR2614168B1 FR2614168B1 FR8804965A FR8804965A FR2614168B1 FR 2614168 B1 FR2614168 B1 FR 2614168B1 FR 8804965 A FR8804965 A FR 8804965A FR 8804965 A FR8804965 A FR 8804965A FR 2614168 B1 FR2614168 B1 FR 2614168B1
- Authority
- FR
- France
- Prior art keywords
- manufacturing
- electronic circuit
- circuit device
- layered electronic
- layered
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4867—Applying pastes or inks, e.g. screen printing
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/145—Organic substrates, e.g. plastic
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
- H01L23/49883—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials the conductive materials containing organic materials or pastes, e.g. for thick films
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/24227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect not connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the semiconductor or solid-state body being mounted in a cavity or on a protrusion of the item
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01023—Vanadium [V]
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01032—Germanium [Ge]
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01052—Tellurium [Te]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01057—Lanthanum [La]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01058—Cerium [Ce]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01061—Promethium [Pm]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01075—Rhenium [Re]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62092290A JP2579937B2 (ja) | 1987-04-15 | 1987-04-15 | 電子回路装置およびその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2614168A1 FR2614168A1 (fr) | 1988-10-21 |
FR2614168B1 true FR2614168B1 (fr) | 1994-07-22 |
Family
ID=14050279
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR8804965A Expired - Fee Related FR2614168B1 (fr) | 1987-04-15 | 1988-04-14 | Dispositif a circuits electroniques multicouches et son procede de fabrication |
Country Status (3)
Country | Link |
---|---|
US (1) | US5049980A (fr) |
JP (1) | JP2579937B2 (fr) |
FR (1) | FR2614168B1 (fr) |
Families Citing this family (40)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01251778A (ja) * | 1988-03-31 | 1989-10-06 | Toshiba Corp | Icカード |
DE4009225A1 (de) * | 1990-03-22 | 1991-09-26 | Bosch Gmbh Robert | Verfahren zum herstellen von streifenleitern, insbesondere fuer elektronische hybrid-schaltungen im hochfrequenzbereich |
DE4115043A1 (de) * | 1991-05-08 | 1997-07-17 | Gen Electric | Dichtgepackte Verbindungsstruktur, die eine Kammer enthält |
DE69125210T2 (de) * | 1990-05-31 | 1997-08-07 | Canon Kk | Verfahren zur Herstellung einer Halbleitervorrichtung mit einer Verdrahtungsstruktur hoher Dichte |
US5241456A (en) * | 1990-07-02 | 1993-08-31 | General Electric Company | Compact high density interconnect structure |
JPH06502744A (ja) * | 1991-03-27 | 1994-03-24 | インテグレイテッド システム アセンブリース コーポレーション | マルチチップ集積回路パッケージ及びモジュール |
US5250843A (en) * | 1991-03-27 | 1993-10-05 | Integrated System Assemblies Corp. | Multichip integrated circuit modules |
US5185391A (en) * | 1991-11-27 | 1993-02-09 | The Dow Chemical Company | Oxidation inhibited arylcyclobutene polymers |
US5353498A (en) * | 1993-02-08 | 1994-10-11 | General Electric Company | Method for fabricating an integrated circuit module |
JP2792532B2 (ja) | 1994-09-30 | 1998-09-03 | 日本電気株式会社 | 半導体装置の製造方法及び半導体ウエハー |
US5841193A (en) * | 1996-05-20 | 1998-11-24 | Epic Technologies, Inc. | Single chip modules, repairable multichip modules, and methods of fabrication thereof |
JPH10319875A (ja) * | 1997-05-20 | 1998-12-04 | Sony Corp | プラズマアドレス表示装置の製造方法 |
TW431117B (en) * | 1998-09-30 | 2001-04-21 | Koninkl Philips Electronics Nv | Method and device for manufacturing an electroluminescent display screen |
US6228687B1 (en) * | 1999-06-28 | 2001-05-08 | Micron Technology, Inc. | Wafer-level package and methods of fabricating |
JP4441974B2 (ja) * | 2000-03-24 | 2010-03-31 | ソニー株式会社 | 半導体装置の製造方法 |
JP4403631B2 (ja) * | 2000-04-24 | 2010-01-27 | ソニー株式会社 | チップ状電子部品の製造方法、並びにその製造に用いる擬似ウエーハの製造方法 |
US20020020898A1 (en) * | 2000-08-16 | 2002-02-21 | Vu Quat T. | Microelectronic substrates with integrated devices |
US6707149B2 (en) * | 2000-09-29 | 2004-03-16 | Tessera, Inc. | Low cost and compliant microelectronic packages for high i/o and fine pitch |
US20020070443A1 (en) * | 2000-12-08 | 2002-06-13 | Xiao-Chun Mu | Microelectronic package having an integrated heat sink and build-up layers |
US20020175402A1 (en) * | 2001-05-23 | 2002-11-28 | Mccormack Mark Thomas | Structure and method of embedding components in multi-layer substrates |
JP2005515616A (ja) * | 2001-09-28 | 2005-05-26 | シーメンス アクチエンゲゼルシヤフト | 基板の電気的コンタクト面の接続方法及び電気的コンタクト面を備えた基板からなるデバイス |
US6706624B1 (en) * | 2001-10-31 | 2004-03-16 | Lockheed Martin Corporation | Method for making multichip module substrates by encapsulating electrical conductors |
TW544882B (en) | 2001-12-31 | 2003-08-01 | Megic Corp | Chip package structure and process thereof |
TW503496B (en) | 2001-12-31 | 2002-09-21 | Megic Corp | Chip packaging structure and manufacturing process of the same |
TW584950B (en) | 2001-12-31 | 2004-04-21 | Megic Corp | Chip packaging structure and process thereof |
US6673698B1 (en) | 2002-01-19 | 2004-01-06 | Megic Corporation | Thin film semiconductor package utilizing a glass substrate with composite polymer/metal interconnect layers |
US7423336B2 (en) * | 2002-04-08 | 2008-09-09 | Micron Technology, Inc. | Bond pad rerouting element, rerouted semiconductor devices including the rerouting element, and assemblies including the rerouted semiconductor devices |
DE10240460A1 (de) * | 2002-08-29 | 2004-03-11 | Infineon Technologies Ag | Universelles Halbleitergehäuse mit vorvernetzten Kunststoffeinbettmassen und Verfahren zur Herstellung desselben |
DE10255520B4 (de) * | 2002-11-28 | 2007-12-27 | Infineon Technologies Ag | Verfahren zur elektrischen Kontaktierung mittels gefüllter Flüssigkeiten und elektronische Bauteile mit derartiger Kontaktierung |
DE10348620A1 (de) * | 2003-10-15 | 2005-06-02 | Infineon Technologies Ag | Halbleitermodul mit Gehäusedurchkontakten |
US8067253B2 (en) * | 2005-12-21 | 2011-11-29 | Avery Dennison Corporation | Electrical device and method of manufacturing electrical devices using film embossing techniques to embed integrated circuits into film |
TW200836315A (en) * | 2007-02-16 | 2008-09-01 | Richtek Techohnology Corp | Electronic package structure and method thereof |
TWI360207B (en) | 2007-10-22 | 2012-03-11 | Advanced Semiconductor Eng | Chip package structure and method of manufacturing |
US8569894B2 (en) | 2010-01-13 | 2013-10-29 | Advanced Semiconductor Engineering, Inc. | Semiconductor package with single sided substrate design and manufacturing methods thereof |
JP2011171604A (ja) * | 2010-02-19 | 2011-09-01 | Oki Semiconductor Co Ltd | 電子部品製造方法、電子部品製造装置及び感光性レジスト |
TWI411075B (zh) | 2010-03-22 | 2013-10-01 | Advanced Semiconductor Eng | 半導體封裝件及其製造方法 |
US8941222B2 (en) | 2010-11-11 | 2015-01-27 | Advanced Semiconductor Engineering Inc. | Wafer level semiconductor package and manufacturing methods thereof |
US9406658B2 (en) | 2010-12-17 | 2016-08-02 | Advanced Semiconductor Engineering, Inc. | Embedded component device and manufacturing methods thereof |
JP6213747B2 (ja) * | 2013-09-26 | 2017-10-18 | 株式会社村田製作所 | 電子部品の製造方法、及び電子部品の製造装置 |
US10446521B2 (en) * | 2017-11-07 | 2019-10-15 | Taiwan Semiconductor Manufacturing Co., Ltd. | Integrated fan-out package and method of fabricating an integrated fan-out package |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1301378B (de) * | 1966-03-30 | 1969-08-21 | Ibm | Verfahren zur Herstellung vielschichtiger elektrischer Schaltungselemente auf keramischer Basis |
DE2202077A1 (de) * | 1971-05-17 | 1972-11-30 | Hochvakuum Dresden Veb | Verfahren zur Herstellung von Mehrlagenleiterplatten |
US4544989A (en) * | 1980-06-30 | 1985-10-01 | Sharp Kabushiki Kaisha | Thin assembly for wiring substrate |
US4417393A (en) * | 1981-04-01 | 1983-11-29 | General Electric Company | Method of fabricating high density electronic circuits having very narrow conductors |
FR2527036A1 (fr) * | 1982-05-14 | 1983-11-18 | Radiotechnique Compelec | Procede pour connecter un semiconducteur a des elements d'un support, notamment d'une carte portative |
GB8412606D0 (en) * | 1984-05-17 | 1984-06-20 | Murray J | Printed circuit boards |
-
1987
- 1987-04-15 JP JP62092290A patent/JP2579937B2/ja not_active Expired - Lifetime
-
1988
- 1988-04-14 US US07/181,526 patent/US5049980A/en not_active Expired - Fee Related
- 1988-04-14 FR FR8804965A patent/FR2614168B1/fr not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US5049980A (en) | 1991-09-17 |
JPS63258055A (ja) | 1988-10-25 |
JP2579937B2 (ja) | 1997-02-12 |
FR2614168A1 (fr) | 1988-10-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |
Effective date: 20061230 |