ES8202470A1 - Un procedimiento para fabricar una placa de circuito impresomultiple hueca - Google Patents
Un procedimiento para fabricar una placa de circuito impresomultiple huecaInfo
- Publication number
- ES8202470A1 ES8202470A1 ES499462A ES499462A ES8202470A1 ES 8202470 A1 ES8202470 A1 ES 8202470A1 ES 499462 A ES499462 A ES 499462A ES 499462 A ES499462 A ES 499462A ES 8202470 A1 ES8202470 A1 ES 8202470A1
- Authority
- ES
- Spain
- Prior art keywords
- substrates
- pct
- wiring board
- printed wiring
- multilayer printed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
- H05K3/462—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar double-sided circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0272—Adaptations for fluid transport, e.g. channels, holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
- H05K1/053—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an inorganic insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0364—Conductor shape
- H05K2201/0379—Stacked conductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09536—Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/096—Vertically aligned vias, holes or stacked vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0315—Oxidising metal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/426—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Laminated Bodies (AREA)
- Structure Of Printed Boards (AREA)
Abstract
PROCEDIMIENTO PARA FABRICAR UNA PLACA DE CIRCUITO IMPRESO MULTIPLE HUECA. SE PREPARAN UNA PLURALIDAD DE SUSTRATOS DE RESINA SINTETICA ORGANICA TERMICAMENTE RESISTENTE, TENIENDO CADA SUSTRATO UN DISEÑO DE DISTRIBUCION DE CONDUCTORES DE SEÑAL EN UNA DE SUS CARAS Y UN DISEÑO DE DISTRIBUCION DE CONDUCTORES DE PASTILLA TAMBIEN EN UNA DE SUS CARAS, Y TENIENDO UNA CAPA DE METAL DE BAJO PUNTO DE FUSION EN DICHO DISEÑO DE CONDUCTORES. SE SUPERPONEN LOS SUSTRATOS Y SE APLICA PRESION Y CALOR SUFICIENTES PARA ADHERIR POR FUSION LOS SUSTRATOS CONTIGUOS. SE PRACTICAN UNOS TALADROS EN LOS DISEÑOS DE CONDUCTORES DE PASTILLA ADHERIDOS POR FUSION Y SE FORMAN UNAS CAPAS CONDUCTORAS DE REVESTIMIENTO O METALIZACION EN LAS PAREDES INTERNAS DE LOS TALADROS PASANTES, HASTA COMPLETAR UNOS TALADROS TOTALMENTE METALIZADOS QUE SIRVAN DE CONEXION ENTRE LOS DOS O MAS DISEÑOS CONDUCTORES DE SEÑAL DE LOS SUSTRATOS SUPERPUESTOS.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6432979A JPS55156395A (en) | 1979-05-24 | 1979-05-24 | Method of fabricating hollow multilayer printed board |
Publications (2)
Publication Number | Publication Date |
---|---|
ES499462A0 ES499462A0 (es) | 1982-01-16 |
ES8202470A1 true ES8202470A1 (es) | 1982-01-16 |
Family
ID=13255083
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES499461A Expired ES8202469A1 (es) | 1979-05-24 | 1981-02-16 | Un procedimiento para fabricar una placa de circuito impresomultiple hueca |
ES499462A Expired ES8202470A1 (es) | 1979-05-24 | 1981-02-16 | Un procedimiento para fabricar una placa de circuito impresomultiple hueca |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES499461A Expired ES8202469A1 (es) | 1979-05-24 | 1981-02-16 | Un procedimiento para fabricar una placa de circuito impresomultiple hueca |
Country Status (7)
Country | Link |
---|---|
US (2) | US4368503A (es) |
EP (1) | EP0028657B1 (es) |
JP (1) | JPS55156395A (es) |
CA (1) | CA1149518A (es) |
DE (1) | DE3072112D1 (es) |
ES (2) | ES8202469A1 (es) |
WO (1) | WO1980002633A1 (es) |
Families Citing this family (78)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55156395A (en) * | 1979-05-24 | 1980-12-05 | Fujitsu Ltd | Method of fabricating hollow multilayer printed board |
US4354895A (en) * | 1981-11-27 | 1982-10-19 | International Business Machines Corporation | Method for making laminated multilayer circuit boards |
US4551747A (en) * | 1982-10-05 | 1985-11-05 | Mayo Foundation | Leadless chip carrier apparatus providing for a transmission line environment and improved heat dissipation |
US4551746A (en) * | 1982-10-05 | 1985-11-05 | Mayo Foundation | Leadless chip carrier apparatus providing an improved transmission line environment and improved heat dissipation |
JPS6047495A (ja) * | 1983-08-25 | 1985-03-14 | 株式会社日立製作所 | セラミツク配線基板 |
DE3412290A1 (de) * | 1984-04-03 | 1985-10-03 | System Kontakt Gesellschaft für elektronische Bauelemente mbH, 7107 Bad Friedrichshall | Mehrlagige leiterplatte in multilayer- oder stapeltechnik |
FR2565760B1 (fr) * | 1984-06-08 | 1988-05-20 | Aerospatiale | Procede pour la realisation d'un circuit imprime et circuit imprime obtenu par la mise en oeuvre dudit procede |
US4654472A (en) * | 1984-12-17 | 1987-03-31 | Samuel Goldfarb | Electronic component package with multiconductive base forms for multichannel mounting |
US4685210A (en) * | 1985-03-13 | 1987-08-11 | The Boeing Company | Multi-layer circuit board bonding method utilizing noble metal coated surfaces |
EP0204568A3 (en) * | 1985-06-05 | 1988-07-27 | Harry Arthur Hele Spence-Bate | Low power circuitry components |
JPS6284973U (es) * | 1985-11-19 | 1987-05-30 | ||
AU612588B2 (en) * | 1986-08-15 | 1991-07-18 | Digital Equipment Corporation | Method of making high density interconnection substrates using stacked modules and substrates obtained |
JPS63229897A (ja) * | 1987-03-19 | 1988-09-26 | 古河電気工業株式会社 | リジツド型多層プリント回路板の製造方法 |
JPH0510783Y2 (es) * | 1987-12-01 | 1993-03-16 | ||
DE3813364A1 (de) * | 1988-04-21 | 1989-11-02 | Bodenseewerk Geraetetech | Vorrichtung zur waermeabfuhr von bauelementen auf einer leiterplatte |
US5354695A (en) * | 1992-04-08 | 1994-10-11 | Leedy Glenn J | Membrane dielectric isolation IC fabrication |
US5031308A (en) * | 1988-12-29 | 1991-07-16 | Japan Radio Co., Ltd. | Method of manufacturing multilayered printed-wiring-board |
DE69015878T2 (de) * | 1989-04-17 | 1995-07-13 | Ibm | Mehrschichtleiterplattenstruktur. |
US5030499A (en) * | 1989-12-08 | 1991-07-09 | Rockwell International Corporation | Hermetic organic/inorganic interconnection substrate for hybrid circuit manufacture |
US5123164A (en) * | 1989-12-08 | 1992-06-23 | Rockwell International Corporation | Hermetic organic/inorganic interconnection substrate for hybrid circuit manufacture |
JP2510747B2 (ja) * | 1990-02-26 | 1996-06-26 | 株式会社日立製作所 | 実装基板 |
US5079619A (en) * | 1990-07-13 | 1992-01-07 | Sun Microsystems, Inc. | Apparatus for cooling compact arrays of electronic circuitry |
US5132879A (en) * | 1990-10-01 | 1992-07-21 | Hewlett-Packard Company | Secondary board for mounting of components having differing bonding requirements |
US5129142A (en) * | 1990-10-30 | 1992-07-14 | International Business Machines Corporation | Encapsulated circuitized power core alignment and lamination |
US6714625B1 (en) | 1992-04-08 | 2004-03-30 | Elm Technology Corporation | Lithography device for semiconductor circuit pattern generation |
US5454161A (en) * | 1993-04-29 | 1995-10-03 | Fujitsu Limited | Through hole interconnect substrate fabrication process |
JP3198796B2 (ja) * | 1993-06-25 | 2001-08-13 | 富士電機株式会社 | モールドモジュール |
US5359767A (en) * | 1993-08-26 | 1994-11-01 | International Business Machines Corporation | Method of making multilayered circuit board |
US5590460A (en) * | 1994-07-19 | 1997-01-07 | Tessera, Inc. | Method of making multilayer circuit |
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US6286204B1 (en) * | 1998-03-09 | 2001-09-11 | Sarnoff Corporation | Method for fabricating double sided ceramic circuit boards using a titanium support substrate |
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US9173811B2 (en) | 2011-09-29 | 2015-11-03 | Valencia Technologies Corporation | Implantable electroacupuncture system and method for treating depression and similar mental conditions |
US9198828B2 (en) | 2011-09-29 | 2015-12-01 | Valencia Technologies Corporation | Implantable electroacupuncture device and method for treating depression, bipolar disorder and anxiety |
US9433786B2 (en) | 2012-03-06 | 2016-09-06 | Valencia Technologies Corporation | Implantable electroacupuncture system and method for treating Parkinson's disease and essential tremor |
US8942816B2 (en) | 2012-03-06 | 2015-01-27 | Valencia Technologies Corporation | Implantable electroacupuncture device and method for treating dyslipidemia |
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US9827421B2 (en) | 2012-03-12 | 2017-11-28 | Valencia Technologies Corporation | Methods and systems for treating a chronic low back pain condition using an implantable electroacupuncture device |
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-
1979
- 1979-05-24 JP JP6432979A patent/JPS55156395A/ja active Granted
-
1980
- 1980-05-23 DE DE8080900951T patent/DE3072112D1/de not_active Expired
- 1980-05-23 US US06/229,594 patent/US4368503A/en not_active Expired - Lifetime
- 1980-05-23 WO PCT/JP1980/000111 patent/WO1980002633A1/ja active IP Right Grant
- 1980-05-26 CA CA000352692A patent/CA1149518A/en not_active Expired
- 1980-12-01 EP EP80900951A patent/EP0028657B1/en not_active Expired
-
1981
- 1981-02-16 ES ES499461A patent/ES8202469A1/es not_active Expired
- 1981-02-16 ES ES499462A patent/ES8202470A1/es not_active Expired
-
1982
- 1982-06-29 US US06/393,324 patent/US4528072A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0028657A4 (en) | 1982-11-08 |
ES499461A0 (es) | 1982-01-16 |
WO1980002633A1 (en) | 1980-11-27 |
DE3072112D1 (en) | 1988-09-15 |
EP0028657B1 (en) | 1988-08-10 |
US4368503A (en) | 1983-01-11 |
JPS5739559B2 (es) | 1982-08-21 |
CA1149518A (en) | 1983-07-05 |
ES499462A0 (es) | 1982-01-16 |
EP0028657A1 (en) | 1981-05-20 |
US4528072A (en) | 1985-07-09 |
JPS55156395A (en) | 1980-12-05 |
ES8202469A1 (es) | 1982-01-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FD1A | Patent lapsed |
Effective date: 20000601 |