EP1720311A1 - Synchronisierung in digitalen Kommunikationssystemen - Google Patents

Synchronisierung in digitalen Kommunikationssystemen Download PDF

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Publication number
EP1720311A1
EP1720311A1 EP06017798A EP06017798A EP1720311A1 EP 1720311 A1 EP1720311 A1 EP 1720311A1 EP 06017798 A EP06017798 A EP 06017798A EP 06017798 A EP06017798 A EP 06017798A EP 1720311 A1 EP1720311 A1 EP 1720311A1
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EP
European Patent Office
Prior art keywords
reference symbol
synchronisation
correlation
transmitted
anyone
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP06017798A
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English (en)
French (fr)
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EP1720311B1 (de
Inventor
Thomas Dölle
Tino Konschak
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Sony Deutschland GmbH
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Sony Deutschland GmbH
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Filing date
Publication date
Application filed by Sony Deutschland GmbH filed Critical Sony Deutschland GmbH
Priority to EP10181207.1A priority Critical patent/EP2259534B1/de
Priority to EP14173216.4A priority patent/EP2782307B1/de
Publication of EP1720311A1 publication Critical patent/EP1720311A1/de
Application granted granted Critical
Publication of EP1720311B1 publication Critical patent/EP1720311B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/26Systems using multi-frequency codes
    • H04L27/2601Multicarrier modulation systems
    • H04L27/2647Arrangements specific to the receiver only
    • H04L27/2655Synchronisation arrangements
    • H04L27/2662Symbol synchronisation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/26Systems using multi-frequency codes
    • H04L27/2601Multicarrier modulation systems
    • H04L27/2602Signal structure
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/26Systems using multi-frequency codes
    • H04L27/2601Multicarrier modulation systems
    • H04L27/2647Arrangements specific to the receiver only
    • H04L27/2655Synchronisation arrangements
    • H04L27/2657Carrier synchronisation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/26Systems using multi-frequency codes
    • H04L27/2601Multicarrier modulation systems
    • H04L27/2647Arrangements specific to the receiver only
    • H04L27/2655Synchronisation arrangements
    • H04L27/2668Details of algorithms
    • H04L27/2673Details of algorithms characterised by synchronisation parameters
    • H04L27/2675Pilot or known symbols
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/04Speed or phase control by synchronisation signals
    • H04L7/041Speed or phase control by synchronisation signals using special codes as synchronising signal

Definitions

  • the present invention relates generally to the synchronisation of digital communication systems.
  • Digital communication systems generally need a synchronisation of a transmitting side with a receiving side, i.e. a synchronisation of the timing and the frequency.
  • a synchronisation of the timing and the frequency For example the symbol timing of a FFT-unit has to be synchronised.
  • a special training sequence or a reference symbol usually is embedded into the transmission data structure, as it is shown for example in fig. 5.
  • Fig. 5 shows the transmission frame, also called the burst structure, of a known technique, wherein a frame consists of F symbols.
  • the reference symbol is inserted in front of a sequence of data symbols. Between the reference symbol and the first data symbol as well as between the following data symbols a so-called guard interval can be inserted in order to avoid inter symbol interference (ISI) in a multipath environment.
  • ISI inter symbol interference
  • a time domain correlation between the received signal containing the reference symbol and a delayed version of the received signal is effected to identify the reference symbol and thus to determine the timing for the synchronisation.
  • the time of the correlation peak is used which should correspond as accurate as possible to the time of the last sample of the reference symbol.
  • the reference symbol can consist of a plurality of synchronisation patterns (SP) which are repeated several times in one symbol period.
  • Fig. 6 shows the time domain structure of the reference symbol of length N which consists of (N/N sp ) copies of the synchronisation pattern.
  • a very efficient way of generating symbols of the desired structure e.g. in an OFDM transmission system, is the application of an IFFT (inverse fast Fourier transformation) exploiting the properties of the DFT (Discrete Fourier Transformation) algorithm. Consequently in order to generate a reference symbol of lenght T s with (N/N sp ) synchronization patterns of length T s *(N sp /N), only every (N/N sp )-th DFT coefficient (every (N/N sp )-th subcarrier in frequency domain) has to be modulated.
  • IFFT inverse fast Fourier transformation
  • N represents the total number of samples within one reference symbol (and thus the time duration of the reference symbol)
  • N sp represents the number of samples within a single synchronisation pattern
  • N guard represents the number of samples of the guard period that may be inserted in order to avoid intersymbol interference (ISI).
  • ISI intersymbol interference
  • the received signal is at first multiplied with a complex-conjugated version of itself and then the samples of the correlation window are summed up.
  • Fig. 7 shows the block diagram of a possible implementation for a time correlation expressed mathematically in equation (1).
  • the incoming data are mixed (multiplied) with data, which have been delayed 30 by N sp (duration of one synchronisation pattern) and which have been complex-conjugated 31.
  • the mixed data are given on the one hand to an adder 36 and on the other hand to a delay circuit 33 providing for a delay of (N + N guard - N sp ).
  • the output from the delay circuit 33 is subtracted 34 from the output of the adder 36.
  • the output of the subtraction circuit 34 is delayed 35 by one unit and then set back to the adder 36.
  • the received signal is therefore correlated to a (by the duration of a synchronisation pattern) delayed version of itself.
  • the correlation result is summed in a certain time window (correlation window) with the duration of N + N guard - N sp .
  • the output R(i) of the subtraction circuit 34 is given to a non shown maximum detection circuit detecting the maximum of
  • This timing information can then be used for the symbol timing of the receiver.
  • the sum of equation (1) is a fully constructive superposition of its addends, thus resulting in a peak of
  • the detection of this peak allows to determine the correct symbol timing of the receiver.
  • the maximum detection of the correlation result R(i) is performed only for synchronisation symbols in this case.
  • the decision whether the current symbol is a reference symbol is based on a pre-set correlation threshold. If
  • Fig. 8 shows the different phases during a correlation process according to the prior art which have to be considered when the correlation window "slides" over the received signal.
  • the correlation window moves into the reference symbol and the correlation result is increasing until it reaches the pre-set detection threshold R x . If
  • the correlation peak is offset in time, if the first time samples of the data symbol that is received directly after a reference symbol or the last time samples of the data symbol that is received immediately before a reference symbol cause a constructive contribution to the correlation sum in equation (1). In that case a timing estimation error is introduced into the system which is likely to degrade the bit error rate (BER).
  • BER bit error rate
  • the maximum correlation peak will be displaced to the right in fig. 8. In case the last data samples of the data symbol immediately preceding the received reference symbol cause a constructive contribution, the maximum correlation peak will be displaced to the left in fig. 8.
  • the known synchronisation algorithm suffers from the drawback that even without taking account of noise and multipath effects the timing of the last sample of the reference symbol to be determined by the maximum correlation peak can not be detected precisely in all situations.
  • the random-like correlation between reference and data symbols and thus the random-like constructive contribution of data symbols has to be avoided.
  • this objective can be achieved by introducing a deterministic and unique differentiation between the reference and data symbols. Therefore, the reference symbol has to be modified in such a way that a constructive contribution of data samples of adjacent symbols to the correlation sum result is avoided.
  • the synchronisation precision can be enhanced. This results in a significantly improved precision of the timing and the frequency synchronisation.
  • a method for synchronising digital communication systems wherein a reference symbol is provided consisting of a sequence of a plurality of synchronisation patterns, wherein the reference symbol is modulated on a RF-frequency.
  • the transmitted reference symbol is correlated with a delayed reference symbol to detect a correlation peak. This peak can be used for timing and frequency synchronisation.
  • at least the last and/or the first of the plurality of synchronisation patterns or a part or a multiple of the last and/or the first of the plurality of synchronisation patterns of said reference symbol is phase shifted before the transmission step.
  • the reference symbol can be transmitted using OFDM (orthogonal frequency division multiplexing).
  • the power of the reference symbol can be increased in time domain to compensate for the unmodulated subcarriers.
  • the result of the correlation can be used to derive the frequency offset.
  • the reference symbol to be transmitted can be multiplexed with data symbols in the frequency domain. This is advantageous to avoid additional implementation effort for the insertion of the synchronisation symbol in the time domain which is usually larger than in the frequency domain.
  • a cyclic extension can be inserted between two successive symbols to transmitted thereby avoiding intersymbol interference (ISI).
  • ISI intersymbol interference
  • the phase of at least the last and/or the first synchronisation pattern or a part or a multiple thereof can be shifted e.g. by 180°.
  • a digital communication system comprising means for transmitting the reference symbol consisting of the sequence of a plurality of synchronisation patterns and followed by data symbols, wherein the reference symbol is modulated on a RF-frequency. Furthermore, means are provided for correlating the transmitted reference symbol with a delayed reference symbol to detect a correlation peak. According to the present invention said transmitting means comprises means for shifting the phase of at least the last and/or the first of the plurality of synchronisation patterns or a part or a multiple thereof of a reference symbol.
  • the transmitting means and the receiving means can use a OFDM-system to transmit the reference symbol.
  • Modulation means can be provided modulating only every (N/N sp )-th subcarrier when generating the reference symbol.
  • Adjusting means can be provided increasing the transmission power when transmitting the reference symbol.
  • Frequency acquisition means can be provided using the result of the correlation to derive a frequency offset of the receiving side of the system.
  • a multiplexer can be provided inserting the reference symbol in a data symbol stream in the frequency domain.
  • Means for inserting a cyclic extension between two successive symbols to be transmitted can be provided.
  • the reference symbol is modified in such a way that the last synchronization pattern of the reference symbol is phase shifted, e.g. by 180°.
  • the random contribution of the adjacent data symbols (immediately preceding or following the reference symbol) to the correlation is thus eliminated.
  • the guard interval is achieved by a cyclic extension of each symbol by copying the last N guard samples.
  • the black synchronisation pattern in fig. 1 shows symbolically a synchronisation pattern which phase has been shifted e.g. by 180°.
  • the correlation window according to the present invention is smaller than according to the prior art by the length of the cyclic extension and the phase shifted pattern.
  • the correlation peak is offset into the reference symbol. This results in a slightly decreased magnitude of the correlation peak.
  • the phase shifting of the last synchronisation pattern of a reference symbol guarantees a deterministic destructive contribution of said synchronisation pattern and thus that the maximum detection peak will not be offset to the right of fig. 2.
  • the deterministic destructive contribution of the first phase shifted synchronisation pattern guarantees that the maximum detection peak will not be displaced to the left-hand side of fig. 2.
  • phase 2 the correlation peak is reached.
  • the phase shift of the last synchronisation pattern introduces a deterministic destructive contribution to the correlation sum at the boarder of the correlation window.
  • the maximum of the correlation sum is thus offset inside the reference symbol by the number of samples which have been phase shifted, e.g. one synchronisation pattern as shown in fig.1.
  • ⁇ offset 2 ⁇ ⁇ f o ⁇ f u ⁇ N sp N wherein f 0 is the frequency offset and ⁇ f u is the subcarrier distance in frequency domain.
  • Fig. 3 shows the functional block diagram of the proposed transmitting system structure for the advanced timing acquisition.
  • the data to be transmitted are given to a channel encoder 1.
  • the output of the channel encoder 1 is given to a synchronisation symbol insertion circuit 2.
  • the reference symbols from a memory 4 are multiplexed by a multiplexer 3 with the data to be transmitted.
  • the output from the synchronisation symbol insertion circuit 2 is given to a OFDM burst mode controller 5.
  • the output from the OFDM burst mode controller 5 is given to an inverse FFT-circuit 6.
  • the output from the inverse FFT-circuit 6 is given to a synchronisation power adjustment circuit 7.
  • the synchronisation pattern rotation circuit 8 contains a circuit 9 for extracting the last synchronisation pattern of a reference symbol, a phase shifter 10 and a combining circuit 10 combining the phase shifted last synchronisation pattern of a reference symbol with the other synchronisation patterns of the same symbol.
  • the output of the synchronisation pattern rotation circuit 8 is given to a circuit 12 inserting a cyclic extension.
  • the data stream containing the data to be transmitted as well as the reference symbols is modulated by a modulator 13 on a RF-frequency.
  • the data to be transmitted is given to a RF-front-end stage 15.
  • the synchronisation symbols are inserted in the frequency domain to avoid the generally large implementation effort when inserting in the time domain.
  • the last synchronisation pattern is rotated by 180°, which is realised through a multiplication by -1 and the synchronisation pattern rotation circuit 8.
  • the complex signal is converted into a real signal through the IQ-modulator 13, it is passed to the TX-RF-front-end stage 15.
  • the received data from a RF-front-end stage 16 of the receiver are given to an IQ-demodulator 17.
  • the complex output signal from the IQ-demodulator 17 is given to a synchronisation circuit 18.
  • the synchronisation circuit 18 comprises a timing acquisition circuit 19 and, among others, a frequency acquisition circuit 24. As it is shown in fig. 4 a part of the internal structure from the timing acquisition circuit 19 corresponds to the correlator as it is shown in fig. 7.
  • the incoming data are mixed (multiplied) with data, which have been delayed 30 by N sp (duration of one synchronisation pattern) and which have been complex-conjugated 31.
  • the mixed data are given on the one hand to an adder 36 and on the other hand to a delay circuit 33 providing for a delay of (N - 2 * N sp ) with respect to the new advanced structure of the reference symbol.
  • the output from the delay circuit 33 is subtracted 34 from the output of the adder 36.
  • the output of the subtraction circuit 34 is delayed 35 by one unit and then set back to the adder 36.
  • the invention therefore entirely eliminates the effects of random contribution of adjacent data symbols to a correlation based synchronisation algorithm.
  • the correlation peak which is used to determine the symbol timing, is offset inside the reference symbol. The precision of the timing error estimation is thus improved significantly.
  • the present invention can particularly be applied on OFDM-systems.
  • Technical fields for the application are f.e. high data rate wireless ATM systems, WHN (wireless home network) and WLAN type applications.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
EP06017798A 1997-11-05 1997-11-05 Synchronisierung in digitalen Kommunikationssystemen Expired - Lifetime EP1720311B1 (de)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP10181207.1A EP2259534B1 (de) 1997-11-05 1997-11-05 Synchronisierung in digitalen Kommunikationssystemen
EP14173216.4A EP2782307B1 (de) 1997-11-05 1997-11-05 Synchronisierung in digitalen Kommunikationssystemen

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP97119351A EP0915597B1 (de) 1997-11-05 1997-11-05 Synchronisierung in digitalen Kommunikationssystemen

Related Parent Applications (2)

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EP97119351.1 Division 1997-11-05
EP97119351A Division EP0915597B1 (de) 1997-11-05 1997-11-05 Synchronisierung in digitalen Kommunikationssystemen

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EP10181207.1A Division EP2259534B1 (de) 1997-11-05 1997-11-05 Synchronisierung in digitalen Kommunikationssystemen
EP14173216.4A Division EP2782307B1 (de) 1997-11-05 1997-11-05 Synchronisierung in digitalen Kommunikationssystemen
EP10181207.1 Division-Into 2010-09-28

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EP1720311A1 true EP1720311A1 (de) 2006-11-08
EP1720311B1 EP1720311B1 (de) 2011-06-01

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EP10181207.1A Expired - Lifetime EP2259534B1 (de) 1997-11-05 1997-11-05 Synchronisierung in digitalen Kommunikationssystemen
EP06017798A Expired - Lifetime EP1720311B1 (de) 1997-11-05 1997-11-05 Synchronisierung in digitalen Kommunikationssystemen
EP97119351A Expired - Lifetime EP0915597B1 (de) 1997-11-05 1997-11-05 Synchronisierung in digitalen Kommunikationssystemen
EP14173216.4A Expired - Lifetime EP2782307B1 (de) 1997-11-05 1997-11-05 Synchronisierung in digitalen Kommunikationssystemen

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EP97119351A Expired - Lifetime EP0915597B1 (de) 1997-11-05 1997-11-05 Synchronisierung in digitalen Kommunikationssystemen
EP14173216.4A Expired - Lifetime EP2782307B1 (de) 1997-11-05 1997-11-05 Synchronisierung in digitalen Kommunikationssystemen

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US (1) US6160821A (de)
EP (4) EP2259534B1 (de)
JP (1) JPH11215097A (de)
DE (1) DE69737353T2 (de)

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EP1720311B1 (de) 2011-06-01
DE69737353T2 (de) 2007-11-29
EP2259534A3 (de) 2011-03-16
EP0915597B1 (de) 2007-02-14
US6160821A (en) 2000-12-12
JPH11215097A (ja) 1999-08-06
EP2782307A1 (de) 2014-09-24
EP2259534B1 (de) 2014-08-06
DE69737353D1 (de) 2007-03-29
EP2782307B1 (de) 2016-03-30
EP0915597A1 (de) 1999-05-12
EP2259534A2 (de) 2010-12-08

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