EP1494475A1 - Vorrichtung zur Umwandlung eines Videosignals sowie Verfahren - Google Patents

Vorrichtung zur Umwandlung eines Videosignals sowie Verfahren Download PDF

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Publication number
EP1494475A1
EP1494475A1 EP04015533A EP04015533A EP1494475A1 EP 1494475 A1 EP1494475 A1 EP 1494475A1 EP 04015533 A EP04015533 A EP 04015533A EP 04015533 A EP04015533 A EP 04015533A EP 1494475 A1 EP1494475 A1 EP 1494475A1
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EP
European Patent Office
Prior art keywords
video signal
progressive
converting
film
input video
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP04015533A
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English (en)
French (fr)
Inventor
Kazunori Ochiai
Hiroshi Ando
Tetsuya Shigeta
Tetsuro Nagakubo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
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Pioneer Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Corp filed Critical Pioneer Corp
Publication of EP1494475A1 publication Critical patent/EP1494475A1/de
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0117—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving conversion of the spatial resolution of the incoming video signal
    • H04N7/012—Conversion between an interlaced and a progressive signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0112—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level one of the standards corresponding to a cinematograph film standard

Definitions

  • the present invention relates to a video signal converting apparatus for converting an input video signal so as to be displayed on a display apparatus in high quality.
  • a movie film includes 24 frames per second while a video signal in a standard television system include 30 frames per second and is a video signal of interlaced scanning having frames each including two fields. Since the numbers of frames per second differ, each frame of a movie film is telecine-converted with a 2-3 pull-down process so that a video signal in the standard television system can be generally obtained.
  • first and second fields of a first frame of a video signal are created from a first frame of a movie film.
  • First and second fields of a second frame of the video signal and a first field of a third frame of the video signal are created from a second frame of the movie film.
  • a second field of the third frame of the video signal and a first field of a fourth frame of the video signal are created from the third frame of the movie film.
  • the same conversion is performed on the subsequent frames so that a video signal can be created from consecutive frames of the movie film, in such a manner that a video signal is sequentially produced for two fields, three fields, two fields and three fields.
  • two frames of the movie film correspond to five frames of a video signal in the standard television system and are converted to a video signal in which two fields of the video signal and three fields of the video signal are alternately repeated with respect to frames of the movie film.
  • the quality of the picture become poorer than that of the original movie film.
  • the third frame among consecutive frames of the video signal is a combination of images of the second frame and third frame of the movie film.
  • problems to be solved by the invention include the-above described problems, for example. It is an object of the invention to provide a video signal converting apparatus and to provide a method which can improve display quality for video signals from both of a film source and a video source.
  • a video signal converting apparatus for converting an input video signal to a progressive video signal having a high frame rate
  • the apparatus including an interlace discriminating means for discriminating whether the input video signal is an interlaced video signal or not, a film source discriminating means for discriminating whether the input video signal is a video signal from a film source based on a film, an interlace/progressive converting means for converting, for outputting, the input video signal to the progressive video signal by a converting method in accordance with a discrimination result by the film source discriminating means if the interlace discriminating means discriminates that the input video signal is an interlaced video signal and for outputting the input video signal as it is if the interlace discriminating means discriminates that the input video signal is not an interlaced video signal, and a frame rate converting means for converting an output video signal from the interlace/progressive converting means to a video signal having a high frame rate in accordance with the discrimination result by the film source discriminating means
  • a video signal converting method for converting an input video signal to a progressive video signal having a high frame rate, the method including the steps of discriminating whether the input video signal is an interlaced video signal or not, discriminating whether the input video signal is a video signal from a film source based on a film, if the input video signal is discriminated as an interlaced video signal, converting, for outputting, the input video signal to the progressive video signal by a converting method in accordance with a discrimination result regarding whether the input video signal is a video signal of the film source or not and converting the converted progressive video signal to a video signal having a high frame rate in accordance with the discrimination result regarding whether the converted progressive video signal is the video signal from the film source or not, and if the input video signal is not discriminated as an interlaced video signal, converting the input video signal to a video signal having a high frame rate in accordance with the discrimination result regarding whether the input video signal is the video signal from the film source or not
  • Fig. 1 shows a video signal converting apparatus of the invention.
  • the video signal converting apparatus includes a signal detector circuit 1, frame memories 2 and 3, film detector circuits 4 and 5, an interlace/progressive converter circuit 6, a select switch 7, a frame rate converter circuit 8, a PDP-driving sequence generator circuit 9 and a control circuit 10.
  • the signal detector circuit 1 detects a synchronizing signal of the input video signal and discriminates a signal format of the video signal.
  • the signals processable by the converting apparatus according to this embodiment include a video signal in the NTSC system, a video signal in the PAL system, a 525 scan line progressive video signal, a 625 scan line progressive video signal, a 750 scan line progressive video signal at the vertical synchronizing frequency fv of 50/60 Hz, a 1125 scan line interlaced video signal at the vertical synchronizing frequency fv of 50/60 Hz and a 1125 scan line progressive video signal at the vertical synchronizing frequency fv of 24 Hz.
  • the invention is not limited thereto. Since specific detecting methods for these video signals are known, the description thereof will be omitted here.
  • Information of a signal format discriminated by the signal detector circuit 1 is supplied to the control circuit 10.
  • the control circuit 10 controls, based on the information of the signal format, the film detector circuits 4 and 5, the interlace/progressive converter circuit 6, the select switch 7, the frame rate converter circuit 8 and the PDP driving sequence generator circuit 9 (in the part surrounded by the dashed line in Fig. 1) in the converting apparatus.
  • the interlace/progressive converter circuit 6 converts the input video signal to a progressive video signal in accordance with an instruction from the control circuit 10. For the conversion, the frame memory 2 and the film detector circuit 4 are used.
  • the interlace/progressive converter circuit 6 writes the input video signal in frames in the frame memory 2.
  • the film detector circuit 4 detects whether or not the video signal having been written in the frame memory 2 is a video signal resulting from the so-called telecine-conversion based on a film.
  • a source of video signals is a film, the source is denoted as a film source.
  • the source when a source of video signals is not a film, the source is denoted as a video source.
  • the signal indicating the detection result by the film detector circuit 4 is supplied to the interlace/progressive converter circuit 6.
  • the interlace/progressive converter circuit 6 performs conversion to a progressive video signal.
  • the select switch 7 performs a switching operation in accordance with an instruction from the control circuit 10.
  • the select switch 7 relays the input video signal to the frame rate converter circuit 8 while bypassing the interlace/progressive converter circuit 6.
  • the select switch 7 relays the video signal outputted from the interlace/progressive converter circuit 6 to the frame rate converter circuit 8.
  • the frame rate converter circuit 8 converts a frame rate, that is a vertical synchronizing frequency, of the video signal supplied through the select switch 7 in accordance with an instruction from the control circuit 10. For the conversion, the frame memory 3 and the film detector circuit 5 are used. The frame rate converter circuit 8 writes the video signal in frames in the frame memory 3.
  • the film detector circuit 5 is similar to the film detector circuit 4 and detects whether or not the video signal having been written in the frame memory 3 is the so-called telecine-converted video signal based on a film.
  • a signal indicating a detection result by the film detector circuit 5 is supplied to the frame rate converter circuit 8 and the PDP driving sequence generator circuit 9.
  • the frame rate converter circuit 8 performs frame-rate conversion in accordance with the detection result by the film detector circuit 5.
  • the PDP driving sequence generator circuit 9 is connected to the output of the frame rate converter circuit 8.
  • the output video signal of the frame rate converter circuit 8 is supplied to the PDP driving sequence generator circuit 9.
  • the PDP driving sequence generator 9 drives a PDP display panel 11 in accordance with the output video signal of the frame rate converter circuit 8 and the signal indicating a detection result by the film detector circuit 5.
  • the apparatus receives one of the video signal in the NTSC system, the video signal in the PAL system, the 525 scan line progressive video signal, the 625 scan line progressive video signal, the 750 scan line progressive video signal at the vertical synchronizing frequency fv of 50/60 Hz, the 1125 scan line interlaced video signal at the vertical synchronizing frequency fv of 50/60 Hz and 1125 scan line progressive video signal at the vertical synchronizing frequency fv of 24 Hz.
  • Fig. 2 shows a flow of processing of the video signal converting apparatus for input video signals in these signal formats.
  • the video signal in the NTSC system is a signal in which a first field "Video odd” and a second field "Video even” are repeated at the vertical synchronizing frequency fv of 60 Hz.
  • the video signal in the NTSC system is detected by the signal detector circuit 1 as an interlaced video signal.
  • select switch 7 is caused to relay an output signal of the interlace/progressive converter circuit 6 to the frame rate converter circuit 8.
  • a film detection signal by the film detector circuit 4 is a low-level signal indicating zero (0).
  • the interlace/progressive converter circuit 6 reads one frame's worth of the video signal twice at the vertical synchronizing frequency fv of 60 Hz every time when video signals for two fields (the first field Video odd and the second field Video even), that is, for one frame are written in the frame memory 2.
  • the video signal can be converted to a 525 scan line progressive video signal Video prog.
  • the progressive video signal is supplied to the frame rate converter circuit 8 through the select switch 7.
  • the frame rate converter circuit 8 writes the supplied progressive video signal in the frame memory 3.
  • the frame rate converter circuit 8 reads the video signal Video prog for one frame at the vertical synchronizing frequency fv of 60 Hz of the progressive video signal having been written in the frame memory 3.
  • the video signal Video prog are output, which are the same as the written video signals Video prog.
  • the video signal is supplied to the PDP driving sequence generator circuit 9.
  • the PDP driving sequence generator circuit 9 drives the PDP display panel 11 at 60 Hz sequence in accordance with the video signal at the vertical synchronizing frequency fv of 60 Hz.
  • the video signal in the NTSC system from a film source is a video signal with 2-3 pull down like fields Film A odd, Film A even, Film B odd, Film B even and Film B odd and so on.
  • Film A odd refers to a first field of Frame A
  • Film A even refers to a second field of Frame A.
  • a film detection signal by the film detector circuit 4 is a high-level signal indicating one (1).
  • the interlace/progressive converter circuit 6 reads video signal Film A prog for one frame twice at the vertical synchronizing frequency fv of 60 Hz every time when the video signal for two fields (including the first field Film A odd and the second field Film A even) are written in the frame memory 2. Furthermore, the interlace/progressive converter circuit 6 reads the video signal Film B prog for one frame three times at the vertical synchronizing frequency fv of 60 Hz every time when the video signal for two fields (including the first field Film B odd and the second field Film B even) is written in the frame memory 2. The last field Film B odd of serial five fields of the input video signal is ignored.
  • the input video signal can be converted to a 525 scan line progressive video signal.
  • the progressive video signal is supplied to the frame rate converter circuit 8 through the select switch 7.
  • the frame rate converter circuit 8 writes the supplied progressive video signal in the frame memory 3. Since the output signal from the film detection circuit 5 is a high-level signal indicating one (1), the frame rate converter circuit 8 reads the video signal for one frame at the vertical synchronizing frequency fv of 72 Hz of the progressive video signal having been written in the frame memory 3.
  • the frame rate converter circuit 8 supplies the video signals to the PDP driving sequence generator circuit 9. For the reading of the video signal for one frame, the same frame is read twice for every five frames. As shown in Fig. 3, frames Film A prog, frame Film C prog and so on are read twice.
  • the PDP driving sequence generator circuit 9 drives the PDP display panel 11 at 72 Hz sequence in accordance with the video signal at the vertical synchronizing frequency fv of 72 Hz.
  • a case that input video signal is a 1125 scan line interlace video signal at the vertical synchronizing frequency fv of 60 Hz is only different in number of scan lines from the case of the video signal in the NTSC system. Therefore, the operation of the video signal converting apparatus is the same as the operation for the video signal in the NTSC system for both video source and film source.
  • the signal detector circuit 1 detects the input video signal as a progressive video signal.
  • the select switch 7 is caused to relay the input video signal directly to the frame rate converter circuit 8.
  • a frame rate conversion operation thereof is the same as the operation after the generation of a progressive video signal from the video signal in the NTSC system.
  • the frame rate conversion operation is the same as that of the 525 scan line progressive video signal.
  • the numbers of scan lines only are different between the 750 scan line progressive video signal and the 525 scan line progressive video signal.
  • the video signal in the PAL system is a signal in which a first field Video odd and a second field Video even are repeated at the vertical synchronizing frequency fv of 50 Hz.
  • the video signal in the PAL system is detected by the signal detector circuit 1 as an interlaced video signal.
  • the select switch 7 is caused to relay the output signal of the interlace/progressive converter circuit 6 to the frame rate converter circuit 8.
  • the output signal of the film detector circuit 4 is a low-level signal indicating zero (0).
  • the interlace/progressive converter circuit 6 reads the video signal for one frame twice at the vertical synchronizing frequency fv of 50 Hz every time when the video signals for two fields (the first field Video odd and the second field Video even), that is, for one frame is written in the frame memory 2.
  • the video signal can be converted to a 625 scan line progressive video signal Video prog.
  • the progressive video signal is supplied to the frame rate converter circuit 8 through the select switch 7.
  • the frame rate converter circuit 8 writes the supplied progressive video signal in the frame memory 3. Since the output signal of the film detection circuit 5 is a low-level signal indicating zero (0), the frame rate converter circuit 8 reads the video signal Video prog for one frame at the vertical synchronizing frequency fv of 50 Hz of the progressive video signal having been written in the frame memory 3.
  • the video signal Video prog is outputted, which is the same as the written video signal Video prog.
  • the video signal is supplied to the PDP driving sequence generator circuit 9.
  • the PDP driving sequence generator circuit 9 drives the PDP display panel 11 at 50 Hz sequence in accordance with the video signal at the vertical synchronizing frequency fv of 50 Hz.
  • the video signal in the PAL system from a film source is a video signal with 2-2 pull down like fields Film A odd, Film A even, Film B odd, Film B even, Film C odd, Film C even and so on.
  • Film A odd refers to a first field of Frame A
  • Film A even refers to a second field of Frame A.
  • the output signal of the film detector circuit 4 is a high-level signal indicating one (1).
  • the interlace/progressive converter circuit 6 reads the video signal Film A prog for one frame twice at the vertical synchronizing frequency fv of 50 Hz every time when the video signal for two fields (the first field Film A odd and the second field Film A even) is written in the frame memory 2. By repeating this operation on subsequent fields such as Film B odd, Film B even, Film C odd and Film C even, the input video signal can be converted to 625 scan line progressive video signals.
  • the progressive video signal is supplied to the frame rate converter circuit 8 through the select switch 7.
  • the frame rate converter circuit 8 writes the supplied progressive video signal in the frame memory 3.
  • the frame rate converter circuit 8 Since the output signal of the film detection circuit 5 is a high-level signal indicating one (1), the frame rate converter circuit 8 read the video signal for one frame at the vertical synchronizing frequency fv of 75 Hz of the progressive video signal having been written in the frame memory 3.
  • the frame rate converter circuit 8 supplies the video signal to the PDP driving sequence generator circuit 9.
  • For the reading of the video signal for one frame one frame is read twice for every two frames. As shown in Fig. 4, frames Film A prog, Film B prog and so on are read twice every other frame.
  • three same frames of the video signal at the vertical synchronizing frequency fv of 72 Hz resulting from frame-rate conversion are provided in series.
  • the PDP driving sequence generator circuit 9 drives the PDP display panel 11 at 72 Hz sequence in accordance with the video signal at the vertical synchronizing frequency fv of 72 Hz.
  • a case that input video signal is a 1125 scan line interlaced video signal at the vertical synchronizing frequency fv of 50 Hz is only different from the case of the video signal in the PAL system in number of scan lines. Therefore, the operation of the video signal converter is the same as the operation for the video signal in the PAL system for both video source and film source.
  • the signal detector circuit 1 detects the input video signal as a progressive video signal.
  • the select switch 7 is caused to relay the input video signal directly to the frame rate converter circuit 8.
  • a frame rate conversion operation thereof is the same as the operation after the generation of the progressive video signal from the video signal in the PAL system.
  • input video signal is a 750 scan line progressive video signals at the vertical synchronizing frequency fv of 50 Hz
  • the frame rate conversion operation is the same as that of the 625 scan line progressive video signal.
  • the number of scan lines only are different between the 750 scan line progressive video signal and the 625 scan line progressive video signal.
  • the vertical synchronizing frequencies fv after frame-rate conversion differ from each other like 50 Hz and 75 Hz between a video source and a film source.
  • the input video signal from both of the video source and the film source can have a frame rate at the vertical synchronizing frequency fv of 75 Hz.
  • the frame rate converter circuit 8 reads the video signal for one frame at the vertical synchronizing frequency fv of 75 Hz of the progressive video signal having been written in the frame memory 3 and reads the same frame twice for every two frames.
  • the progressive video signal from a film source at the vertical synchronizing frequency fv of 50 Hz is converted to a video signal having a frame rate at the vertical synchronizing frequency fv of 75 Hz as described above.
  • the PDP driving sequence generator circuit 9 can always drive the PDP display panel 11 at the 75 Hz sequence.
  • the signal detector circuit 1 detects the input video signal as a progressive video signal.
  • the select switch 7 is caused to relay the input video signal directly to the frame rate converter circuit 8.
  • the frame rate converter circuit 8 reads the video signal for one frame at the vertical synchronizing frequency fv of 72 Hz of the progressive video signal having been written in the frame memory 3 and reads the video signal of the same frame three times.
  • the PDP driving sequence generator circuit 9 drives the PDP display panel 11 at 72 Hz sequence in accordance with a video signal at the vertical synchronizing frequency fv of 72 Hz.
  • the film source discriminating unit for discriminating the input video signal as a video signal resulting from telecine conversion based on a film includes the two film detector circuits 4 and 5.
  • the film detector circuit 5 may be removed, and the film detector circuit 4 may be only provided.
  • an input video signals is converted to a progressive video signal having a high frame rate compliant with a signal format thereof so that flicker in displayed pictures can be reduced. Therefore, display quality for video signals from both film source and video source can be improved.

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Computer Graphics (AREA)
  • Television Systems (AREA)
EP04015533A 2003-07-03 2004-07-01 Vorrichtung zur Umwandlung eines Videosignals sowie Verfahren Withdrawn EP1494475A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2003190873 2003-07-03
JP2003190873A JP2005027068A (ja) 2003-07-03 2003-07-03 映像信号変換装置及び方法

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