DE69614992D1 - Verfahren und vorrichtung zur symboltaktrückgewinnung - Google Patents
Verfahren und vorrichtung zur symboltaktrückgewinnungInfo
- Publication number
- DE69614992D1 DE69614992D1 DE69614992T DE69614992T DE69614992D1 DE 69614992 D1 DE69614992 D1 DE 69614992D1 DE 69614992 T DE69614992 T DE 69614992T DE 69614992 T DE69614992 T DE 69614992T DE 69614992 D1 DE69614992 D1 DE 69614992D1
- Authority
- DE
- Germany
- Prior art keywords
- recovery
- symbols
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
- H04L7/0062—Detection of the synchronisation error by features other than the received signal transition detection of error based on data decision error, e.g. Mueller type detection
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GBGB9516230.1A GB9516230D0 (en) | 1995-08-08 | 1995-08-08 | Method of and apparatus for symbol timing recovery |
PCT/IB1996/000772 WO1997006620A1 (en) | 1995-08-08 | 1996-08-02 | Method of, and apparatus for, symbol timing recovery |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69614992D1 true DE69614992D1 (de) | 2001-10-11 |
DE69614992T2 DE69614992T2 (de) | 2002-04-11 |
Family
ID=10778933
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69614992T Expired - Fee Related DE69614992T2 (de) | 1995-08-08 | 1996-08-02 | Verfahren und vorrichtung zur symboltaktrückgewinnung |
Country Status (6)
Country | Link |
---|---|
US (1) | US5892803A (de) |
EP (1) | EP0789958B1 (de) |
JP (1) | JPH10507612A (de) |
DE (1) | DE69614992T2 (de) |
GB (1) | GB9516230D0 (de) |
WO (1) | WO1997006620A1 (de) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3288574B2 (ja) * | 1996-02-26 | 2002-06-04 | 松下電器産業株式会社 | データ受信装置 |
CA2259647A1 (en) * | 1996-06-28 | 1998-01-08 | Harris Corporation | Improvements in or relating to a method and apparatus for determining symbol timing in a wireless communications system, also using a reusable control channel, and reducing power |
US5943325A (en) * | 1996-06-28 | 1999-08-24 | Ctp Systems, Ltd. | Method and apparatus for determining symbol timing in a wireless communications system |
US6023460A (en) * | 1996-06-28 | 2000-02-08 | Harris Corporation | Wireless communications system and method using a reusable control channel |
US6263035B1 (en) * | 1998-02-02 | 2001-07-17 | Oki Telecom, Inc. | System and method for adjusting a phase angle of a recovered data clock signal from a received data signal |
US6218896B1 (en) * | 1999-08-27 | 2001-04-17 | Tachyon, Inc. | Vectored demodulation and frequency estimation apparatus and method |
US6272193B1 (en) * | 1999-09-27 | 2001-08-07 | Genesis Microchip Corp. | Receiver to recover data encoded in a serial communication channel |
US6594318B1 (en) * | 1999-12-02 | 2003-07-15 | Qualcomm Incorporated | Method and apparatus for computing soft decision input metrics to a turbo decoder |
TW520579B (en) * | 2000-11-13 | 2003-02-11 | Syncomm Technology Corp | Symbol timing recovering circuit of phase demodulation and its method |
US7136439B2 (en) * | 2002-12-20 | 2006-11-14 | Intel Corporation | Adaptive synchronization |
US7995678B2 (en) * | 2007-11-28 | 2011-08-09 | Harris Corporation | System and method for communicating data using weighted bit soft decisions for differentially encoded phase shift keying |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4578800A (en) * | 1982-07-12 | 1986-03-25 | Yutaka Yasuda | Synchronization circuit for a Viterbi decoder |
US4596024A (en) * | 1983-05-23 | 1986-06-17 | At&T Bell Laboratories | Data detector using probabalistic information in received signals |
JPS62196921A (ja) * | 1986-02-25 | 1987-08-31 | Nec Corp | 位相検出回路 |
US4742533A (en) * | 1987-01-02 | 1988-05-03 | Motorola, Inc. | Soft decision digital communication apparatus |
US4941155A (en) * | 1989-11-16 | 1990-07-10 | Bell Communications Research, Inc. | Method and circuitry for symbol timing and frequency offset estimation in time division multiple access radio systems |
EP1001580A1 (de) * | 1991-03-20 | 2000-05-17 | Sony Corporation | Demodulator für phasenumgetastetes Signal mit Maximalwahrscheinlichkeits-Folgeschätzer |
US5206889A (en) * | 1992-01-17 | 1993-04-27 | Hewlett-Packard Company | Timing interpolator |
US5259005A (en) * | 1992-03-26 | 1993-11-02 | Motorola, Inc. | Apparatus for and method of synchronizing a clock signal |
JP3003826B2 (ja) * | 1992-12-11 | 2000-01-31 | 三菱電機株式会社 | クロック再生回路 |
US5388127A (en) * | 1993-02-09 | 1995-02-07 | Hitachi America, Ltd. | Digital timing recovery circuit |
JPH06268696A (ja) * | 1993-03-10 | 1994-09-22 | Toyo Commun Equip Co Ltd | Afc回路 |
JPH06284159A (ja) * | 1993-03-29 | 1994-10-07 | Toshiba Corp | ディジタル復調器 |
US5528634A (en) * | 1993-11-18 | 1996-06-18 | Motorola, Inc. | Trajectory directed timing recovery |
US5414730A (en) * | 1993-12-21 | 1995-05-09 | Unisys Corporation | Asynchronous samples data demodulation system |
US5671257A (en) * | 1995-06-06 | 1997-09-23 | Sicom, Inc. | Symbol timing recovery based on complex sample magnitude |
-
1995
- 1995-08-08 GB GBGB9516230.1A patent/GB9516230D0/en active Pending
-
1996
- 1996-08-02 WO PCT/IB1996/000772 patent/WO1997006620A1/en active IP Right Grant
- 1996-08-02 EP EP96924106A patent/EP0789958B1/de not_active Expired - Lifetime
- 1996-08-02 JP JP9508268A patent/JPH10507612A/ja not_active Ceased
- 1996-08-02 DE DE69614992T patent/DE69614992T2/de not_active Expired - Fee Related
- 1996-08-05 US US08/692,147 patent/US5892803A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE69614992T2 (de) | 2002-04-11 |
US5892803A (en) | 1999-04-06 |
EP0789958A1 (de) | 1997-08-20 |
WO1997006620A1 (en) | 1997-02-20 |
JPH10507612A (ja) | 1998-07-21 |
GB9516230D0 (en) | 1995-10-11 |
EP0789958B1 (de) | 2001-09-05 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8320 | Willingness to grant licences declared (paragraph 23) | ||
8339 | Ceased/non-payment of the annual fee |