DE69033619T2 - Verfahren zur Verwendung einer Halbleiteranordnung mit einem Substrat, das eine dielektrisch isolierte Halbleiterinsel aufweist - Google Patents

Verfahren zur Verwendung einer Halbleiteranordnung mit einem Substrat, das eine dielektrisch isolierte Halbleiterinsel aufweist

Info

Publication number
DE69033619T2
DE69033619T2 DE69033619T DE69033619T DE69033619T2 DE 69033619 T2 DE69033619 T2 DE 69033619T2 DE 69033619 T DE69033619 T DE 69033619T DE 69033619 T DE69033619 T DE 69033619T DE 69033619 T2 DE69033619 T2 DE 69033619T2
Authority
DE
Germany
Prior art keywords
island
collector
region
location
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69033619T
Other languages
English (en)
Other versions
DE69033619D1 (de
Inventor
D Beasom
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Harris Corp
Original Assignee
Harris Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Harris Corp filed Critical Harris Corp
Publication of DE69033619D1 publication Critical patent/DE69033619D1/de
Application granted granted Critical
Publication of DE69033619T2 publication Critical patent/DE69033619T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
    • H01L29/7824—Lateral DMOS transistors, i.e. LDMOS transistors with a substrate comprising an insulating layer, e.g. SOI-LDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0821—Collector regions of bipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H01L29/732—Vertical transistors
    • H01L29/7322—Vertical transistors having emitter-base and base-collector junctions leaving at the same surface of the body, e.g. planar transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
    • H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)
  • Thin Film Transistor (AREA)
  • Element Separation (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
DE69033619T 1990-01-08 1990-12-20 Verfahren zur Verwendung einer Halbleiteranordnung mit einem Substrat, das eine dielektrisch isolierte Halbleiterinsel aufweist Expired - Fee Related DE69033619T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US46171590A 1990-01-08 1990-01-08
PCT/US1990/007562 WO1991011028A1 (en) 1990-01-08 1990-12-20 Thin, dielectrically isolated island resident transistor structure having low collector resistance

Publications (2)

Publication Number Publication Date
DE69033619D1 DE69033619D1 (de) 2000-10-05
DE69033619T2 true DE69033619T2 (de) 2001-04-26

Family

ID=23833659

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69033619T Expired - Fee Related DE69033619T2 (de) 1990-01-08 1990-12-20 Verfahren zur Verwendung einer Halbleiteranordnung mit einem Substrat, das eine dielektrisch isolierte Halbleiterinsel aufweist

Country Status (11)

Country Link
US (1) US5327006A (de)
EP (1) EP0462270B1 (de)
JP (1) JPH04506588A (de)
KR (1) KR0170774B1 (de)
AT (1) ATE196035T1 (de)
BR (1) BR9007213A (de)
CA (1) CA2033780C (de)
DE (1) DE69033619T2 (de)
ES (1) ES2152919T3 (de)
TW (1) TW197532B (de)
WO (1) WO1991011028A1 (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2654268B2 (ja) * 1991-05-13 1997-09-17 株式会社東芝 半導体装置の使用方法
JPH06151573A (ja) * 1992-11-06 1994-05-31 Hitachi Ltd 半導体集積回路装置
US5644157A (en) * 1992-12-25 1997-07-01 Nippondenso Co., Ltd. High withstand voltage type semiconductor device having an isolation region
WO1994015360A1 (en) * 1992-12-25 1994-07-07 Nippondenso Co., Ltd. Semiconductor device
US5373183A (en) * 1993-04-28 1994-12-13 Harris Corporation Integrated circuit with improved reverse bias breakdown
US5448104A (en) * 1993-07-17 1995-09-05 Analog Devices, Inc. Bipolar transistor with base charge controlled by back gate bias
SE513512C2 (sv) * 1994-10-31 2000-09-25 Ericsson Telefon Ab L M Halvledaranordning med ett flytande kollektorområde
DE19611692C2 (de) * 1996-03-25 2002-07-18 Infineon Technologies Ag Bipolartransistor mit Hochenergie-implantiertem Kollektor und Herstellverfahren
US6242792B1 (en) 1996-07-02 2001-06-05 Denso Corporation Semiconductor device having oblique portion as reflection
KR100319615B1 (ko) 1999-04-16 2002-01-09 김영환 반도체 장치에서의 소자격리방법
JP2001351266A (ja) * 2000-04-06 2001-12-21 Fujitsu Ltd 光ピックアップ及び光記憶装置
JP3730483B2 (ja) * 2000-06-30 2006-01-05 株式会社東芝 バイポーラトランジスタ
US6486043B1 (en) 2000-08-31 2002-11-26 International Business Machines Corporation Method of forming dislocation filter in merged SOI and non-SOI chips
US6624449B1 (en) * 2001-07-17 2003-09-23 David C. Scott Three terminal edge illuminated epilayer waveguide phototransistor
US20100117153A1 (en) * 2008-11-07 2010-05-13 Honeywell International Inc. High voltage soi cmos device and method of manufacture
US8350352B2 (en) * 2009-11-02 2013-01-08 Analog Devices, Inc. Bipolar transistor
JP5971035B2 (ja) * 2012-08-29 2016-08-17 トヨタ自動車株式会社 半導体装置
WO2015026371A1 (en) * 2013-08-23 2015-02-26 Intel Corporation High resistance layer for iii-v channel deposited on group iv substrates for mos transistors

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3953255A (en) * 1971-12-06 1976-04-27 Harris Corporation Fabrication of matched complementary transistors in integrated circuits
US4232328A (en) * 1978-12-20 1980-11-04 Bell Telephone Laboratories, Incorporated Dielectrically-isolated integrated circuit complementary transistors for high voltage use
US4602268A (en) * 1978-12-20 1986-07-22 At&T Bell Laboratories High voltage dielectrically isolated dual gate solid-state switch
US4587656A (en) * 1979-12-28 1986-05-06 At&T Bell Laboratories High voltage solid-state switch
US4309715A (en) * 1979-12-28 1982-01-05 Bell Telephone Laboratories, Incorporated Integral turn-on high voltage switch
US4868624A (en) * 1980-05-09 1989-09-19 Regents Of The University Of Minnesota Channel collector transistor
JPS58171856A (ja) * 1982-04-02 1983-10-08 Hitachi Ltd 半導体集積回路装置
US4819049A (en) * 1985-09-16 1989-04-04 Tektronix, Inc. Method of fabricating high voltage and low voltage transistors using an epitaxial layer of uniform thickness
US4665425A (en) * 1985-10-16 1987-05-12 Harris Corporation Fabrication of vertical NPN and PNP bipolar transistors in monolithic substrate

Also Published As

Publication number Publication date
EP0462270A4 (de) 1994-03-18
ES2152919T3 (es) 2001-02-16
CA2033780C (en) 1996-07-30
WO1991011028A1 (en) 1991-07-25
JPH04506588A (ja) 1992-11-12
DE69033619D1 (de) 2000-10-05
ATE196035T1 (de) 2000-09-15
EP0462270A1 (de) 1991-12-27
US5327006A (en) 1994-07-05
CA2033780A1 (en) 1991-07-09
TW197532B (de) 1993-01-01
EP0462270B1 (de) 2000-08-30
KR910014995A (ko) 1991-08-31
BR9007213A (pt) 1992-02-18
KR0170774B1 (ko) 1999-03-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee