DE69027973T2 - Gerät und Verfahren zur Eins-aus-N-Prüfung - Google Patents

Gerät und Verfahren zur Eins-aus-N-Prüfung

Info

Publication number
DE69027973T2
DE69027973T2 DE69027973T DE69027973T DE69027973T2 DE 69027973 T2 DE69027973 T2 DE 69027973T2 DE 69027973 T DE69027973 T DE 69027973T DE 69027973 T DE69027973 T DE 69027973T DE 69027973 T2 DE69027973 T2 DE 69027973T2
Authority
DE
Germany
Prior art keywords
test apparatus
test
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69027973T
Other languages
English (en)
Other versions
DE69027973D1 (de
Inventor
John A Blakkan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tandem Computers Inc
Original Assignee
Tandem Computers Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tandem Computers Inc filed Critical Tandem Computers Inc
Application granted granted Critical
Publication of DE69027973D1 publication Critical patent/DE69027973D1/de
Publication of DE69027973T2 publication Critical patent/DE69027973T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/085—Error detection or correction by redundancy in data representation, e.g. by using checking codes using codes with inherent redundancy, e.g. n-out-of-m codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Debugging And Monitoring (AREA)
  • Monitoring And Testing Of Transmission In General (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Hardware Redundancy (AREA)
DE69027973T 1989-05-18 1990-05-14 Gerät und Verfahren zur Eins-aus-N-Prüfung Expired - Fee Related DE69027973T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/353,717 US5067132A (en) 1989-05-18 1989-05-18 One out of n checking apparatus and method

Publications (2)

Publication Number Publication Date
DE69027973D1 DE69027973D1 (de) 1996-09-05
DE69027973T2 true DE69027973T2 (de) 1997-01-16

Family

ID=23390276

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69027973T Expired - Fee Related DE69027973T2 (de) 1989-05-18 1990-05-14 Gerät und Verfahren zur Eins-aus-N-Prüfung

Country Status (6)

Country Link
US (1) US5067132A (de)
EP (1) EP0425070B1 (de)
JP (1) JPH0687542B2 (de)
AU (1) AU630694B2 (de)
CA (1) CA2016179C (de)
DE (1) DE69027973T2 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5373514A (en) * 1990-09-20 1994-12-13 Synopsys, Inc. Three-state bus structure and method for generating test vectors while avoiding contention and/or floating outputs on the three-state bus
US5907671A (en) * 1996-09-23 1999-05-25 International Business Machines Corporation Fault tolerant system based on voting

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3428945A (en) * 1965-05-20 1969-02-18 Bell Telephone Labor Inc Error detection circuits
US3541507A (en) * 1967-12-06 1970-11-17 Ibm Error checked selection circuit
US3585637A (en) * 1968-06-04 1971-06-15 Gen Electric Keyboard detector
US3744024A (en) * 1972-01-03 1973-07-03 Stromberg Carlson Corp Circuit for detecting the presence of other than one-bit-out-of-n bits
US4020460A (en) * 1975-11-13 1977-04-26 Ibm Corporation Method and apparatus of checking to determine if a signal is present on more than one of n lines
US4087786A (en) * 1976-12-08 1978-05-02 Bell Telephone Laboratories, Incorporated One-bit-out-of-N-bit checking circuit
US4498177A (en) * 1982-08-30 1985-02-05 Sperry Corporation M Out of N code checker circuit
JPH0812226B2 (ja) * 1987-01-14 1996-02-07 三菱電機株式会社 半導体装置

Also Published As

Publication number Publication date
CA2016179A1 (en) 1990-11-18
DE69027973D1 (de) 1996-09-05
CA2016179C (en) 1994-03-08
EP0425070A3 (en) 1992-09-23
AU630694B2 (en) 1992-11-05
AU5500290A (en) 1990-11-22
US5067132A (en) 1991-11-19
JPH0382973A (ja) 1991-04-08
JPH0687542B2 (ja) 1994-11-02
EP0425070A2 (de) 1991-05-02
EP0425070B1 (de) 1996-07-31

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee