DE60305178D1 - Phasenregelschleife - Google Patents
PhasenregelschleifeInfo
- Publication number
- DE60305178D1 DE60305178D1 DE60305178T DE60305178T DE60305178D1 DE 60305178 D1 DE60305178 D1 DE 60305178D1 DE 60305178 T DE60305178 T DE 60305178T DE 60305178 T DE60305178 T DE 60305178T DE 60305178 D1 DE60305178 D1 DE 60305178D1
- Authority
- DE
- Germany
- Prior art keywords
- phase
- loop
- frequency
- signal
- control loop
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000009877 rendering Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
- H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
- H03L7/0893—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump the up-down pulses controlling at least two source current generators or at least two sink current generators connected to different points in the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
- H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
- H03L7/0895—Details of the current generators
- H03L7/0898—Details of the current generators the source or sink current values being variable
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0206503A FR2840469A1 (fr) | 2002-05-28 | 2002-05-28 | Boucle a verrouillage de phase |
FR0206503 | 2002-05-28 | ||
PCT/IB2003/002157 WO2003100979A1 (en) | 2002-05-28 | 2003-05-20 | Phase-locked loop. |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60305178D1 true DE60305178D1 (de) | 2006-06-14 |
DE60305178T2 DE60305178T2 (de) | 2007-03-08 |
Family
ID=29558775
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60305178T Expired - Lifetime DE60305178T2 (de) | 2002-05-28 | 2003-05-20 | Phasenregelschleife |
Country Status (9)
Country | Link |
---|---|
US (1) | US7106140B2 (de) |
EP (1) | EP1512224B1 (de) |
JP (1) | JP4381975B2 (de) |
CN (1) | CN1656685B (de) |
AT (1) | ATE326080T1 (de) |
AU (1) | AU2003230160A1 (de) |
DE (1) | DE60305178T2 (de) |
FR (1) | FR2840469A1 (de) |
WO (1) | WO2003100979A1 (de) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6958657B2 (en) * | 2003-08-15 | 2005-10-25 | Nokia Corporation | Tuning a loop-filter of a PLL |
DE102004041656B4 (de) | 2004-08-27 | 2007-11-08 | Infineon Technologies Ag | Phasenregelkreis und Verfahren zum Abgleichen eines Schleifenfilters |
US7536164B2 (en) * | 2004-09-30 | 2009-05-19 | Silicon Laboratories Inc. | Controlling the frequency of an oscillator |
US7689190B2 (en) * | 2004-09-30 | 2010-03-30 | St-Ericsson Sa | Controlling the frequency of an oscillator |
JP4176705B2 (ja) * | 2004-12-02 | 2008-11-05 | シャープ株式会社 | Pll回路 |
CN100382431C (zh) * | 2005-03-10 | 2008-04-16 | 上海交通大学 | 双校正软件锁相环实现方法 |
US7580497B2 (en) * | 2005-06-29 | 2009-08-25 | Altera Corporation | Clock data recovery loop with separate proportional path |
US7548836B2 (en) * | 2005-10-27 | 2009-06-16 | Agilent Technologies, Inc. | Method and apparatus for compensating for AC coupling errors in RMS measurements |
JP4791185B2 (ja) * | 2006-01-04 | 2011-10-12 | 富士通セミコンダクター株式会社 | 補正回路 |
KR100803361B1 (ko) * | 2006-09-14 | 2008-02-14 | 주식회사 하이닉스반도체 | Pll 회로의 루프 필터 및 그 제어 방법 |
US8674754B2 (en) * | 2007-02-09 | 2014-03-18 | Intel Mobile Communications GmbH | Loop filter and phase-locked loop |
DE602008005794D1 (de) * | 2007-11-02 | 2011-05-05 | St Ericsson Sa | Pll-kalibration |
US7907022B2 (en) * | 2009-04-23 | 2011-03-15 | Freescale Semiconductor, Inc. | Phase-locked loop and method for operating the same |
US8432200B1 (en) | 2012-01-05 | 2013-04-30 | Freescale Semiconductor, Inc. | Self-tracking adaptive bandwidth phase-locked loop |
WO2014039817A2 (en) * | 2012-09-07 | 2014-03-13 | Calhoun Benton H | Low power clock source |
CN104022502A (zh) * | 2014-06-09 | 2014-09-03 | 安徽赛瑞储能设备有限公司 | 一种用于能量转换***的电网锁相方法 |
CN108075773B (zh) * | 2016-11-14 | 2021-04-02 | 中芯国际集成电路制造(上海)有限公司 | 用于锁相环的启动电路及锁相环 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5382922A (en) * | 1993-12-23 | 1995-01-17 | International Business Machines Corporation | Calibration systems and methods for setting PLL gain characteristics and center frequency |
US5563552A (en) * | 1994-01-28 | 1996-10-08 | International Business Machines Corporation | System and method for calibrating damping factor of analog PLL |
US5631587A (en) * | 1994-05-03 | 1997-05-20 | Pericom Semiconductor Corporation | Frequency synthesizer with adaptive loop bandwidth |
JP3647147B2 (ja) * | 1996-06-28 | 2005-05-11 | 富士通株式会社 | 発振回路とそれを利用したpll回路 |
US6049255A (en) * | 1998-06-05 | 2000-04-11 | Telefonaktiebolaget Lm Ericsson | Tuning the bandwidth of a phase-locked loop |
US6512419B1 (en) * | 2001-03-19 | 2003-01-28 | Cisco Sytems Wireless Networking (Australia) Pty Limited | Method and apparatus to tune and calibrate an on-chip oscillator in a wireless transceiver chip |
-
2002
- 2002-05-28 FR FR0206503A patent/FR2840469A1/fr not_active Withdrawn
-
2003
- 2003-05-20 AT AT03723004T patent/ATE326080T1/de not_active IP Right Cessation
- 2003-05-20 US US10/515,690 patent/US7106140B2/en not_active Expired - Fee Related
- 2003-05-20 EP EP03723004A patent/EP1512224B1/de not_active Expired - Lifetime
- 2003-05-20 CN CN038120186A patent/CN1656685B/zh not_active Expired - Fee Related
- 2003-05-20 DE DE60305178T patent/DE60305178T2/de not_active Expired - Lifetime
- 2003-05-20 JP JP2004507140A patent/JP4381975B2/ja not_active Expired - Fee Related
- 2003-05-20 AU AU2003230160A patent/AU2003230160A1/en not_active Abandoned
- 2003-05-20 WO PCT/IB2003/002157 patent/WO2003100979A1/en active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
AU2003230160A1 (en) | 2003-12-12 |
ATE326080T1 (de) | 2006-06-15 |
WO2003100979A1 (en) | 2003-12-04 |
CN1656685B (zh) | 2010-05-26 |
JP2005528033A (ja) | 2005-09-15 |
JP4381975B2 (ja) | 2009-12-09 |
FR2840469A1 (fr) | 2003-12-05 |
US7106140B2 (en) | 2006-09-12 |
EP1512224B1 (de) | 2006-05-10 |
EP1512224A1 (de) | 2005-03-09 |
DE60305178T2 (de) | 2007-03-08 |
CN1656685A (zh) | 2005-08-17 |
US20050174180A1 (en) | 2005-08-11 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8328 | Change in the person/name/address of the agent |
Representative=s name: EISENFUEHR, SPEISER & PARTNER, 10178 BERLIN |
|
8327 | Change in the person/name/address of the patent owner |
Owner name: NXP B.V., EINDHOVEN, NL |