DE3900147A1 - Verfahren zur herstellung einer halbleitervorrichtung - Google Patents
Verfahren zur herstellung einer halbleitervorrichtungInfo
- Publication number
- DE3900147A1 DE3900147A1 DE3900147A DE3900147A DE3900147A1 DE 3900147 A1 DE3900147 A1 DE 3900147A1 DE 3900147 A DE3900147 A DE 3900147A DE 3900147 A DE3900147 A DE 3900147A DE 3900147 A1 DE3900147 A1 DE 3900147A1
- Authority
- DE
- Germany
- Prior art keywords
- zone
- ions
- value
- channel
- swing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 10
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 150000002500 ions Chemical class 0.000 claims abstract description 34
- 239000000758 substrate Substances 0.000 claims abstract description 6
- 239000012535 impurity Substances 0.000 claims description 17
- 238000000034 method Methods 0.000 claims description 9
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 5
- 229920005591 polysilicon Polymers 0.000 claims description 4
- 239000007943 implant Substances 0.000 claims description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 3
- 229910052796 boron Inorganic materials 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 239000003870 refractory metal Substances 0.000 description 3
- 238000004088 simulation Methods 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 230000002349 favourable effect Effects 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 229910021332 silicide Inorganic materials 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 108090000623 proteins and genes Proteins 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/082—Ion implantation FETs/COMs
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Description
Claims (6)
ermitteln der Verteilungskennlinie der Störstellen dichte in der ersten Zone über die Tiefe der ersten Zone mit der Menge der zur Kanaldotierung, die die Kanaldotie rungsstruktur bildet, implantierten Ionen als Parameter,
ermitteln der Änderung der Gatespannung (nachfolgend als Swingwert bezeichnet), die erforderlich ist, um den Wert des Drainstroms im Subschwellenspannungsbereich der Gatespannung-Drainstrom-Kennlinie um eine Größenordnung zu ändern, auf der Basis der im ersten Schritt erhaltenen Ver teilungskennlinie, und
Implantieren von Ionen in den Kanal mit einer Dosis, die nach Maßgabe der Störstellendichte in der ersten Zone so ausgewählt wird, daß der Swingwert einen möglichst ge ringen Wert annimmt, wodurch ein MIS Transistor mit der Ka naldotierungsstruktur erhalten wird.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE3943738A DE3943738C2 (de) | 1988-01-06 | 1989-01-04 | Verfahren zur Herstellung eines MIS-Transistors |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP30588 | 1988-01-06 | ||
JP63211638A JP2666403B2 (ja) | 1988-01-06 | 1988-08-26 | Mis型半導体装置の製造方法 |
DE3943738A DE3943738C2 (de) | 1988-01-06 | 1989-01-04 | Verfahren zur Herstellung eines MIS-Transistors |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3900147A1 true DE3900147A1 (de) | 1989-07-20 |
DE3900147C2 DE3900147C2 (de) | 1996-02-08 |
Family
ID=26333260
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE3900147A Expired - Fee Related DE3900147C2 (de) | 1988-01-06 | 1989-01-04 | Verfahren zur Herstellung eines MIS Transistors |
DE3943738A Expired - Fee Related DE3943738C2 (de) | 1988-01-06 | 1989-01-04 | Verfahren zur Herstellung eines MIS-Transistors |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE3943738A Expired - Fee Related DE3943738C2 (de) | 1988-01-06 | 1989-01-04 | Verfahren zur Herstellung eines MIS-Transistors |
Country Status (5)
Country | Link |
---|---|
US (1) | US5270235A (de) |
JP (1) | JP2666403B2 (de) |
KR (1) | KR930008533B1 (de) |
DE (2) | DE3900147C2 (de) |
NL (1) | NL191868C (de) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5407849A (en) * | 1992-06-23 | 1995-04-18 | Imp, Inc. | CMOS process and circuit including zero threshold transistors |
US5441906A (en) * | 1994-04-04 | 1995-08-15 | Motorola, Inc. | Insulated gate field effect transistor having a partial channel and method for fabricating |
US5427964A (en) * | 1994-04-04 | 1995-06-27 | Motorola, Inc. | Insulated gate field effect transistor and method for fabricating |
US5482878A (en) * | 1994-04-04 | 1996-01-09 | Motorola, Inc. | Method for fabricating insulated gate field effect transistor having subthreshold swing |
US5457060A (en) * | 1994-06-20 | 1995-10-10 | Winbond Electronics Corporation | Process for manufactuirng MOSFET having relatively shallow junction of doped region |
US5559050A (en) * | 1994-06-30 | 1996-09-24 | International Business Machines Corporation | P-MOSFETS with enhanced anomalous narrow channel effect |
FR2794898B1 (fr) | 1999-06-11 | 2001-09-14 | France Telecom | Dispositif semi-conducteur a tension de seuil compensee et procede de fabrication |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2047777A1 (de) * | 1969-09-30 | 1971-04-15 | Sprague Electric Co | Oberflachenfeldeffekttransistor mit einstellbarer Schwellspannung |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4112455A (en) * | 1977-01-27 | 1978-09-05 | The United States Of America As Represented By The Secretary Of The Navy | Field-effect transistor with extended linear logarithmic transconductance |
JPS568879A (en) * | 1979-07-03 | 1981-01-29 | Nec Corp | Insulating gate field effect transistor |
JPS5833870A (ja) * | 1981-08-24 | 1983-02-28 | Hitachi Ltd | 半導体装置 |
US4514893A (en) * | 1983-04-29 | 1985-05-07 | At&T Bell Laboratories | Fabrication of FETs |
JPS62105464A (ja) * | 1985-11-01 | 1987-05-15 | Hitachi Ltd | 半導体装置の製造方法 |
-
1988
- 1988-08-26 JP JP63211638A patent/JP2666403B2/ja not_active Expired - Fee Related
- 1988-12-22 NL NL8803143A patent/NL191868C/xx not_active IP Right Cessation
- 1988-12-28 KR KR1019880017621A patent/KR930008533B1/ko not_active IP Right Cessation
-
1989
- 1989-01-03 US US07/292,757 patent/US5270235A/en not_active Expired - Lifetime
- 1989-01-04 DE DE3900147A patent/DE3900147C2/de not_active Expired - Fee Related
- 1989-01-04 DE DE3943738A patent/DE3943738C2/de not_active Expired - Fee Related
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2047777A1 (de) * | 1969-09-30 | 1971-04-15 | Sprague Electric Co | Oberflachenfeldeffekttransistor mit einstellbarer Schwellspannung |
Non-Patent Citations (1)
Title |
---|
US-Z.: IBM J. Res. Develop., Jan. 1975, S. 50-59 * |
Also Published As
Publication number | Publication date |
---|---|
NL8803143A (nl) | 1989-08-01 |
DE3900147C2 (de) | 1996-02-08 |
KR890012395A (ko) | 1989-08-26 |
DE3943738C2 (de) | 1995-12-07 |
NL191868B (nl) | 1996-05-01 |
KR930008533B1 (ko) | 1993-09-09 |
JPH02367A (ja) | 1990-01-05 |
US5270235A (en) | 1993-12-14 |
NL191868C (nl) | 1996-09-03 |
JP2666403B2 (ja) | 1997-10-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8110 | Request for examination paragraph 44 | ||
8125 | Change of the main classification |
Ipc: H01L 29/784 |
|
8172 | Supplementary division/partition in: |
Ref country code: DE Ref document number: 3943738 Format of ref document f/p: P |
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8128 | New person/name/address of the agent |
Representative=s name: HOFFMANN, E., DIPL.-ING., PAT.-ANW., 82166 GRAEFEL |
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D2 | Grant after examination | ||
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |