DE3885255D1 - Verfahren zum Herstellen eines Galliumarsenid-Feldeffekt-Transistors. - Google Patents

Verfahren zum Herstellen eines Galliumarsenid-Feldeffekt-Transistors.

Info

Publication number
DE3885255D1
DE3885255D1 DE88312235T DE3885255T DE3885255D1 DE 3885255 D1 DE3885255 D1 DE 3885255D1 DE 88312235 T DE88312235 T DE 88312235T DE 3885255 T DE3885255 T DE 3885255T DE 3885255 D1 DE3885255 D1 DE 3885255D1
Authority
DE
Germany
Prior art keywords
manufacturing
field effect
effect transistor
gallium arsenide
arsenide field
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE88312235T
Other languages
English (en)
Other versions
DE3885255T2 (de
Inventor
Matthew Lee Balzan
Arthur Eugene Geissberger
Robert Allen Sadler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TE Connectivity Solutions GmbH
Original Assignee
International Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Standard Electric Corp filed Critical International Standard Electric Corp
Application granted granted Critical
Publication of DE3885255D1 publication Critical patent/DE3885255D1/de
Publication of DE3885255T2 publication Critical patent/DE3885255T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66848—Unipolar field-effect transistors with a Schottky gate, i.e. MESFET
    • H01L29/66856—Unipolar field-effect transistors with a Schottky gate, i.e. MESFET with an active layer made of a group 13/15 material
    • H01L29/66863—Lateral single gate transistors
    • H01L29/66878—Processes wherein the final gate is made before the formation, e.g. activation anneal, of the source and drain regions in the active layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28575—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds
    • H01L21/28581—Deposition of Schottky electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28575—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds
    • H01L21/28587—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds characterised by the sectional shape, e.g. T, inverted T
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/8252—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using III-V technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/47—Schottky barrier electrodes
    • H01L29/475—Schottky barrier electrodes on AIII-BV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66848—Unipolar field-effect transistors with a Schottky gate, i.e. MESFET
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/105—Masks, metal
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/131—Reactive ion etching rie
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/143—Shadow masking

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)
DE88312235T 1987-12-23 1988-12-22 Verfahren zum Herstellen eines Galliumarsenid-Feldeffekt-Transistors. Expired - Fee Related DE3885255T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/137,309 US4847212A (en) 1987-01-12 1987-12-23 Self-aligned gate FET process using undercut etch mask

Publications (2)

Publication Number Publication Date
DE3885255D1 true DE3885255D1 (de) 1993-12-02
DE3885255T2 DE3885255T2 (de) 1994-03-31

Family

ID=22476788

Family Applications (1)

Application Number Title Priority Date Filing Date
DE88312235T Expired - Fee Related DE3885255T2 (de) 1987-12-23 1988-12-22 Verfahren zum Herstellen eines Galliumarsenid-Feldeffekt-Transistors.

Country Status (4)

Country Link
US (1) US4847212A (de)
EP (1) EP0322243B1 (de)
JP (1) JP2677401B2 (de)
DE (1) DE3885255T2 (de)

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Publication number Priority date Publication date Assignee Title
EP0501275A3 (en) * 1991-03-01 1992-11-19 Motorola, Inc. Method of making symmetrical and asymmetrical mesfets
US5683936A (en) * 1995-01-27 1997-11-04 The Whitaker Corporation Reactive ion etched assisted gold post process
JP2953974B2 (ja) * 1995-02-03 1999-09-27 松下電子工業株式会社 半導体装置の製造方法
US5955763A (en) * 1997-09-16 1999-09-21 Winbond Electronics Corp. Low noise, high current-drive MOSFET structure for uniform serpentine-shaped poly-gate turn-on during an ESD event
JP3379062B2 (ja) * 1997-12-02 2003-02-17 富士通カンタムデバイス株式会社 半導体装置及びその製造方法
US6083836A (en) * 1997-12-23 2000-07-04 Texas Instruments Incorporated Transistors with substitutionally formed gate structures and method
US6107152A (en) * 1998-02-20 2000-08-22 Micron Technology, Inc. Method of forming tungsten nitride comprising layers using NF3 as a nitrogen source gas
US6313512B1 (en) * 1999-02-25 2001-11-06 Tyco Electronics Logistics Ag Low source inductance compact FET topology for power amplifiers
US6570466B1 (en) 2000-09-01 2003-05-27 Tyco Electronics Logistics Ag Ultra broadband traveling wave divider/combiner
US6472258B1 (en) * 2000-11-13 2002-10-29 International Business Machines Corporation Double gate trench transistor
JP2003045896A (ja) * 2001-07-26 2003-02-14 Honda Motor Co Ltd 半導体装置の製造方法
JP4439358B2 (ja) * 2003-09-05 2010-03-24 株式会社東芝 電界効果トランジスタ及びその製造方法
JP4866007B2 (ja) * 2005-01-14 2012-02-01 富士通株式会社 化合物半導体装置
US20070120153A1 (en) * 2005-11-29 2007-05-31 Advanced Analogic Technologies, Inc. Rugged MESFET for Power Applications
JP5329044B2 (ja) * 2007-01-22 2013-10-30 三菱電機株式会社 電界効果トランジスタ
EP2540790A4 (de) * 2010-02-25 2013-09-04 Dow Corning Toray Co Ltd Fleckenresistentes mittel
CN105845632A (zh) * 2015-01-15 2016-08-10 中芯国际集成电路制造(上海)有限公司 一种半导体器件及其制备方法、电子装置
US11842937B2 (en) * 2021-07-30 2023-12-12 Wolfspeed, Inc. Encapsulation stack for improved humidity performance and related fabrication methods

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US4434013A (en) * 1980-02-19 1984-02-28 Xerox Corporation Method of making a self-aligned Schottky metal semi-conductor field effect transistor with buried source and drain
US4366613A (en) * 1980-12-17 1983-01-04 Ibm Corporation Method of fabricating an MOS dynamic RAM with lightly doped drain
JPS57128071A (en) * 1981-01-30 1982-08-09 Fujitsu Ltd Field-effect type semiconductor device and manufacture thereof
US4396437A (en) * 1981-05-04 1983-08-02 Hughes Aircraft Company Selective encapsulation, controlled atmosphere annealing for III-V semiconductor device fabrication
JPS57197870A (en) * 1981-05-29 1982-12-04 Nec Corp Schottky barrier gate type field-effect transistor and manufacture thereof
US4601095A (en) * 1981-10-27 1986-07-22 Sumitomo Electric Industries, Ltd. Process for fabricating a Schottky-barrier gate field effect transistor
JPS58102564A (ja) * 1981-12-14 1983-06-18 Hitachi Ltd 電界効果トランジスタの製造方法
US4532695A (en) * 1982-07-02 1985-08-06 The United States Of America As Represented By The Secretary Of The Air Force Method of making self-aligned IGFET
JPS5950567A (ja) * 1982-09-16 1984-03-23 Hitachi Ltd 電界効果トランジスタの製造方法
JPS5955074A (ja) * 1982-09-24 1984-03-29 Fujitsu Ltd 半導体集積回路装置の製造方法
JPS5961059A (ja) * 1982-09-30 1984-04-07 Toshiba Corp 半導体装置の製造方法
JPS5999717A (ja) * 1982-11-29 1984-06-08 Fujitsu Ltd 半導体装置の製造方法
JPS59188974A (ja) * 1983-04-11 1984-10-26 Nec Corp 半導体装置の製造方法
JPS59193069A (ja) * 1983-04-15 1984-11-01 Nec Corp 半導体装置の製造方法
JPS60137070A (ja) * 1983-12-26 1985-07-20 Toshiba Corp 半導体装置の製造方法
JPS60145669A (ja) * 1984-01-09 1985-08-01 Nec Corp ＧａＡｓ電界効果トランジスタ
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US4956308A (en) * 1987-01-20 1990-09-11 Itt Corporation Method of making self-aligned field-effect transistor

Also Published As

Publication number Publication date
JP2677401B2 (ja) 1997-11-17
EP0322243A3 (en) 1990-03-07
EP0322243B1 (de) 1993-10-27
EP0322243A2 (de) 1989-06-28
JPH022640A (ja) 1990-01-08
DE3885255T2 (de) 1994-03-31
US4847212A (en) 1989-07-11

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: TYCO ELECTRONICS LOGISTICS AG, STEINACH, CH

8339 Ceased/non-payment of the annual fee