DE3683183D1 - Verfahren zum herstellen eines selbtsausrichtenden bipolartransistors. - Google Patents

Verfahren zum herstellen eines selbtsausrichtenden bipolartransistors.

Info

Publication number
DE3683183D1
DE3683183D1 DE8686302631T DE3683183T DE3683183D1 DE 3683183 D1 DE3683183 D1 DE 3683183D1 DE 8686302631 T DE8686302631 T DE 8686302631T DE 3683183 T DE3683183 T DE 3683183T DE 3683183 D1 DE3683183 D1 DE 3683183D1
Authority
DE
Germany
Prior art keywords
self
producing
bipolar transistor
aligning
aligning bipolar
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686302631T
Other languages
English (en)
Inventor
Osamu Hideshima
Hiroshi Goto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP60076055A external-priority patent/JPS61234563A/ja
Priority claimed from JP60137694A external-priority patent/JPS61296767A/ja
Priority claimed from JP60182262A external-priority patent/JPS6271272A/ja
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3683183D1 publication Critical patent/DE3683183D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/66272Silicon vertical transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42304Base electrodes for bipolar transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Bipolar Transistors (AREA)
DE8686302631T 1985-04-10 1986-04-09 Verfahren zum herstellen eines selbtsausrichtenden bipolartransistors. Expired - Fee Related DE3683183D1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP60076055A JPS61234563A (ja) 1985-04-10 1985-04-10 バイポ−ラトランジスタの形成方法
JP60137694A JPS61296767A (ja) 1985-06-26 1985-06-26 半導体装置の製造方法
JP60182262A JPS6271272A (ja) 1985-08-20 1985-08-20 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
DE3683183D1 true DE3683183D1 (de) 1992-02-13

Family

ID=27302038

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686302631T Expired - Fee Related DE3683183D1 (de) 1985-04-10 1986-04-09 Verfahren zum herstellen eines selbtsausrichtenden bipolartransistors.

Country Status (4)

Country Link
US (1) US4698127A (de)
EP (1) EP0199497B1 (de)
KR (1) KR890004973B1 (de)
DE (1) DE3683183D1 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4803175A (en) * 1987-09-14 1989-02-07 Motorola Inc. Method of fabricating a bipolar semiconductor device with silicide contacts
NL8800157A (nl) * 1988-01-25 1989-08-16 Philips Nv Halfgeleiderinrichting en werkwijze ter vervaardiging daarvan.
KR910005403B1 (ko) * 1988-09-23 1991-07-29 삼성전자 주식회사 고성능 바이폴라 트랜지스터 및 그 제조방법
GB2243716B (en) * 1988-11-02 1993-05-05 Hughes Aircraft Co Self-aligned,planar heterojunction bipolar transistor and method of forming the same
US5159423A (en) * 1988-11-02 1992-10-27 Hughes Aircraft Company Self-aligned, planar heterojunction bipolar transistor
JPH0529332A (ja) * 1991-07-22 1993-02-05 Rohm Co Ltd ヘテロ接合バイポーラトランジスタとその製造方法
US5306649A (en) * 1991-07-26 1994-04-26 Avantek, Inc. Method for producing a fully walled emitter-base structure in a bipolar transistor
US5258317A (en) * 1992-02-13 1993-11-02 Integrated Device Technology, Inc. Method for using a field implant mask to correct low doping levels at the outside edges of the base in a walled-emitter transistor structure
JP3343968B2 (ja) * 1992-12-14 2002-11-11 ソニー株式会社 バイポーラ型半導体装置およびその製造方法
US5631495A (en) * 1994-11-29 1997-05-20 International Business Machines Corporation High performance bipolar devices with plurality of base contact regions formed around the emitter layer
KR0171000B1 (ko) * 1995-12-15 1999-02-01 양승택 자동 정의된 베이스 전극을 갖는 바이폴라 트랜지스터 구조 및 그 제조방법
GB9600469D0 (en) * 1996-01-10 1996-03-13 Secr Defence Three dimensional etching process
EP1128422A1 (de) * 2000-02-22 2001-08-29 Infineon Technologies AG Verfahren zur Herstellung eines bipolaren Transistors im BiCMOS-Prozess
US6911716B2 (en) * 2002-09-09 2005-06-28 Lucent Technologies, Inc. Bipolar transistors with vertical structures
CN100478741C (zh) 2003-07-08 2009-04-15 皇家飞利浦电子股份有限公司 具有自适应透射率的太阳眼镜
JP2005032930A (ja) * 2003-07-10 2005-02-03 Toshiba Corp 半導体装置及びその製造方法
WO2006114746A2 (en) * 2005-04-28 2006-11-02 Nxp B.V. Bipolar transistor and method of fabricating the same

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4301588A (en) * 1980-02-01 1981-11-24 International Business Machines Corporation Consumable amorphous or polysilicon emitter process
US4381953A (en) * 1980-03-24 1983-05-03 International Business Machines Corporation Polysilicon-base self-aligned bipolar transistor process
CA1153830A (en) * 1980-03-24 1983-09-13 Allen P. Ho Polysilicon-base self-aligned bipolar transistor process and structure
US4319932A (en) * 1980-03-24 1982-03-16 International Business Machines Corporation Method of making high performance bipolar transistor with polysilicon base contacts
JPS59159563A (ja) * 1983-03-02 1984-09-10 Toshiba Corp 半導体装置の製造方法
JPS59217364A (ja) * 1983-05-26 1984-12-07 Sony Corp 半導体装置の製法
JPS6024059A (ja) * 1983-07-19 1985-02-06 Sony Corp 半導体装置の製造方法
US4444620A (en) * 1983-09-12 1984-04-24 Bell Telephone Laboratories, Incorporated Growth of oriented single crystal semiconductor on insulator

Also Published As

Publication number Publication date
EP0199497B1 (de) 1992-01-02
US4698127A (en) 1987-10-06
EP0199497A3 (en) 1988-02-10
KR890004973B1 (ko) 1989-12-02
EP0199497A2 (de) 1986-10-29
KR860008617A (ko) 1986-11-17

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee