DE3875985D1 - Logische schaltung mit feldeffekttransistor, der eine verbindung mit gleichrichtender charakteristik zwischen gatter und quelle aufweist. - Google Patents
Logische schaltung mit feldeffekttransistor, der eine verbindung mit gleichrichtender charakteristik zwischen gatter und quelle aufweist.Info
- Publication number
- DE3875985D1 DE3875985D1 DE8888301948T DE3875985T DE3875985D1 DE 3875985 D1 DE3875985 D1 DE 3875985D1 DE 8888301948 T DE8888301948 T DE 8888301948T DE 3875985 T DE3875985 T DE 3875985T DE 3875985 D1 DE3875985 D1 DE 3875985D1
- Authority
- DE
- Germany
- Prior art keywords
- gate
- source
- connection
- field effect
- effect transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M5/00—Conversion of the form of the representation of individual digits
- H03M5/02—Conversion to or from representation by pulses
- H03M5/16—Conversion to or from representation by pulses the pulses having three levels
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
- H03K19/21—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical
- H03K19/215—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical using field-effect transistors
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Theoretical Computer Science (AREA)
- Logic Circuits (AREA)
- Electronic Switches (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5395287 | 1987-03-11 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3875985D1 true DE3875985D1 (de) | 1992-12-24 |
DE3875985T2 DE3875985T2 (de) | 1993-04-01 |
Family
ID=12957054
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8888301948T Expired - Fee Related DE3875985T2 (de) | 1987-03-11 | 1988-03-07 | Logische schaltung mit feldeffekttransistor, der eine verbindung mit gleichrichtender charakteristik zwischen gatter und quelle aufweist. |
Country Status (4)
Country | Link |
---|---|
US (1) | US4900953A (de) |
EP (1) | EP0282249B1 (de) |
KR (1) | KR900008803B1 (de) |
DE (1) | DE3875985T2 (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3429821B2 (ja) * | 1992-11-04 | 2003-07-28 | テキサス インスツルメンツ インコーポレイテツド | 多機能共鳴トンネリング論理ゲート |
JP2002217416A (ja) * | 2001-01-16 | 2002-08-02 | Hitachi Ltd | 半導体装置 |
US7180762B2 (en) * | 2004-08-23 | 2007-02-20 | International Rectifier Corporation | Cascoded rectifier |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4048518A (en) * | 1976-02-10 | 1977-09-13 | Intel Corporation | MOS buffer circuit |
JPS58114528A (ja) * | 1981-12-26 | 1983-07-07 | Toshiba Corp | GaAs論理集積回路 |
US4743782A (en) * | 1984-11-09 | 1988-05-10 | Honeywell Inc. | GaAs level-shift logic interface circuit |
JPS6297427A (ja) * | 1985-08-09 | 1987-05-06 | Sumitomo Electric Ind Ltd | 半導体装置 |
-
1988
- 1988-03-02 US US07/163,508 patent/US4900953A/en not_active Expired - Lifetime
- 1988-03-04 KR KR8802254A patent/KR900008803B1/ko not_active IP Right Cessation
- 1988-03-07 EP EP88301948A patent/EP0282249B1/de not_active Expired - Lifetime
- 1988-03-07 DE DE8888301948T patent/DE3875985T2/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR900008803B1 (en) | 1990-11-29 |
JPS64817A (en) | 1989-01-05 |
US4900953A (en) | 1990-02-13 |
KR880012012A (ko) | 1988-10-31 |
EP0282249A3 (en) | 1989-11-08 |
EP0282249B1 (de) | 1992-11-19 |
EP0282249A2 (de) | 1988-09-14 |
DE3875985T2 (de) | 1993-04-01 |
JPH0543216B2 (de) | 1993-07-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |