DE3586523D1 - Halbleiterspeicheranordnung mit einer seriellen dateneingangs- und ausgangsschaltung. - Google Patents

Halbleiterspeicheranordnung mit einer seriellen dateneingangs- und ausgangsschaltung.

Info

Publication number
DE3586523D1
DE3586523D1 DE8585307355T DE3586523T DE3586523D1 DE 3586523 D1 DE3586523 D1 DE 3586523D1 DE 8585307355 T DE8585307355 T DE 8585307355T DE 3586523 T DE3586523 T DE 3586523T DE 3586523 D1 DE3586523 D1 DE 3586523D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
data input
output circuit
serial data
memory arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8585307355T
Other languages
English (en)
Other versions
DE3586523T2 (de
Inventor
Junji Ogawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP59216057A external-priority patent/JPS6196591A/ja
Priority claimed from JP59218706A external-priority patent/JPS61122991A/ja
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3586523D1 publication Critical patent/DE3586523D1/de
Publication of DE3586523T2 publication Critical patent/DE3586523T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1087—Data input latches
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1075—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for multiport memories each having random access ports and serial ports, e.g. video RAM
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
DE8585307355T 1984-10-17 1985-10-14 Halbleiterspeicheranordnung mit einer seriellen dateneingangs- und ausgangsschaltung. Expired - Fee Related DE3586523T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP59216057A JPS6196591A (ja) 1984-10-17 1984-10-17 半導体記憶装置
JP59218706A JPS61122991A (ja) 1984-10-19 1984-10-19 半導体記憶装置

Publications (2)

Publication Number Publication Date
DE3586523D1 true DE3586523D1 (de) 1992-09-24
DE3586523T2 DE3586523T2 (de) 1993-01-07

Family

ID=26521207

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585307355T Expired - Fee Related DE3586523T2 (de) 1984-10-17 1985-10-14 Halbleiterspeicheranordnung mit einer seriellen dateneingangs- und ausgangsschaltung.

Country Status (4)

Country Link
US (1) US4733376A (de)
EP (1) EP0179605B1 (de)
KR (1) KR900008939B1 (de)
DE (1) DE3586523T2 (de)

Families Citing this family (59)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB8414109D0 (en) * 1984-06-02 1984-07-04 Int Computers Ltd Data reorganisation apparatus
US4829471A (en) * 1986-02-07 1989-05-09 Advanced Micro Devices, Inc. Data load sequencer for multiple data line serializer
JPH0754638B2 (ja) * 1986-02-18 1995-06-07 松下電子工業株式会社 シフトレジスタ
JPS62287497A (ja) * 1986-06-06 1987-12-14 Fujitsu Ltd 半導体記憶装置
EP0257987B1 (de) * 1986-08-22 1991-11-06 Fujitsu Limited Halbleiter-Speicheranordnung
US4809232A (en) * 1986-12-16 1989-02-28 The United States Of America As Represented By The United States Department Of Energy High speed, very large (8 megabyte) first in/first out buffer memory (FIFO)
US4789960A (en) * 1987-01-30 1988-12-06 Rca Licensing Corporation Dual port video memory system having semi-synchronous data input and data output
US4823302A (en) * 1987-01-30 1989-04-18 Rca Licensing Corporation Block oriented random access memory able to perform a data read, a data write and a data refresh operation in one block-access time
US4899307A (en) * 1987-04-10 1990-02-06 Tandem Computers Incorporated Stack with unary encoded stack pointer
US5313420A (en) 1987-04-24 1994-05-17 Kabushiki Kaisha Toshiba Programmable semiconductor memory
US4805139A (en) * 1987-10-22 1989-02-14 Advanced Micro Devices, Inc. Propagating FIFO storage device
JPH0748301B2 (ja) * 1987-12-04 1995-05-24 富士通株式会社 半導体記憶装置
JPH0760595B2 (ja) * 1988-01-12 1995-06-28 日本電気株式会社 半導体メモリ
US5198999A (en) * 1988-09-12 1993-03-30 Kabushiki Kaisha Toshiba Serial input/output semiconductor memory including an output data latch circuit
JPH02168496A (ja) * 1988-09-14 1990-06-28 Kawasaki Steel Corp 半導体メモリ回路
DE68919404T2 (de) * 1988-09-20 1995-03-30 Fujitsu Ltd Halbleiterspeicher mit Serieneingang/Serienausgang.
DE3855180T2 (de) * 1988-10-24 1996-10-02 Toshiba Kawasaki Kk Programmierbarer Halbleiterspeicher
EP0446847B1 (de) * 1990-03-12 1998-06-17 Nec Corporation Halbleiterspeicheranordnung mit einem verbesserten Schreibmodus
JP2715004B2 (ja) * 1991-01-07 1998-02-16 三菱電機株式会社 半導体メモリ装置
JP3302726B2 (ja) * 1992-07-31 2002-07-15 株式会社東芝 半導体記憶装置
JP3096362B2 (ja) * 1992-10-26 2000-10-10 沖電気工業株式会社 シリアルアクセスメモリ
US5388074A (en) * 1992-12-17 1995-02-07 Vlsi Technology, Inc. FIFO memory using single output register
JP3251421B2 (ja) * 1994-04-11 2002-01-28 株式会社日立製作所 半導体集積回路
SE515737C2 (sv) * 1995-03-22 2001-10-01 Ericsson Telefon Ab L M Anordning och förfarande avseende hantering av digitala signaler och en behandlingsanordning omfattande en dylik
AUPO647997A0 (en) * 1997-04-30 1997-05-22 Canon Information Systems Research Australia Pty Ltd Memory controller architecture
US6094396A (en) * 1998-11-18 2000-07-25 Winbond Electronics Corporation Memory array architecture for multi-data rate operation
US6457094B2 (en) 1999-01-22 2002-09-24 Winbond Electronics Corporation Memory array architecture supporting block write operation
KR100816915B1 (ko) 2000-07-07 2008-03-26 모사이드 테크놀로지스, 인코포레이티드 일정한 액세스 레이턴시를 지닌 고속 ｄｒａｍ 및 메모리 소자
US20070165457A1 (en) * 2005-09-30 2007-07-19 Jin-Ki Kim Nonvolatile memory system
US7747833B2 (en) 2005-09-30 2010-06-29 Mosaid Technologies Incorporated Independent link and bank selection
US7652922B2 (en) * 2005-09-30 2010-01-26 Mosaid Technologies Incorporated Multiple independent serial link memory
EP1932158A4 (de) * 2005-09-30 2008-10-15 Mosaid Technologies Inc Speicher mit ausgangssteuerung
US11948629B2 (en) 2005-09-30 2024-04-02 Mosaid Technologies Incorporated Non-volatile memory device with concurrent bank operations
US20070076502A1 (en) * 2005-09-30 2007-04-05 Pyeon Hong B Daisy chain cascading devices
US8364861B2 (en) * 2006-03-28 2013-01-29 Mosaid Technologies Incorporated Asynchronous ID generation
US8069328B2 (en) 2006-03-28 2011-11-29 Mosaid Technologies Incorporated Daisy chain cascade configuration recognition technique
US8335868B2 (en) * 2006-03-28 2012-12-18 Mosaid Technologies Incorporated Apparatus and method for establishing device identifiers for serially interconnected devices
US7551492B2 (en) 2006-03-29 2009-06-23 Mosaid Technologies, Inc. Non-volatile semiconductor memory with page erase
EP2242058B1 (de) * 2006-03-31 2014-07-16 Mosaid Technologies Incorporated Flash-speichersystem-steuerverfahren
US7904639B2 (en) * 2006-08-22 2011-03-08 Mosaid Technologies Incorporated Modular command structure for memory and memory system
US8700818B2 (en) * 2006-09-29 2014-04-15 Mosaid Technologies Incorporated Packet based ID generation for serially interconnected devices
US20100315394A1 (en) * 2006-10-19 2010-12-16 Hiromi Katoh Display apparatus
US7817470B2 (en) 2006-11-27 2010-10-19 Mosaid Technologies Incorporated Non-volatile memory serial core architecture
US8010709B2 (en) * 2006-12-06 2011-08-30 Mosaid Technologies Incorporated Apparatus and method for producing device identifiers for serially interconnected devices of mixed type
US8331361B2 (en) 2006-12-06 2012-12-11 Mosaid Technologies Incorporated Apparatus and method for producing device identifiers for serially interconnected devices of mixed type
US7853727B2 (en) * 2006-12-06 2010-12-14 Mosaid Technologies Incorporated Apparatus and method for producing identifiers regardless of mixed device type in a serial interconnection
US8271758B2 (en) 2006-12-06 2012-09-18 Mosaid Technologies Incorporated Apparatus and method for producing IDS for interconnected devices of mixed type
US7818464B2 (en) * 2006-12-06 2010-10-19 Mosaid Technologies Incorporated Apparatus and method for capturing serial input data
US7529149B2 (en) * 2006-12-12 2009-05-05 Mosaid Technologies Incorporated Memory system and method with serial and parallel modes
US8984249B2 (en) * 2006-12-20 2015-03-17 Novachips Canada Inc. ID generation apparatus and method for serially interconnected devices
US8010710B2 (en) * 2007-02-13 2011-08-30 Mosaid Technologies Incorporated Apparatus and method for identifying device type of serially interconnected devices
WO2008098342A1 (en) * 2007-02-16 2008-08-21 Mosaid Technologies Incorporated Semiconductor device and method for reducing power consumption in a system having interconnected devices
US8086785B2 (en) * 2007-02-22 2011-12-27 Mosaid Technologies Incorporated System and method of page buffer operation for memory devices
WO2008101316A1 (en) * 2007-02-22 2008-08-28 Mosaid Technologies Incorporated Apparatus and method for using a page buffer of a memory device as a temporary cache
US7796462B2 (en) 2007-02-22 2010-09-14 Mosaid Technologies Incorporated Data flow control in multiple independent port
US7913128B2 (en) * 2007-11-23 2011-03-22 Mosaid Technologies Incorporated Data channel test apparatus and method thereof
US7983099B2 (en) * 2007-12-20 2011-07-19 Mosaid Technologies Incorporated Dual function compatible non-volatile memory device
US7940572B2 (en) * 2008-01-07 2011-05-10 Mosaid Technologies Incorporated NAND flash memory having multiple cell substrates
KR101315866B1 (ko) * 2012-03-19 2013-10-08 주식회사 티엘아이 출력 속도를 향상시키는 데이터 전송 회로

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3763480A (en) * 1971-10-12 1973-10-02 Rca Corp Digital and analog data handling devices
NL7309642A (nl) * 1973-07-11 1975-01-14 Philips Nv Geintegreerd geheugen.
US4060801A (en) * 1976-08-13 1977-11-29 General Electric Company Method and apparatus for non-scan matrix addressing of bar displays
DE2658502C3 (de) * 1976-12-23 1980-01-24 Dr.-Ing. Rudolf Hell Gmbh, 2300 Kiel Einrichtung zur Herstellung gerasterter Druckformen
JPS5394140A (en) * 1977-01-28 1978-08-17 Hitachi Ltd Memory integrated circuit
JPS6028012B2 (ja) * 1980-06-28 1985-07-02 日本電気株式会社 デ−タ速度変換器
JPS5727477A (en) * 1980-07-23 1982-02-13 Nec Corp Memory circuit
US4412313A (en) * 1981-01-19 1983-10-25 Bell Telephone Laboratories, Incorporated Random access memory system having high-speed serial data paths
SE430589B (sv) * 1982-04-01 1983-11-28 Norvalve Ab Aktivator for fluidisering av trogrorligt material i behallare
JPS6194296A (ja) * 1984-10-16 1986-05-13 Fujitsu Ltd 半導体記憶装置

Also Published As

Publication number Publication date
DE3586523T2 (de) 1993-01-07
KR860003608A (ko) 1986-05-28
US4733376A (en) 1988-03-22
EP0179605B1 (de) 1992-08-19
KR900008939B1 (en) 1990-12-13
EP0179605A3 (en) 1988-08-10
EP0179605A2 (de) 1986-04-30

Similar Documents

Publication Publication Date Title
DE3586523T2 (de) Halbleiterspeicheranordnung mit einer seriellen dateneingangs- und ausgangsschaltung.
DE3584241D1 (de) Halbleiterspeicheranordnung mit einer seriellen dateneingangs und -ausgangsschaltung.
DE3689209T2 (de) Direkte Ein-- und Ausgabe in einer virtuellen Speicheranordnung.
DE3485595D1 (de) Halbleiterspeicher mit einer speicherstruktur mit vielfachen pegeln.
DE3583629D1 (de) Integrierte schaltung mit einer schmelzsicherungsschaltung.
DE3888220D1 (de) Datenausgabeschaltung.
DE3584142D1 (de) Integrierte halbleiterschaltungsanordnung mit eingebauten speichern.
DE3586375D1 (de) Halbleiterspeicheranordnung mit einer redundanzschaltung.
DE3885532D1 (de) Halbleiter-Speicherschaltung mit einer Verzögerungsschaltung.
DE3582976D1 (de) Datenverzoegerungs- und speicherschaltung.
DE3889612D1 (de) Dateneingangs-/-ausgangsschaltung.
DE3582457D1 (de) Halbleitervorrichtung mit eingangs-/ausgangsschutzschaltung.
DE68919404T2 (de) Halbleiterspeicher mit Serieneingang/Serienausgang.
DE3485418D1 (de) Datenverarbeitungssystem mit ausgangsschaltkreis.
DE3583886D1 (de) Integrierte schaltung mit einer eingangsschutzanordnung.
DE68908318T2 (de) Halbleiterspeicher mit Serieneingang/Serienausgang.
DE68921440D1 (de) Halbleiterspeicherschaltung mit einer verbesserten Wiederherstellungssteuerschaltung.
DE68914073T2 (de) Integrierte Speicherschaltung mit parallelem und seriellem Ein- und Ausgang.
DE68915050T2 (de) Chipfreigabe-Eingangsschaltung in einer Halbleiterspeicheranordnung.
DE3581345D1 (de) Datenausgabegeraet.
DE3777558D1 (de) Integrierte speicherschaltung mit einer einzigen schreibe-busschaltung.
DE3778470D1 (de) Halbleiterspeicheranordnung mit einer datenbus-ruecksetzungsschaltung.
DE3581784D1 (de) Signaltransmissionsschaltung in einer integrierten halbleiterschaltung.
DE3582335D1 (de) Signaluebertragungsschaltung und speicheranordnung mit einer solchen schaltung.
DE3581936D1 (de) Integrierte logikschaltung.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee