DE3582976D1 - Datenverzoegerungs- und speicherschaltung. - Google Patents

Datenverzoegerungs- und speicherschaltung.

Info

Publication number: DE3582976D1
Authority: DE; Germany
Prior art keywords: memory circuit; data delay; delay; data; memory
Prior art date: 1984-08-07
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Lifetime

Application number

DE8585109725T

Other languages

English (en)

Inventor

Sigeru C O Patent Divisio Nose

Seigo C O Patent Divisi Suzuki

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Toshiba Corp

Original Assignee

Toshiba Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1984-08-07

Filing date

1985-08-02

Publication date

1991-07-04

1985-08-02 Application filed by Toshiba Corp filed Critical Toshiba Corp

1991-07-04 Application granted granted Critical

1991-07-04 Publication of DE3582976D1 publication Critical patent/DE3582976D1/de

2005-08-03 Anticipated expiration legal-status Critical

Status Expired - Lifetime legal-status Critical Current

Links

Classifications

- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers

DE8585109725T 1984-08-07 1985-08-02 Datenverzoegerungs- und speicherschaltung. Expired - Lifetime DE3582976D1 (de)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
JP59165132A JPS6143015A (ja)	1984-08-07	1984-08-07	デ−タ遅延記憶回路

Publications (1)

Publication Number	Publication Date
DE3582976D1 true DE3582976D1 (de)	1991-07-04

Family

ID=15806505

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE8585109725T Expired - Lifetime DE3582976D1 (de)	1984-08-07	1985-08-02	Datenverzoegerungs- und speicherschaltung.

Country Status (4)

Country	Link
US (1)	US4802136A (de)
EP (1)	EP0171720B1 (de)
JP (1)	JPS6143015A (de)
DE (1)	DE3582976D1 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPH01214993A (ja) *	1988-02-23	1989-08-29	Nissan Motor Co Ltd	データ記憶装置
JPH0221499A (ja) *	1988-07-07	1990-01-24	Toshiba Corp	サンプルホールド回路
JP2654202B2 (ja) *	1989-10-04	1997-09-17	日本電気アイシーマイコンシステム株式会社	ディジタル位相比較器
US5946244A (en)	1997-03-05	1999-08-31	Micron Technology, Inc.	Delay-locked loop with binary-coupled capacitor
US5774403A (en) *	1997-06-12	1998-06-30	Hewlett-Packard	PVT self aligning internal delay line and method of operation
US6173432B1 (en)	1997-06-20	2001-01-09	Micron Technology, Inc.	Method and apparatus for generating a sequence of clock signals
US6269451B1 (en)	1998-02-27	2001-07-31	Micron Technology, Inc.	Method and apparatus for adjusting data timing by delaying clock signal
US6049883A (en) *	1998-04-01	2000-04-11	Tjandrasuwita; Ignatius B.	Data path clock skew management in a dynamic power management environment
US6338127B1 (en)	1998-08-28	2002-01-08	Micron Technology, Inc.	Method and apparatus for resynchronizing a plurality of clock signals used to latch respective digital signals, and memory device using same
US6349399B1 (en)	1998-09-03	2002-02-19	Micron Technology, Inc.	Method and apparatus for generating expect data from a captured bit pattern, and memory device using same
US6430696B1 (en) *	1998-11-30	2002-08-06	Micron Technology, Inc.	Method and apparatus for high speed data capture utilizing bit-to-bit timing correction, and memory device using same
US6374360B1 (en)	1998-12-11	2002-04-16	Micron Technology, Inc.	Method and apparatus for bit-to-bit timing correction of a high speed memory bus
US6470060B1 (en)	1999-03-01	2002-10-22	Micron Technology, Inc.	Method and apparatus for generating a phase dependent control signal
US6801989B2 (en)	2001-06-28	2004-10-05	Micron Technology, Inc.	Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same
US6940753B2 (en) *	2002-09-24	2005-09-06	Sandisk Corporation	Highly compact non-volatile memory and method therefor with space-efficient data registers
US6891753B2 (en) *	2002-09-24	2005-05-10	Sandisk Corporation	Highly compact non-volatile memory and method therefor with internal serial buses
US6983428B2 (en)	2002-09-24	2006-01-03	Sandisk Corporation	Highly compact non-volatile memory and method thereof
US7168027B2 (en)	2003-06-12	2007-01-23	Micron Technology, Inc.	Dynamic synchronization of data capture on an optical or other high speed communications link
WO2009079014A1 (en) *	2007-12-18	2009-06-25	President And Fellows Of Harvard College	Nand implementation for high bandwidth applications
US7974124B2 (en) *	2009-06-24	2011-07-05	Sandisk Corporation	Pointer based column selection techniques in non-volatile memories
US8842473B2 (en)	2012-03-15	2014-09-23	Sandisk Technologies Inc.	Techniques for accessing column selecting shift register with skipped entries in non-volatile memories

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US3369226A (en) *	1964-05-12	1968-02-13	Honeywell Inc	Digital data storage and transfer circuitry
US3648066A (en) *	1969-06-30	1972-03-07	Ibm	Three-phase dynamic shift register
US3763480A (en) *	1971-10-12	1973-10-02	Rca Corp	Digital and analog data handling devices
US4092734A (en) *	1971-12-14	1978-05-30	Texas Instruments Incorporated	Analogue memory
US3953837A (en) *	1974-11-27	1976-04-27	Texas Instruments Incorporated	Dual serial-parallel-serial analog memory
US3914750A (en) *	1974-12-05	1975-10-21	Us Army	MNOS Memory matrix with shift register input and output
DE2558287C2 (de) *	1974-12-23	1983-07-28	Casio Computer Co., Ltd., Tokyo	Informationsspeicher
FR2428945A1 (fr) *	1978-06-13	1980-01-11	Thomson Csf	Dispositif de numerisation de signaux transitoires
DE2851111C2 (de) *	1978-11-25	1980-09-25	Deutsche Itt Industries Gmbh, 7800 Freiburg	Zweidimensionale Analog-Speicheranordnung
JPS55129912A (en) *	1979-03-29	1980-10-08	Fujitsu Ltd	Recording device
US4306160A (en) *	1979-07-25	1981-12-15	Hughes Aircraft Company	Charge coupled device staircase electrode multiplexer
JPS5963093A (ja) *	1982-09-30	1984-04-10	Fujitsu Ltd	メモリ回路
JPS59119594A (ja) *	1982-12-27	1984-07-10	Fujitsu Ltd	ダイナミツクシフト回路
JPS59151537A (ja) *	1983-01-29	1984-08-30	Toshiba Corp	相補ｍｏｓ形回路
JPS607697A (ja) *	1983-06-24	1985-01-16	Mitsubishi Electric Corp	相補型半導体集積回路

1984
- 1984-08-07 JP JP59165132A patent/JPS6143015A/ja active Pending
1985
- 1985-08-02 DE DE8585109725T patent/DE3582976D1/de not_active Expired - Lifetime
- 1985-08-02 EP EP85109725A patent/EP0171720B1/de not_active Expired
1988
- 1988-04-29 US US07/188,672 patent/US4802136A/en not_active Expired - Lifetime

Also Published As

Publication number	Publication date
EP0171720B1 (de)	1991-05-29
US4802136A (en)	1989-01-31
JPS6143015A (ja)	1986-03-01
EP0171720A2 (de)	1986-02-19
EP0171720A3 (en)	1988-07-27

Legal Events

Date	Code	Title	Description
1992-05-27	8363	Opposition against the patent
1995-03-02	8331	Complete revocation

Publication	Publication Date	Title
DE3582976D1 (de)	1991-07-04	Datenverzoegerungs- und speicherschaltung.
DE3888220D1 (de)	1994-04-14	Datenausgabeschaltung.
FI850868A0 (fi)	1985-03-04	Elektroniskt stroe-system.
DE3587400D1 (de)	1993-07-22	Datenspeicherungsanordnung.
DE3587116D1 (de)	1993-04-01	Datenprozessor.
DE3685179D1 (de)	1992-06-11	Speicherkarte.
DE3485038D1 (de)	1991-10-17	Mos-speicher.
DE3687787D1 (de)	1993-03-25	Speicherzugriff-steuerungsschaltung.
DE3576236D1 (de)	1990-04-05	Halbleiterspeicheranordnung.
DE3577367D1 (de)	1990-05-31	Halbleiterspeicheranordnung.
DE3484517D1 (de)	1991-06-06	Daten-interpolationsschaltung.
FR2609831B1 (fr)	1989-03-31	Circuit de lecture pour memoire
DE3575225D1 (de)	1990-02-08	Halbleiterspeicheranordnung.
DE3776049D1 (de)	1992-02-27	Elektronische gedaechtnisstuetze.
DE3486051D1 (de)	1993-03-11	Informationshalteschaltung.
DE3576754D1 (de)	1990-04-26	Halbleiterspeicheranordnung.
DE3585811D1 (de)	1992-05-14	Direktzugriffsspeicher.
DE3581596D1 (de)	1991-03-07	Festwertspeicherschaltung.
DE3482654D1 (de)	1990-08-09	Datenspeichergeraet.
DE3586736D1 (de)	1992-11-12	Halbleiterspeicher.
DE3581094D1 (de)	1991-02-07	Logische addierschaltung.
DE3580768D1 (de)	1991-01-17	Datenspeicherelement.
DE3484830D1 (de)	1991-08-29	Fensteradressierbare speicherschaltung.
FR2610134B1 (fr)	1989-03-31	Circuit de lecture pour memoire
DE3883064D1 (de)	1993-09-16	Festwertspeicherschaltung.