DE3569067D1 - Semiconductor memory device wirings - Google Patents

Semiconductor memory device wirings

Info

Publication number
DE3569067D1
DE3569067D1 DE8585308564T DE3569067T DE3569067D1 DE 3569067 D1 DE3569067 D1 DE 3569067D1 DE 8585308564 T DE8585308564 T DE 8585308564T DE 3569067 T DE3569067 T DE 3569067T DE 3569067 D1 DE3569067 D1 DE 3569067D1
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
device wirings
wirings
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8585308564T
Other languages
English (en)
Inventor
Taiji Ema
Takashi Yabu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3569067D1 publication Critical patent/DE3569067D1/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222Capacitive arrangements or effects of, or between wiring layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528Geometry or layout of the interconnection structure
    • H01L23/5283Cross-sectional geometry
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Geometry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Memories (AREA)
DE8585308564T 1984-11-26 1985-11-26 Semiconductor memory device wirings Expired DE3569067D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59248946A JPS61127161A (ja) 1984-11-26 1984-11-26 半導体記憶装置

Publications (1)

Publication Number Publication Date
DE3569067D1 true DE3569067D1 (en) 1989-04-27

Family

ID=17185768

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585308564T Expired DE3569067D1 (en) 1984-11-26 1985-11-26 Semiconductor memory device wirings

Country Status (5)

Country Link
US (1) US4807017A (de)
EP (1) EP0183517B1 (de)
JP (1) JPS61127161A (de)
KR (1) KR900000634B1 (de)
DE (1) DE3569067D1 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0787219B2 (ja) * 1986-09-09 1995-09-20 三菱電機株式会社 半導体記憶装置
JPH07120755B2 (ja) * 1986-10-24 1995-12-20 日本電気株式会社 半導体記憶装置
DE3807162A1 (de) * 1987-07-02 1989-01-12 Mitsubishi Electric Corp Halbleiterspeichereinrichtung
JP2712079B2 (ja) * 1988-02-15 1998-02-10 株式会社東芝 半導体装置
JPH0263163A (ja) * 1988-08-29 1990-03-02 Nec Corp 不揮発性半導体記憶装置
FR2638285B1 (fr) * 1988-10-25 1992-06-19 Commissariat Energie Atomique Circuit integre a haute densite d'integration tel que memoire eprom et procede d'obtention correspondant
JP2503661B2 (ja) * 1989-06-28 1996-06-05 日本電気株式会社 半導体メモリ素子およびその製造方法
JPH03109767A (ja) * 1989-09-25 1991-05-09 Nec Corp 半導体集積回路装置
US5170243A (en) * 1991-11-04 1992-12-08 International Business Machines Corporation Bit line configuration for semiconductor memory
JPH09252058A (ja) * 1996-03-15 1997-09-22 Rohm Co Ltd 半導体記憶装置の製造方法および半導体記憶装置
US5751038A (en) * 1996-11-26 1998-05-12 Philips Electronics North America Corporation Electrically erasable and programmable read only memory (EEPROM) having multiple overlapping metallization layers
US5877976A (en) * 1997-10-28 1999-03-02 International Business Machines Corporation Memory system having a vertical bitline topology and method therefor
DE10155023B4 (de) * 2001-11-05 2008-11-06 Qimonda Ag Leitungsanordnung für Bitleitungen zur Kontaktierung mindestens einer Speicherzelle und Verfahren zur Herstellung einer Leitungsanordnung für Bitleitungen

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4001871A (en) * 1968-06-17 1977-01-04 Nippon Electric Company, Ltd. Semiconductor device
US3946421A (en) * 1974-06-28 1976-03-23 Texas Instruments Incorporated Multi phase double level metal charge coupled device
DE2720533A1 (de) * 1977-05-06 1978-11-09 Siemens Ag Monolithisch integrierte schaltungsanordnung mit ein-transistor- speicherelementen
DE2743619A1 (de) * 1977-09-28 1979-03-29 Siemens Ag Halbleiter-speicherelement und verfahren zu seiner herstellung
US4328563A (en) * 1979-01-12 1982-05-04 Mostek Corporation High density read only memory
EP0154685B1 (de) * 1980-01-25 1990-04-18 Kabushiki Kaisha Toshiba Halbleiterspeichervorrichtung
US4536941A (en) * 1980-03-21 1985-08-27 Kuo Chang Kiang Method of making high density dynamic memory cell
JPS602784B2 (ja) * 1982-12-20 1985-01-23 富士通株式会社 半導体記憶装置

Also Published As

Publication number Publication date
KR900000634B1 (ko) 1990-02-01
KR860004461A (ko) 1986-06-23
EP0183517A3 (en) 1986-12-30
EP0183517B1 (de) 1989-03-22
US4807017A (en) 1989-02-21
EP0183517A2 (de) 1986-06-04
JPS61127161A (ja) 1986-06-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee