DE3382350D1 - Anordnung zum vorabholen von befehlen mit vorhersage einer verzweigungszieladresse. - Google Patents

Anordnung zum vorabholen von befehlen mit vorhersage einer verzweigungszieladresse.

Info

Publication number
DE3382350D1
DE3382350D1 DE8383111451T DE3382350T DE3382350D1 DE 3382350 D1 DE3382350 D1 DE 3382350D1 DE 8383111451 T DE8383111451 T DE 8383111451T DE 3382350 T DE3382350 T DE 3382350T DE 3382350 D1 DE3382350 D1 DE 3382350D1
Authority
DE
Germany
Prior art keywords
predicting
arrangement
target address
branch target
retrieving commands
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8383111451T
Other languages
English (en)
Inventor
Syuichi Hanatani
Masanobu Akagi
Kouemon Nigo
Ritsuo Sugaya
Toshiteru Shibuya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP20155982A external-priority patent/JPS5991554A/ja
Priority claimed from JP57201550A external-priority patent/JPS5991549A/ja
Priority claimed from JP57201556A external-priority patent/JPS5991551A/ja
Priority claimed from JP57201555A external-priority patent/JPS5991550A/ja
Priority claimed from JP20155882A external-priority patent/JPS5991553A/ja
Priority claimed from JP57201557A external-priority patent/JPS5991552A/ja
Priority claimed from JP5294683A external-priority patent/JPS59177653A/ja
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE3382350D1 publication Critical patent/DE3382350D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
    • G06F9/3806—Instruction prefetching for branches, e.g. hedging, branch folding using address prediction, e.g. return stack, branch history buffer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G06F9/3844—Speculative instruction execution using dynamic branch prediction, e.g. using branch history tables

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
DE8383111451T 1982-11-17 1983-11-15 Anordnung zum vorabholen von befehlen mit vorhersage einer verzweigungszieladresse. Expired - Fee Related DE3382350D1 (de)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
JP20155982A JPS5991554A (ja) 1982-11-17 1982-11-17 分岐方向予測を行なう命令先取り装置
JP57201550A JPS5991549A (ja) 1982-11-17 1982-11-17 命令バツフアへの命令語格納方式
JP57201556A JPS5991551A (ja) 1982-11-17 1982-11-17 分岐先アドレス予測を行なう命令先取り装置
JP57201555A JPS5991550A (ja) 1982-11-17 1982-11-17 命令先取り装置
JP20155882A JPS5991553A (ja) 1982-11-17 1982-11-17 実アドレス分岐ヒストリテ−ブルを有する命令先取り装置
JP57201557A JPS5991552A (ja) 1982-11-17 1982-11-17 セツトアソシアテイブ型分岐ヒストリテ−ブルを有する命令先取り装置
JP5294683A JPS59177653A (ja) 1983-03-29 1983-03-29 命令先取り制御方式

Publications (1)

Publication Number Publication Date
DE3382350D1 true DE3382350D1 (de) 1991-08-29

Family

ID=27564812

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8383111451T Expired - Fee Related DE3382350D1 (de) 1982-11-17 1983-11-15 Anordnung zum vorabholen von befehlen mit vorhersage einer verzweigungszieladresse.

Country Status (3)

Country Link
US (1) US4984154A (de)
EP (1) EP0109655B1 (de)
DE (1) DE3382350D1 (de)

Families Citing this family (75)

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EP0229619B1 (de) * 1986-01-07 1997-08-06 Nec Corporation Befehlsvorabrufgerät mit einer Schaltung zum Prüfen der Vorhersage eines Verzweigungsbefehls vor seiner Ausführung
DE3785897T2 (de) * 1986-02-28 1993-09-30 Nec Corp Steuervorrichtung zum vorabruf von befehlen.
US5440704A (en) * 1986-08-26 1995-08-08 Mitsubishi Denki Kabushiki Kaisha Data processor having branch predicting function
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US5522053A (en) * 1988-02-23 1996-05-28 Mitsubishi Denki Kabushiki Kaisha Branch target and next instruction address calculation in a pipeline processor
JPH01271838A (ja) * 1988-04-22 1989-10-30 Fujitsu Ltd マイクロプログラム分岐方法
JPH0778735B2 (ja) * 1988-12-05 1995-08-23 松下電器産業株式会社 キャッシュ装置と命令読出し装置
JPH0769811B2 (ja) * 1988-12-21 1995-07-31 松下電器産業株式会社 データ処理装置
JPH02306341A (ja) * 1989-02-03 1990-12-19 Nec Corp マイクロプロセッサ
US5689670A (en) * 1989-03-17 1997-11-18 Luk; Fong Data transferring system with multiple port bus connecting the low speed data storage unit and the high speed data storage unit and the method for transferring data
JP2570859B2 (ja) * 1989-05-25 1997-01-16 日本電気株式会社 データ処理装置
US5136697A (en) * 1989-06-06 1992-08-04 Advanced Micro Devices, Inc. System for reducing delay for execution subsequent to correctly predicted branch instruction using fetch information stored with each block of instructions in cache
JPH0795271B2 (ja) * 1989-06-20 1995-10-11 富士通株式会社 分岐命令実行装置
JP2508280B2 (ja) * 1989-07-28 1996-06-19 日本電気株式会社 分岐ヒストリテ―ブル制御方式
KR940000968B1 (ko) * 1989-08-28 1994-02-07 니뽄 덴끼 가부시끼가이샤 마이크로프로세서
US5210831A (en) * 1989-10-30 1993-05-11 International Business Machines Corporation Methods and apparatus for insulating a branch prediction mechanism from data dependent branch table updates that result from variable test operand locations
US5226130A (en) * 1990-02-26 1993-07-06 Nexgen Microsystems Method and apparatus for store-into-instruction-stream detection and maintaining branch prediction cache consistency
US5230068A (en) * 1990-02-26 1993-07-20 Nexgen Microsystems Cache memory system for dynamically altering single cache memory line as either branch target entry or pre-fetch instruction queue based upon instruction sequence
JP2560889B2 (ja) * 1990-05-22 1996-12-04 日本電気株式会社 マイクロプロセッサ
EP0463965B1 (de) * 1990-06-29 1998-09-09 Digital Equipment Corporation Sprungvorhersageeinheit für hochleistungsfähigen Prozessor
US5276882A (en) * 1990-07-27 1994-01-04 International Business Machines Corp. Subroutine return through branch history table
US5530941A (en) * 1990-08-06 1996-06-25 Ncr Corporation System and method for prefetching data from a main computer memory into a cache memory
WO1992006426A1 (en) * 1990-10-09 1992-04-16 Nexgen Microsystems Method and apparatus for parallel decoding of instructions with branch prediction look-up
JP2839730B2 (ja) * 1991-02-25 1998-12-16 株式会社東芝 エミュレーション装置及び半導体装置
US5276825A (en) * 1991-03-12 1994-01-04 Chips & Technologies, Inc. Apparatus for quickly determining actual jump addresses by assuming each instruction of a plurality of fetched instructions is a jump instruction
US5394530A (en) * 1991-03-15 1995-02-28 Nec Corporation Arrangement for predicting a branch target address in the second iteration of a short loop
US5287467A (en) * 1991-04-18 1994-02-15 International Business Machines Corporation Pipeline for removing and concurrently executing two or more branch instructions in synchronization with other instructions executing in the execution unit
JPH04321130A (ja) * 1991-04-22 1992-11-11 Toshiba Corp 分岐予測装置
JPH04328634A (ja) * 1991-04-26 1992-11-17 Nec Corp マイクロプログラム制御装置
JP2682264B2 (ja) * 1991-05-21 1997-11-26 日本電気株式会社 プログラムカウンタ装置
JPH0628184A (ja) * 1991-08-26 1994-02-04 Internatl Business Mach Corp <Ibm> ブランチ予測方法及びブランチプロセッサ
US5649097A (en) * 1991-10-25 1997-07-15 International Business Machines Corporation Synchronizing a prediction RAM
JP3182438B2 (ja) * 1991-10-28 2001-07-03 株式会社日立製作所 データプロセッサ
US5333283A (en) * 1991-10-29 1994-07-26 International Business Machines Corporation Case block table for predicting the outcome of blocks of conditional branches having a common operand
US5434986A (en) * 1992-01-09 1995-07-18 Unisys Corporation Interdependency control of pipelined instruction processor using comparing result of two index registers of skip instruction and next sequential instruction
US5742839A (en) * 1992-01-30 1998-04-21 Fujitsu Limited Coprocessor for performing an arithmetic operation by automatically reading data from an external memory
AU665368B2 (en) * 1992-02-27 1996-01-04 Samsung Electronics Co., Ltd. CPU having pipelined instruction unit and effective address calculation unit with retained virtual address capability
US5507028A (en) * 1992-03-30 1996-04-09 International Business Machines Corporation History based branch prediction accessed via a history based earlier instruction address
US5313634A (en) * 1992-07-28 1994-05-17 International Business Machines Corporation Computer system branch prediction of subroutine returns
JPH0659972A (ja) * 1992-08-05 1994-03-04 Oki Electric Ind Co Ltd メモリ制御装置
US5434985A (en) * 1992-08-11 1995-07-18 International Business Machines Corporation Simultaneous prediction of multiple branches for superscalar processing
US5463746A (en) * 1992-10-30 1995-10-31 International Business Machines Corp. Data processing system having prediction by using an embedded guess bit of remapped and compressed opcodes
JP3254019B2 (ja) * 1992-11-30 2002-02-04 富士通株式会社 データ先読み制御装置
JP2596712B2 (ja) * 1993-07-01 1997-04-02 インターナショナル・ビジネス・マシーンズ・コーポレイション 近接した分岐命令を含む命令の実行を管理するシステム及び方法
JP3639927B2 (ja) * 1993-10-04 2005-04-20 株式会社ルネサステクノロジ データ処理装置
US5748976A (en) * 1993-10-18 1998-05-05 Amdahl Corporation Mechanism for maintaining data coherency in a branch history instruction cache
JP2801135B2 (ja) * 1993-11-26 1998-09-21 富士通株式会社 パイプラインプロセッサの命令読み出し方法及び命令読み出し装置
US5604909A (en) 1993-12-15 1997-02-18 Silicon Graphics Computer Systems, Inc. Apparatus for processing instructions in a computing system
IE940855A1 (en) * 1993-12-20 1995-06-28 Motorola Inc Data processor with speculative instruction fetching and¹method of operation
US5574871A (en) * 1994-01-04 1996-11-12 Intel Corporation Method and apparatus for implementing a set-associative branch target buffer
JPH08106387A (ja) * 1994-10-06 1996-04-23 Oki Electric Ind Co Ltd 命令プリフェッチ回路及びキャッシュ装置
US5764946A (en) * 1995-04-12 1998-06-09 Advanced Micro Devices Superscalar microprocessor employing a way prediction unit to predict the way of an instruction fetch address and to concurrently provide a branch prediction address corresponding to the fetch address
US5848433A (en) * 1995-04-12 1998-12-08 Advanced Micro Devices Way prediction unit and a method for operating the same
US5905881A (en) * 1995-11-30 1999-05-18 Unisys Corporation Delayed state writes for an instruction processor
US5732235A (en) * 1996-01-25 1998-03-24 International Business Machines Corporation Method and system for minimizing the number of cycles required to execute semantic routines
US5887174A (en) * 1996-06-18 1999-03-23 International Business Machines Corporation System, method, and program product for instruction scheduling in the presence of hardware lookahead accomplished by the rescheduling of idle slots
US5867699A (en) * 1996-07-25 1999-02-02 Unisys Corporation Instruction flow control for an instruction processor
US6119222A (en) * 1996-12-23 2000-09-12 Texas Instruments Incorporated Combined branch prediction and cache prefetch in a microprocessor
US6073230A (en) * 1997-06-11 2000-06-06 Advanced Micro Devices, Inc. Instruction fetch unit configured to provide sequential way prediction for sequential instruction fetches
US6044222A (en) * 1997-06-23 2000-03-28 International Business Machines Corporation System, method, and program product for loop instruction scheduling hardware lookahead
US6157988A (en) * 1997-08-01 2000-12-05 Micron Technology, Inc. Method and apparatus for high performance branching in pipelined microsystems
US6016533A (en) * 1997-12-16 2000-01-18 Advanced Micro Devices, Inc. Way prediction logic for cache array
US6115810A (en) * 1998-09-16 2000-09-05 Sun Microsystems, Inc. Bi-level branch target prediction scheme with mux select prediction
US6275918B1 (en) 1999-03-16 2001-08-14 International Business Machines Corporation Obtaining load target operand pre-fetch address from history table information upon incremented number of access indicator threshold
JP3723020B2 (ja) 1999-09-30 2005-12-07 富士通株式会社 分岐履歴情報の書き込み制御装置及びその方法
DE10009677A1 (de) * 2000-02-29 2001-09-06 Infineon Technologies Ag Programmgesteuerte Einheit
US7085915B1 (en) 2000-02-29 2006-08-01 International Business Machines Corporation Programmable prefetching of instructions for a processor executing a non-procedural program
US20030226657A1 (en) * 2002-04-01 2003-12-11 Wallace Thomas E. Food delivery system and method for storing and heating food to a serving temperature
US7024663B2 (en) 2002-07-10 2006-04-04 Micron Technology, Inc. Method and system for generating object code to facilitate predictive memory retrieval
US6954836B2 (en) * 2002-07-11 2005-10-11 Micron Technology, Inc. System and method for processor with predictive memory retrieval assist
US20050050278A1 (en) * 2003-09-03 2005-03-03 Advanced Micro Devices, Inc. Low power way-predicted cache
US7117290B2 (en) * 2003-09-03 2006-10-03 Advanced Micro Devices, Inc. MicroTLB and micro tag for reducing power in a processor
US11023380B2 (en) 2019-09-10 2021-06-01 Western Digital Technologies, Inc. Non-volatile storage system with filtering of data samples for a monitored operational statistic
CN114706798B (zh) * 2022-06-08 2022-08-12 四川省人工智能研究院(宜宾) 基于注意力机制的固态硬盘数据预取方法

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US3559183A (en) * 1968-02-29 1971-01-26 Ibm Instruction sequence control
JPS549456B2 (de) * 1972-07-05 1979-04-24
US4200927A (en) * 1978-01-03 1980-04-29 International Business Machines Corporation Multi-instruction stream branch processing mechanism
JPS56149646A (en) * 1980-04-21 1981-11-19 Toshiba Corp Operation controller
US4370711A (en) * 1980-10-21 1983-01-25 Control Data Corporation Branch predictor using random access memory
US4430706A (en) * 1980-10-27 1984-02-07 Burroughs Corporation Branch prediction apparatus and method for a data processing system
US4435756A (en) * 1981-12-03 1984-03-06 Burroughs Corporation Branch predicting computer
US4477872A (en) * 1982-01-15 1984-10-16 International Business Machines Corporation Decode history table for conditional branch instructions

Also Published As

Publication number Publication date
EP0109655A3 (en) 1987-01-07
US4984154A (en) 1991-01-08
EP0109655B1 (de) 1991-07-24
EP0109655A2 (de) 1984-05-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee