DE3173413D1 - Semiconductor memory device - Google Patents
Semiconductor memory deviceInfo
- Publication number
- DE3173413D1 DE3173413D1 DE8181100424T DE3173413T DE3173413D1 DE 3173413 D1 DE3173413 D1 DE 3173413D1 DE 8181100424 T DE8181100424 T DE 8181100424T DE 3173413 T DE3173413 T DE 3173413T DE 3173413 D1 DE3173413 D1 DE 3173413D1
- Authority
- DE
- Germany
- Prior art keywords
- memory device
- semiconductor memory
- semiconductor
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
- G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
- H01L23/5223—Capacitor integral with wiring layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP751980A JPS56104462A (en) | 1980-01-25 | 1980-01-25 | Semiconductor memory device |
JP752080A JPS56150857A (en) | 1980-01-25 | 1980-01-25 | Dynamic memory device |
JP752480A JPS56105664A (en) | 1980-01-25 | 1980-01-25 | Dynamic memory device |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3173413D1 true DE3173413D1 (en) | 1986-02-20 |
Family
ID=27277635
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8181100424T Expired DE3173413D1 (en) | 1980-01-25 | 1981-01-21 | Semiconductor memory device |
DE8484114160T Expired - Lifetime DE3177173D1 (de) | 1980-01-25 | 1981-01-21 | Halbleiterspeichervorrichtung. |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8484114160T Expired - Lifetime DE3177173D1 (de) | 1980-01-25 | 1981-01-21 | Halbleiterspeichervorrichtung. |
Country Status (3)
Country | Link |
---|---|
US (1) | US4419682A (de) |
EP (2) | EP0154685B1 (de) |
DE (2) | DE3173413D1 (de) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0154685B1 (de) * | 1980-01-25 | 1990-04-18 | Kabushiki Kaisha Toshiba | Halbleiterspeichervorrichtung |
JPS58213450A (ja) * | 1982-06-04 | 1983-12-12 | Toshiba Corp | 半導体装置の多層配線構造 |
JPS602782B2 (ja) * | 1982-06-30 | 1985-01-23 | 富士通株式会社 | 半導体記憶装置 |
JPS5922358A (ja) * | 1982-07-28 | 1984-02-04 | Toshiba Corp | 半導体記憶装置 |
US4652898A (en) * | 1984-07-19 | 1987-03-24 | International Business Machines Corporation | High speed merged charge memory |
JPS61127161A (ja) * | 1984-11-26 | 1986-06-14 | Fujitsu Ltd | 半導体記憶装置 |
DE3443771C2 (de) * | 1984-11-30 | 1994-05-26 | Bosch Gmbh Robert | Halbleiteranordnung mit Metallisierung |
JPH0685427B2 (ja) * | 1986-03-13 | 1994-10-26 | 三菱電機株式会社 | 半導体記憶装置 |
US5087951A (en) * | 1988-05-02 | 1992-02-11 | Micron Technology | Semiconductor memory device transistor and cell structure |
JPH01297839A (ja) * | 1988-05-26 | 1989-11-30 | Toshiba Corp | 半導体装置 |
JP2528719B2 (ja) * | 1989-12-01 | 1996-08-28 | 三菱電機株式会社 | 半導体記憶装置 |
US7115938B2 (en) * | 2004-04-21 | 2006-10-03 | Vanguard International Semiconductor Corporation | Non-volatile memory cell and method of forming the same |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4060796A (en) * | 1975-04-11 | 1977-11-29 | Fujitsu Limited | Semiconductor memory device |
US4012757A (en) * | 1975-05-05 | 1977-03-15 | Intel Corporation | Contactless random-access memory cell and cell pair |
DE2532594B2 (de) * | 1975-07-21 | 1980-05-22 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Halbleiterspeicher |
JPS5279679A (en) * | 1975-12-26 | 1977-07-04 | Toshiba Corp | Semiconductor memory device |
US4240092A (en) * | 1976-09-13 | 1980-12-16 | Texas Instruments Incorporated | Random access memory cell with different capacitor and transistor oxide thickness |
JPS5853512B2 (ja) * | 1976-02-13 | 1983-11-29 | 株式会社東芝 | 半導体記憶装置の製造方法 |
JPS5390888A (en) * | 1977-01-21 | 1978-08-10 | Nec Corp | Integrated circuit device |
GB2007430B (en) * | 1977-11-03 | 1982-03-03 | Western Electric Co | Semicinductor device and fabrication method |
DE2837877C2 (de) * | 1978-08-30 | 1987-04-23 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zur Herstellung eines MOS-integrierten Halbleiterspeichers |
US4240195A (en) * | 1978-09-15 | 1980-12-23 | Bell Telephone Laboratories, Incorporated | Dynamic random access memory |
US4291322A (en) * | 1979-07-30 | 1981-09-22 | Bell Telephone Laboratories, Incorporated | Structure for shallow junction MOS circuits |
US4262298A (en) * | 1979-09-04 | 1981-04-14 | Burroughs Corporation | Ram having a stabilized substrate bias and low-threshold narrow-width transfer gates |
DE3064991D1 (en) * | 1980-01-11 | 1983-11-03 | Mostek Corp | One transistor-one capacitor memory cell |
EP0154685B1 (de) * | 1980-01-25 | 1990-04-18 | Kabushiki Kaisha Toshiba | Halbleiterspeichervorrichtung |
-
1981
- 1981-01-21 EP EP84114160A patent/EP0154685B1/de not_active Expired - Lifetime
- 1981-01-21 EP EP81100424A patent/EP0033130B1/de not_active Expired
- 1981-01-21 DE DE8181100424T patent/DE3173413D1/de not_active Expired
- 1981-01-21 DE DE8484114160T patent/DE3177173D1/de not_active Expired - Lifetime
- 1981-01-23 US US06/227,936 patent/US4419682A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US4419682A (en) | 1983-12-06 |
EP0033130A3 (en) | 1981-11-04 |
DE3177173D1 (de) | 1990-05-23 |
EP0154685B1 (de) | 1990-04-18 |
EP0154685A1 (de) | 1985-09-18 |
EP0033130A2 (de) | 1981-08-05 |
EP0033130B1 (de) | 1986-01-08 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |