CN208923090U - Outline Package TSOP encapsulating structure - Google Patents

Outline Package TSOP encapsulating structure Download PDF

Info

Publication number
CN208923090U
CN208923090U CN201821759765.3U CN201821759765U CN208923090U CN 208923090 U CN208923090 U CN 208923090U CN 201821759765 U CN201821759765 U CN 201821759765U CN 208923090 U CN208923090 U CN 208923090U
Authority
CN
China
Prior art keywords
pin
plastic
sealed body
encapsulating structure
outline package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201821759765.3U
Other languages
Chinese (zh)
Inventor
赖辉朋
马超
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SHENZHEN JINGDAO ELECTRONIC CO Ltd
Original Assignee
SHENZHEN JINGDAO ELECTRONIC CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SHENZHEN JINGDAO ELECTRONIC CO Ltd filed Critical SHENZHEN JINGDAO ELECTRONIC CO Ltd
Priority to CN201821759765.3U priority Critical patent/CN208923090U/en
Application granted granted Critical
Publication of CN208923090U publication Critical patent/CN208923090U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

The utility model relates to a kind of Outline Package TSOP encapsulating structures, the TSOP encapsulating structure includes lead frame and plastic packaging in the plastic-sealed body outside lead frame, the lead frame includes multiple pins, at least one pin is to widen pin in multiple pins, for radiating, Ji Dao is provided in plastic-sealed body, for being bonded chip, Ji Dao is connected with pin is widened.Widen pin by what setting was connected with Ji Dao in this way, for radiating, increase the rate of heat dissipation, solves the problems, such as the difficulty that radiates in the case that surface patch is encapsulated in integrated level height.

Description

Outline Package TSOP encapsulating structure
Technical field
The utility model relates to field of semiconductor package, encapsulate and tie more particularly to a kind of Outline Package TSOP Structure.
Background technique
In the design and production of surface patch encapsulation, in order to reduce the competitiveness that production cost promotes chip itself, table The integrated level of face paste piece encapsulation is higher and higher, and the size of surface patch encapsulation becomes smaller and smaller.
Existing surface patch radiates difficult in the case where being encapsulated in integrated level height.
Utility model content
Based on this, it is necessary in view of the above-mentioned problems, providing a kind of Outline Package TSOP encapsulating structure.
A kind of Outline Package TSOP encapsulating structure, the TSOP encapsulating structure include lead frame and plastic packaging in drawing Plastic-sealed body outside wire frame, the lead frame include multiple pins, at least one pin is to widen in the multiple pin Pin is provided with Ji Dao in the plastic-sealed body for radiating, and for being bonded chip, the Ji Dao is connected with the pin of widening.
Above-mentioned encapsulating structure, by be arranged be connected with Ji Dao widen pin, for radiating, increase the rate of heat dissipation, Solves the problems, such as the difficulty that radiates in the case that surface patch is encapsulated in integrated level height.
The plastic-sealed body is epoxy resin plastic-sealed body in one of the embodiments,.
Each pin is greater than 0.30mm at a distance from the edge of the plastic-sealed body in one of the embodiments,.This Sample ensure that the reliability of plastic packaging intensity and plastic packaging.
The distance of the every two adjacent pins is greater than preset creepage distance in one of the embodiments,.It in this way can be with Prevent high pressure from climbing electric hidden danger.
The multiple pin includes being located at the plastic-sealed body upside spaced apart first to draw in one of the embodiments, Foot, second pin and it is located at spaced apart third pin and the 4th pin, the second pin on the downside of the plastic-sealed body and is Widen pin.
The plastic-sealed body is the plastic-sealed body of 2.6*2.6mm specification, first pin, institute in one of the embodiments, The width of third pin and the 4th pin is stated between 0.35-0.40mm, the width of the second pin is 0.85- Between 0.95mm.The heat dissipation performance of product can be fully considered in this way and prevented from climbing electric hidden danger while also be can guarantee the strong of product Degree.
The center of first pin and the second pin is at a distance of 1.22mm in one of the embodiments, and described The center of three pins and the 4th pin is at a distance of 1.42mm.
In one of the embodiments, the plastic-sealed body with a thickness of 0.95mm.
The Ji Dao is the Ji Dao of 2.05*1.5mm in one of the embodiments,.It can satisfy a variety of integrated electricity in this way The load requirement of road chip.
First pin is corresponding with the third pin in a longitudinal direction in one of the embodiments, and described Two pins are corresponding with the 4th pin in a longitudinal direction.
Detailed description of the invention
Fig. 1 is the schematic diagram of Outline Package TSOP encapsulating structure in one embodiment；
Fig. 2 is the lead frame structure schematic diagram of Outline Package TSOP encapsulating structure in one embodiment；
Fig. 3 is that the load of Outline Package TSOP encapsulating structure in one embodiment is bonded wiring diagram.
Specific embodiment
It is with reference to the accompanying drawings and embodiments, right in order to which the objects, technical solutions and advantages of the application are more clearly understood The application is further elaborated.It should be appreciated that specific embodiment described herein is only used to explain the application, and It is not used in restriction the application.
As shown in Figure 1-Figure 3, a kind of Outline Package TSOP encapsulating structure is provided, which includes Lead frame a and plastic packaging include multiple pins in the plastic-sealed body b outside lead frame, lead frame a, at least one in multiple pins A pin is to widen pin, and for radiating, base island a5 is provided in plastic-sealed body b, and for being bonded chip c, base island a5 draws with widening Foot is connected.
In the embodiment of the present application, for base island a5 for bonding chip c, the chip c being fitted on the a5 of base island can be with pin Bonding passes through the plastic packaging plastics formation plastic-sealed body b outside lead frame a.Widening pin is that width is wider than the width of existing pin Pin, by be connected with base island a5 widen pin heat dissipation, increase the rate of heat dissipation, solve surface patch and be encapsulated in collection Radiate difficult problem in the case where at degree height.
Plastic-sealed body is epoxy resin plastic-sealed body in one of the embodiments,.
Each pin is greater than 0.30mm at a distance from the edge of plastic-sealed body in one of the embodiments,.This ensure that The reliability of plastic packaging intensity and plastic packaging.
In the embodiment of the present application, pin at a distance from the edge of plastic-sealed body in the pin with the edge phase of plastic-sealed body Pair length direction side at a distance from the edge.
The distance of every two adjacent leads is greater than preset creepage distance in one of the embodiments,.It can prevent in this way High pressure climbs electric hidden danger.
In the embodiment of the present application, the distance of every two adjacent leads refer to both sides opposite in two adjacent leads away from From.
In an alternative embodiment, which includes the distance of 0.55mm or more.Further, it examines The size for considering the TSOP encapsulating structure is smaller, in order to guarantee certain plastic packaging intensity, therefore, to assure that has enough pins and modeling Seal the distance between body edge.So in an alternative embodiment, which is less than 0.65mm.
In one of the embodiments, as shown in Figure 1-Figure 3, multiple pins include spaced apart on the upside of plastic-sealed body First pin a1, second pin a2 and the spaced apart third pin a3 and the 4th pin a4 on the downside of plastic-sealed body, second Pin a2 is to widen pin.The structure of such four pins is for most Outline Package TSOP, pin number Just.It will not cause to waste because pin is excessive, material can be saved.
In one of the embodiments, plastic-sealed body be 2.6*2.6mm specification plastic-sealed body, the first pin, third pin and The width of 4th pin is between 0.35-0.40mm, and the width of second pin is between 0.85-0.95mm.It can mould in this way It seals in the limited size of body, fully considers the heat dissipation performance of product, while also can guarantee that the distance of every two adjacent pins is greater than Preset creepage distance, moreover it is possible to guarantee that each pin meets the requirement for guaranteeing product strength to the distance at plastic-sealed body edge.
In an alternative embodiment, the width of the first pin and third pin can be 0.35mm, second pin Width can be 0.90mm, and the wide of the 4th pin can be 0.40mm.Distance of first pin apart from plastic-sealed body edge can be with For 0.415mm, the distance of third pin to plastic-sealed body edge can be 0.415mm.
Further in one of the embodiments, at a distance of 1.22mm, third is drawn at the center of the first pin and second pin The center of foot and the 4th pin is at a distance of 1.42mm.Product can be thus set to realize rapid heat dissipation, prevent from climbing electric hidden danger and tool well There is certain product strength three to combine, realizes the optimization of properties of product.
In one of the embodiments, plastic-sealed body with a thickness of 0.95mm.
Ji Dao is the Ji Dao of 2.05*1.5mm in one of the embodiments,.It can satisfy a variety of ic cores in this way The load requirement of piece.
In one of the embodiments, as shown in Figure 1-Figure 3, the first pin a1 in a longitudinal direction with a3 pairs of third pin It answers, second pin a2 is corresponding with the 4th pin a4 in a longitudinal direction.
Each technical characteristic of above embodiments can be combined arbitrarily, for simplicity of description, not to above-described embodiment In each technical characteristic it is all possible combination be all described, as long as however, the combination of these technical characteristics be not present lance Shield all should be considered as described in this specification.
Above embodiments only express the several embodiments of the utility model, and the description thereof is more specific and detailed, but simultaneously The limitation to utility model patent range therefore cannot be interpreted as.It should be pointed out that for the ordinary skill people of this field For member, without departing from the concept of the premise utility, various modifications and improvements can be made, these belong to this reality With novel protection scope.Therefore, the scope of protection shall be subject to the appended claims for the utility model patent.

Claims (10)

1. a kind of Outline Package TSOP encapsulating structure, which is characterized in that the TSOP encapsulating structure includes lead frame In the plastic-sealed body outside lead frame, the lead frame includes multiple pins for frame and plastic packaging, at least one in the multiple pin A pin is to widen pin, for radiating, is provided with Ji Dao in the plastic-sealed body, for being bonded chip, the Ji Dao with it is described Widen pin to be connected.
2. Outline Package TSOP encapsulating structure according to claim 1, which is characterized in that the plastic-sealed body is Epoxy resin plastic-sealed body.
3. Outline Package TSOP encapsulating structure according to claim 1 or 2, which is characterized in that described each to draw Foot is greater than 0.30mm at a distance from the edge of the plastic-sealed body.
4. Outline Package TSOP encapsulating structure according to claim 3, which is characterized in that every two adjacent described draw The distance of foot is greater than preset creepage distance.
5. Outline Package TSOP encapsulating structure according to claim 4, which is characterized in that the multiple pin packet It includes and is located at spaced apart first pin on the upside of the plastic-sealed body, second pin and is located at arranged for interval on the downside of the plastic-sealed body Third pin and the 4th pin, the second pin be widen pin.
6. Outline Package TSOP encapsulating structure according to claim 5, which is characterized in that the plastic-sealed body is The plastic-sealed body of 2.6*2.6mm specification, the width of first pin, the third pin and the 4th pin are 0.35- Between 0.40mm, the width of the second pin is between 0.85-0.95mm.
7. Outline Package TSOP encapsulating structure according to claim 6, which is characterized in that first pin and The center of the second pin is at a distance of 1.22mm, and the center of the third pin and the 4th pin is at a distance of 1.42mm.
8. Outline Package TSOP encapsulating structure according to claim 6, which is characterized in that the thickness of the plastic-sealed body Degree is 0.95mm.
9. Outline Package TSOP encapsulating structure according to claim 6, which is characterized in that the Ji Dao is 2.05*1.5mm Ji Dao.
10. Outline Package TSOP encapsulating structure according to claim 6, which is characterized in that first pin Corresponding with the third pin in a longitudinal direction, the second pin is corresponding with the 4th pin in a longitudinal direction.
CN201821759765.3U 2018-10-29 2018-10-29 Outline Package TSOP encapsulating structure Active CN208923090U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201821759765.3U CN208923090U (en) 2018-10-29 2018-10-29 Outline Package TSOP encapsulating structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201821759765.3U CN208923090U (en) 2018-10-29 2018-10-29 Outline Package TSOP encapsulating structure

Publications (1)

Publication Number Publication Date
CN208923090U true CN208923090U (en) 2019-05-31

Family

ID=66710969

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201821759765.3U Active CN208923090U (en) 2018-10-29 2018-10-29 Outline Package TSOP encapsulating structure

Country Status (1)

Country Link
CN (1) CN208923090U (en)

Similar Documents

Publication Publication Date Title
CN204088299U (en) A kind of New type of S OT223-3L encapsulating lead
US8125063B2 (en) COL package having small chip hidden between leads
WO2011049764A3 (en) Leadframe packages having enhanced ground-bond reliability
TW200504988A (en) Semiconductor device and lead frame
CN208923090U (en) Outline Package TSOP encapsulating structure
CN207611765U (en) Lead frame, array of lead frames and packaging body
CN207883687U (en) SOP-8 encapsulating leads
CN208570593U (en) The encapsulating structure of integrated circuit
CN203733783U (en) Lead frame
CN208336207U (en) A kind of biradical island lead frame frame and its SOT33-5L packaging part
US9257311B2 (en) Method of fabricating a semiconductor package with heat dissipating structure having a deformed supporting portion
CN209150103U (en) Small outline transistor SOT encapsulating structure
CN208336209U (en) Semiconductor package part and its lead frame item used
CN204375733U (en) A kind of Double-lead-frame
CN209447788U (en) Lead frame and packaging body
CN202839586U (en) Outer-pin-free flat semiconductor package structure adopting elastic device
CN209029369U (en) A kind of novel SOT23-5L lead frame structure
CN202434503U (en) DIP10 integrated circuit device and lead frame, and lead frame matrix
CN207367965U (en) Array of lead frames and packaging body
CN206312889U (en) A kind of package structure of self-adapting type semiconductor
CN206098385U (en) Lead frame of IC semiconductor for device
TW200642095A (en) Lead-frame type semiconductor package and lead frame thereof
CN205488112U (en) SOT223 frame construction that goes between
CN203800034U (en) Semiconductor device packaging lead frame
CN207611766U (en) Lead frame, array of lead frames and packaging body

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant