CN206312889U - A kind of package structure of self-adapting type semiconductor - Google Patents

A kind of package structure of self-adapting type semiconductor Download PDF

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Publication number
CN206312889U
CN206312889U CN201621481874.4U CN201621481874U CN206312889U CN 206312889 U CN206312889 U CN 206312889U CN 201621481874 U CN201621481874 U CN 201621481874U CN 206312889 U CN206312889 U CN 206312889U
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China
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wire
wire matrix
semiconductor chip
matrix
gai
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CN201621481874.4U
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Chinese (zh)
Inventor
彭勇
尤文胜
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Hefei Huayu Semiconductor Co ltd
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Hefei Huada Semiconductor Co Ltd
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Abstract

The utility model discloses a kind of package structure of self-adapting type semiconductor, including semiconductor chip, cross Ka Gai, the first wire matrix and the second wire matrix;The cross Ka Gai with through hole is provided with above the semiconductor chip;The first wire matrix that bottom is rectangular channel is provided with below semiconductor chip, the bottom of the rectangular channel is provided with rectangular radiator;Set fluted on second wire matrix, the bottom of groove is provided with heat dissipating layer;First wire matrix is arranged in groove;Wire is respectively arranged with first wire matrix and the second wire matrix.The utility model is provided with the Ka Gai of through hole by using four pin, and the position of semiconductor chip can be fixed, it is ensured that semiconductor chip is one overall with Ka Gai, improves package quality;By setting multiple radiator structures, radiating effect is improved;Realized to the requirement of the size of semiconductor packages by the quantity for changing wire matrix, with strong adaptability, low cost and the characteristics of reuse.

Description

A kind of package structure of self-adapting type semiconductor
Technical field
The utility model belongs to technical field of semiconductor encapsulation, is related to a kind of packaging part knot of self-adapting type semiconductor Structure.
Background technology
With continuing to develop for integrated circuit, the encapsulation of integrated circuit requires also more and more higher, and common packaging technology is Chip is fixed on lead frame, chip is packaged by adhesive tape and is wrapped up protection, so as to realize to semiconductor structure Encapsulation.
The encapsulating structure of current chip, chip is bonded on the base of chip by with elargol, is led to during encapsulation Overbaking step carrys out curing chip so that chip is fixed on chip carrier.During encapsulation, solidified using elargol, not only Increase cost, and so that the poor radiation of chip, the life-span for causing chip to use is shorter, while the encapsulation of chip has size It is fixed, it is impossible to adapt to different working environments, cause the region of encapsulation to be restricted, with high cost, thermal diffusivity and use model Narrow shortcoming is enclosed, therefore, a kind of package structure of self-adapting type semiconductor need to be designed.
Utility model content
The package structure of a kind of self-adapting type semiconductor that the utility model is provided, by setting on a semiconductor die There is Ka Gai, and card is covered and is provided with through hole;By setting multiple heat abstractors, the radiating effect of semiconductor packages is improved;Pass through The quantity of wire matrix is being added or reduced, is changing the size of encapsulation, the package dimension for solving semiconductor is being fixed and dissipated The problem of hot difference.
The purpose of this utility model can be achieved through the following technical solutions:
A kind of package structure of self-adapting type semiconductor, including semiconductor chip, cross Ka Gai, the first wire matrix With the second wire matrix;
Cross Ka Gai is provided with above the semiconductor chip, the cross card is covered and is provided with through hole;
The first wire matrix is provided with below the semiconductor chip, the bottom of the first wire matrix is provided with square Shape groove;The semiconductor chip is arranged in rectangular channel, and the bottom of the rectangular channel is provided with rectangular radiator;
Set fluted on the second wire matrix, the bottom of the groove is provided with heat dissipating layer, first wire Matrix is arranged in groove;
The upper surface of the first wire matrix is provided with the first wire;The upper surface of the second wire matrix is provided with Second wire.
Further, be respectively arranged with a through hole on four pin of the cross Ka Gai, the section of the through hole for it is circular, Square or kidney-shaped.
Further, width of the caliber size of the through hole less than cross Ka Gai.
Further, the quantity of first wire is more than or equal to the number of pins of semiconductor chip, and first wire leads to Scolding tin is crossed to be connected with the pin of semiconductor chip.
Further, the upper surface of the upper surface of the second wire matrix and the first wire matrix is in same level On.
Further, the extended line of second wire overlaps with the first wire, and the quantity of second wire is equal to The quantity of the first wire.
Further, there is clearance aperture between the first wire matrix and the second wire matrix, second wire leads to Cross and be connected with the first wire to injection scolding tin in the clearance aperture.
The beneficial effects of the utility model:The utility model is provided with the Ka Gai of through hole by using four pin, can be half-and-half The position of conductor chip is fixed, it is ensured that semiconductor chip is one overall with Ka Gai, improves package quality;It is multiple by setting Radiator structure, improves radiating effect;Size requirement to semiconductor packages is realized by the quantity for changing wire matrix, with suitable The characteristics of Ying Xingqiang, low cost and reuse.
Brief description of the drawings
In order to illustrate more clearly of the technical scheme of the utility model embodiment, make required for being described to embodiment below Accompanying drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the present utility model, For those of ordinary skill in the art, on the premise of not paying creative work, can also be obtained according to these accompanying drawings Other accompanying drawings.
Fig. 1 is a kind of package structure schematic diagram of self-adapting type semiconductor of the utility model;
Fig. 2 is a kind of packaging part generalized section of self-adapting type semiconductor of the utility model;
In accompanying drawing, the list of parts representated by each label is as follows:
1- semiconductor chips, 2- cross Ka Gai, 3- the first wire matrixes, 4- the second wire matrixes, the wires of 5- first, 6- Fin, 7- through holes, 8- clearance apertures, 9- rectangular channels, the wires of 10- second, 11- grooves, 12- heat dissipating layers.
Specific embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, the technical scheme in the utility model embodiment is carried out Clearly and completely describe, it is clear that described embodiment is only a part of embodiment of the utility model, rather than whole Embodiment.Based on the embodiment in the utility model, those of ordinary skill in the art are not under the premise of creative work is made The all other embodiment for being obtained, belongs to the scope of the utility model protection.
Refer to Fig. 1, shown in 2, a kind of package structure of self-adapting type semiconductor, including semiconductor chip 1, cross Card lid 2, the first wire matrix 3 and the second wire matrix 4;
The top of semiconductor chip 1 is provided with cross card lid 2, four installation feet of cross card lid 2 respectively with partly lead The socket connection of the surrounding of body chip 1, serves fixed to semiconductor chip 1;Cross card lid 2 is in crosswise, cross A through hole 7, the wherein width of the caliber size less than cross card lid 2 of through hole 7, through hole 7 are respectively arranged with four pin of card lid 2 Section be circular, square or kidney-shaped.
The lower section of semiconductor chip 1 is provided with the first wire matrix 3, and the bottom of the first wire matrix 3 is provided with rectangular channel 9;Semiconductor chip 1 is arranged in rectangular channel 9, and the bottom of rectangular channel 9 is provided with rectangular radiator 6, and fin 6 is to semiconductor core Piece 1 has the effect of radiating, increases the thermal diffusivity of semiconductor chip 1;The surrounding of the upper surface of the first wire matrix 3 is provided with many Individual the first parallel wire 5, the number of pins of the quantity more than or equal to semiconductor chip 1 of the first wire 5, the first wire 5 is by weldering Tin is connected with the pin of semiconductor chip 1.
The middle part of the second wire matrix 4 sets fluted 11, and the bottom of groove 11 is provided with heat dissipating layer 12, heat dissipating layer 12 Interior filling heat dissipating substance, the first wire 5 on 12 pairs of the first wire matrixes 3 of heat dissipating layer radiates;Second wire matrix 4 it is upper The upper surface of surface and the first wire matrix 3 is provided with multiple flat in same level in the upper surface of the second wire matrix 4 The second capable wire 10, the extended line of the second wire 10 overlaps with the first wire 5;First wire matrix 3 and the second wire matrix 4 Between there is clearance aperture 8, by injecting scolding tin in clearance aperture 8 so that the second wire 10 is connected with the first wire 5, wherein The quantity of the second wire 10 is equal to the quantity of the first wire 5 on the first wire matrix 3 on two wire matrixes 4.
During encapsulation, semiconductor chip 1 is arranged in the rectangular channel of the first wire matrix 3, and in semiconductor Fin 6 is installed between chip 1 and rectangular channel 9, and cross card lid 2 is arranged on the upper surface of semiconductor chip 1, pass through Cross card lid 2 and semiconductor chip 1 are fixed to gel is injected in through hole 7.
In addition, the package dimension of semiconductor can be changed by increasing or decreasing the quantity of wire matrix.
The utility model is provided with the Ka Gai of through hole by using four pin, and the position of semiconductor chip can be consolidated It is fixed, it is ensured that semiconductor chip is one overall with Ka Gai, improves package quality;By setting multiple radiator structures, radiating effect is improved Really;Size requirement to semiconductor packages is realized by the quantity for changing wire matrix, with strong adaptability, low cost and repetition The characteristics of using.
Above content is only to the utility model structure example and explanation, the technology people of affiliated the art Member is made various modifications or supplement to described specific embodiment or is substituted using similar mode, without departing from reality With new structure or surmount scope defined in the claims, protection domain of the present utility model all should be belonged to.

Claims (7)

1. a kind of package structure of self-adapting type semiconductor, it is characterised in that:Including semiconductor chip (1), cross Ka Gai (2), the first wire matrix (3) and the second wire matrix (4);
Cross Ka Gai (2) is provided with above the semiconductor chip (1), through hole is provided with the cross Ka Gai (2) (7);
The first wire matrix (3) is provided with below the semiconductor chip (1), the bottom of the first wire matrix (3) sets It is equipped with rectangular channel (9);In rectangular channel (9), the bottom of the rectangular channel (9) is provided with square to the semiconductor chip (1) Shape fin (6);
Set fluted (11) on the second wire matrix (4), the bottom of the groove (11) is provided with heat dissipating layer (12), institute The first wire matrix (3) is stated to be arranged in groove (11);
The upper surface of the first wire matrix (3) is provided with the first wire (5);The upper surface of the second wire matrix (4) It is provided with the second wire (10).
2. the package structure of a kind of self-adapting type semiconductor according to claim 1, it is characterised in that:It is described cross A through hole (7) is respectively arranged with four pin of Ka Gai (2), the section of the through hole (7) is circular, square or kidney-shaped.
3. the package structure of a kind of self-adapting type semiconductor according to claim 1, it is characterised in that:The through hole (7) width of the caliber size less than cross Ka Gai (2).
4. the package structure of a kind of self-adapting type semiconductor according to claim 1, it is characterised in that:Described first leads , more than or equal to the number of pins of semiconductor chip (1), first wire (5) is by scolding tin and semiconductor chip for the quantity of line (5) (1) pin connection.
5. the package structure of a kind of self-adapting type semiconductor according to claim 1, it is characterised in that:Described second leads The upper surface of the upper surface of line matrix (4) and the first wire matrix (3) is in same level.
6. the package structure of a kind of self-adapting type semiconductor according to claim 1, it is characterised in that:Described second leads The extended line of line (10) overlaps with the first wire (5), and second wire (10) quantity be equal to the first wire (5) number Amount.
7. the package structure of a kind of self-adapting type semiconductor according to claim 1, it is characterised in that:Described first leads There is clearance aperture (8) between line matrix (3) and the second wire matrix (4), second wire (10) is by the clearance aperture (8) injection scolding tin is connected with the first wire (5) in.
CN201621481874.4U 2016-12-30 2016-12-30 A kind of package structure of self-adapting type semiconductor Active CN206312889U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201621481874.4U CN206312889U (en) 2016-12-30 2016-12-30 A kind of package structure of self-adapting type semiconductor

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Application Number Priority Date Filing Date Title
CN201621481874.4U CN206312889U (en) 2016-12-30 2016-12-30 A kind of package structure of self-adapting type semiconductor

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CN206312889U true CN206312889U (en) 2017-07-07

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111146152A (en) * 2019-10-30 2020-05-12 苏师大半导体材料与设备研究院(邳州)有限公司 Semiconductor packaging part

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111146152A (en) * 2019-10-30 2020-05-12 苏师大半导体材料与设备研究院(邳州)有限公司 Semiconductor packaging part

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Effective date of registration: 20220623

Address after: 230000 Room 301 and 302, building 4, phase I, mechanical and Electrical Industrial Park, No. 767, Yulan Avenue, high tech Zone, Hefei City, Anhui Province

Patentee after: Hefei Huayu Semiconductor Co.,Ltd.

Address before: 6 / F, building B, public service and applied technology R & D Center for scientific and technological innovation, Hewu Beng Experimental Zone, 860 Wangjiang West Road, high tech Zone, Hefei City, Anhui Province, 230000

Patentee before: HEFEI HUADA SEMICONDUCTOR Co.,Ltd.

TR01 Transfer of patent right
CP03 Change of name, title or address

Address after: 230000, No. 66 Tiantangzhai Road, High tech Zone, Hefei City, Anhui Province

Patentee after: Hefei Huayu Semiconductor Co.,Ltd.

Country or region after: China

Address before: 230000 Room 301 and 302, building 4, phase I, mechanical and Electrical Industrial Park, No. 767, Yulan Avenue, high tech Zone, Hefei City, Anhui Province

Patentee before: Hefei Huayu Semiconductor Co.,Ltd.

Country or region before: China

CP03 Change of name, title or address