CN204166088U - Local discharge signal harvester - Google Patents
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- CN204166088U CN204166088U CN201420622510.8U CN201420622510U CN204166088U CN 204166088 U CN204166088 U CN 204166088U CN 201420622510 U CN201420622510 U CN 201420622510U CN 204166088 U CN204166088 U CN 204166088U
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Abstract
The utility model discloses a kind of local discharge signal harvester, comprise sampling mainboard and by the interconnective signal-processing board of data bus, trigger pip circuit and at least two hyperchannel AD daughter boards, described trigger pip circuit is arranged on described sampling mainboard, described signal-processing board assigns in the first draw-in groove of described sampling mainboard, and each described hyperchannel AD daughter board assigns in the second draw-in groove of described sampling mainboard.Implement the utility model, both can meet the needs that the many data of monitoring point of multisensor gather, the sampling request of the local signal of more high band can be adapted to again.While discrete sample pressure, increase the robustness of sampling.
Description
Technical field
The utility model relates to signal processing technology field, particularly relates to a kind of local discharge signal harvester.
Background technology
The data collector of the local discharge signal of electric system high-tension apparatus, the signal that various kinds of sensors can be collected is sent to the function of background server for further data processing by analog to digital conversion.The data collector of current local discharge signal realizes mainly through homemade or existing data collecting card.
But current data collector, in the detection to multiple high-tension apparatus or when carrying out localization of fault, needs the number of the sensor gathered to increase, cannot gather the data of multiple sensor fast and effectively.
Utility model content
Based on this, be necessary the problem that cannot gather the data of multiple sensor for above-mentioned data collector fast and effectively, a kind of local discharge signal harvester is provided.
A kind of local discharge signal harvester, comprise sampling mainboard and by the interconnective signal-processing board of data bus, trigger pip circuit and at least two hyperchannel AD daughter boards, described trigger pip circuit is arranged on described sampling mainboard, described signal-processing board assigns in the first draw-in groove of described sampling mainboard, and each described hyperchannel AD daughter board assigns in the second draw-in groove of described sampling mainboard.
Above-mentioned local discharge signal harvester, by sampling mainboard and carry out distributed data acquisition by the interconnective signal-processing board of data bus, trigger pip circuit and at least two hyperchannel AD daughter boards, both can meet the needs that the many data of monitoring point of multisensor gather, the sampling request of the local signal of more high band can have been adapted to again.While discrete sample pressure, increase the robustness of sampling.
Accompanying drawing explanation
Fig. 1 is the structural representation of the utility model local discharge signal harvester first embodiment;
Fig. 2 is the structural representation of the utility model local discharge signal harvester second embodiment;
Fig. 3 is the structural representation of the utility model local discharge signal harvester the 3rd embodiment;
Fig. 4 is the structural representation of the utility model local discharge signal harvester the 4th embodiment;
Fig. 5 is the structural representation of the utility model local discharge signal harvester the 5th embodiment;
Fig. 6 is the structural representation of the utility model local discharge signal harvester the 6th embodiment;
Fig. 7 is the structural representation of the utility model local discharge signal harvester the 7th embodiment.
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the utility model, and be not used in restriction the utility model.
Refer to Fig. 1, Fig. 1 is the structural representation of local discharge signal harvester first embodiment of the present utility model.
The described local discharge signal harvester of present embodiment can comprise sampling mainboard 100 and by the interconnective signal-processing board 300 of bus, trigger pip circuit and at least two hyperchannel AD daughter boards 200, described trigger pip circuit is arranged on sampling mainboard 100, signal-processing board 300 assigns in the first draw-in groove of sampling mainboard 100, and each hyperchannel AD daughter board 200 assigns in the second draw-in groove of sampling mainboard 100.
Signal-processing board 300 can be used for transmitting control signal to trigger pip circuit.
Trigger pip circuit can be used for responding described control signal and sends sampling trigger signal to hyperchannel AD daughter board 200.
Hyperchannel AD daughter board 200 can be used for responding the local discharge signal that described sampling trigger signal gathers each sensor 500 transmission of electric system.
Signal-processing board 300 also can be used for the local discharge signal reading the collection of hyperchannel AD daughter board 200, and carries out pre-service to described local discharge signal.
Present embodiment, by sampling mainboard and carry out distributed data acquisition by the interconnective signal-processing board of data bus, trigger pip circuit and at least two hyperchannel AD daughter boards, both can meet the needs that the many data of monitoring point of multisensor gather, the sampling request of the local signal of more high band can have been adapted to again.While discrete sample pressure, increase the robustness of sampling.
Wherein, for sampling mainboard 100, be preferably card insertion type mainboard, hyperchannel AD daughter board 200 and signal-processing board 300 all can the form of board be inserted in the corresponding draw-in groove of sampling mainboard 100.Such structure is convenient to the replacing of each piece of hyperchannel AD daughter board 200 and signal-processing board 300, each hyperchannel AD daughter board 200 and signal-processing board 300 are respectively a module simultaneously, each module in charge function separately, is convenient to the system integration, improves hardware and software development efficiency.
Further, sampling mainboard 100 is motherboards of hyperchannel AD daughter board 200 and signal-processing board 300, can be their hyperchannel AD daughter boards 200 and signal-processing board 300 provides slot, bus interface, I2C interface, power supply and part subsidiary function.The sensor type identification etc. of each passage of trigger pip circuit, hyperchannel AD daughter board 200 as described in needed for signal-processing board 300.
For hyperchannel AD daughter board 200, can be the AD daughter board comprising two sampling channels.Preferably, the number of hyperchannel AD daughter board 200 can be two or more.According to shelf depreciation environment and the concrete number of collection requirements set of reality.
Preferably, hyperchannel AD daughter board 200 can comprise double channel A/D C chip.
For signal-processing board 300, be the core of local discharge signal harvester of the present utility model, realized calculating and the control of signals collecting by signal-processing board 300.
Preferably, local discharge signal harvester of the present utility model also can comprise background server 400, and signal-processing board 300 is connected with background server 400 by Ethernet, carries out the transmission of the local discharge signal gathered.
For trigger pip circuit, for controlling the collection sequential of hyperchannel AD daughter board 200.When hyperchannel AD daughter board 200 has multiple, trigger automatically controlledly controlling each hyperchannel AD daughter board 200 synchronous acquisition local discharge signal.
Refer to Fig. 2, Fig. 2 is the structural representation of local discharge signal harvester second embodiment of the present utility model.
The described local discharge signal harvester of present embodiment and the difference of the first embodiment are: hyperchannel AD daughter board 200 can comprise interconnective CPLD, double channel A/D chip and static RAM, wherein:
Described CPLD sends sampling control signal for responding described sampling trigger signal to described double channel A/D chip.
Described double channel A/D chip receives the local discharge signal of each sensor transmission for responding described sampling control signal, and to described CPLD transmission.
Described local discharge signal also for sending write control signal to described static RAM, is buffered into described static RAM by described CPLD.
Present embodiment, can carry out distributed data acquisition, meets the demand that the many data of monitoring point of multisensor gather.Make the controlling of sampling of data, read-write sequence and control better.
Preferably, described double channel A/D chip can comprise 14 binary channels analog-digital chips.Described CPLD (CPLD) can realize the controlling of sampling of double channel A/D chip, reading and writing data sequential and to logics such as the Read-write Catrol of SRAM.CPLD also can to the pre-service of sampled signal, bus interface timing etc.
Further, CPLD can be XC95144, and XC95144 provides 144 macroelements and 3200 available doors, 144 pins, 117 user I/O, this XC95144 may operate in the clock frequency up to 178MHZ, only have the logical time delay of pin to pin of 5 ns simultaneously.Under may operate at higher frequency, meet the needs of high-speed sampling, simultaneously cheap.
Further, the highest frequency of described double channel A/D chip is 60MH, and the Partial discharge signal that can adapt to more high band gathers requirement.
In one embodiment, hyperchannel AD daughter board 200 also can comprise difference and turn single-ended and low-pass filtering, and difference turns single-ended and realized by amplifier, and low-pass filtering is realized by low-pass filter.The two-pass DINSAR simulating signal (local discharge signal) that hyperchannel AD daughter board 200 receives can transfer single-ended signal to via amplifier, then carry out filtering via low-pass filter, then filtered signal sends into double channel A/D chip after signal transformer isolation, now double channel A/D chip commencing signal sampling under the control of CPLD.Meanwhile, the data bus of the data bus of double channel A/D chip and CPLD, described static RAM (SRAM) storage array connects together, and the sampling that CPLD can process A/D chip flexibly exports data.Data can be read in CPLD and carry out some filtering process, then by data stored in local cache, or directly can provide the write control signal of SRAM, sampled data is write local cache.The memory array be made up of SRAM serves as jumbo local storage, carries out buffer memory to sampled data, waits for that sampled data is taken away by the CPU of rear end.
Refer to Fig. 3, Fig. 3 is the structural representation of local discharge signal harvester the 3rd embodiment of the present utility model.
The described local discharge signal harvester of present embodiment and the difference of the first embodiment are: described double channel A/D chip can be AD9248, AD9248 is 14 binary channels analog-digital chips, this AD9248 can adopt 3.3V to power, speed can comprise 20MS/s, 40MS/s and 60MS/s tri-kinds, have two independently SHA and ADC, a Voltage Reference being integrated in chip internal.
Refer to Fig. 4, Fig. 4 is the structural representation of local discharge signal harvester the 4th embodiment of the present utility model.
The described local discharge signal harvester of present embodiment and the difference of the first embodiment are: described static RAM can comprise the asynchronous CMOS static random access storer of two 16.The asynchronous CMOS static random access storer of 16 can adopt IS61LV51216 as local storage.IS61LV51216 is the asynchronous CMOS static RAM (SRAM) of 512K16bit that 3.3V powers, and has the feature of high-speed low-power-consumption.
Refer to Fig. 5, Fig. 5 is the structural representation of local discharge signal harvester the 5th embodiment of the present utility model.
The described local discharge signal harvester of present embodiment and the difference of the first embodiment are: signal-processing board 300 can be DSP signal-processing board, can be used for:
Respectively from the described local discharge signal of reading of hyperchannel AD daughter board 200.
Pre-service is carried out to described local discharge signal.
By the networking of the network communication module composition of expansion, pretreated local discharge signal is sent to relevant device.
Present embodiment, adopts DSP signal-processing board to be data processing core, carries out the work such as Signal Pretreatment and data compression to the mass data gathered, and utilizes the network communication module of expansion, realizes the networking function between many devices.
Preferably, the data being connected to each hyperchannel AD daughter board in bus are read by DSP signal-processing board and are stored in SDRAM, the HPI mouth of DSP signal-processing board provides the communication of main frame and DSP, current usage data selector switch, connect host interface and USB interface respectively, FLASH storage program, watch dog monitoring system cloud gray model, LED provides present procedure running status.Image data carries out various Signal Pretreatment in dsp, as denoising, sample analysis etc., realizes the networking function between each device by network interface.
Refer to Fig. 6, Fig. 6 is the structural representation of local discharge signal harvester the 6th embodiment of the present utility model.
The described local discharge signal harvester of present embodiment and the difference of the first embodiment are: described bus can comprise the bus of carrying out data transmission between slave and bus main control equipment, the bus of carrying out transfer address information between slave and bus main control equipment.
Preferably, described bus (self-defined bus) can comprise the bus (Data BUS) of carrying out data transmission between slave and bus main control equipment, the bus (Address BUS) of transfer address information is carried out between slave and bus main control equipment, control bus mainly completes storer, I/O, interrupt, DMA, and the bus (Control BUS) of operation between CPU, also comprise master clock, system synchronization, the simplest one group of signal bus (Power & Ground BUS) in the function bus structure such as system reset.Bus shown in Fig. 6 is the set of Data BUS, Address BUS, Control BUS and other power leads, signal wire.
Bus control logic can have been come by the CPLD on hyperchannel AD daughter board 200.
Refer to Fig. 7, Fig. 7 is the structural representation of local discharge signal harvester the 7th embodiment of the present utility model.
The described local discharge signal harvester of present embodiment and the difference of the first embodiment are: described trigger pip circuit can comprise the not gate that interconnective comparer LM211 and Schmidt trigger input, the positive input terminal connection signal disposable plates of described comparer LM211, the output terminal of the not gate of described Schmidt trigger input connects described hyperchannel AD daughter board, wherein:
Described comparer LM211 is used for sine wave signal to be shaped as square-wave signal;
The not gate of described Schmidt trigger input is used for the further shaping of described square-wave signal, generates zero crossing waveform signal, is sent by described zero crossing waveform signal as synchronized sampling trigger pip to hyperchannel AD daughter board 200.
Present embodiment, can realize the synchro control to hyperchannel AD daughter board.
Preferably, the sampling trigger signal of described trigger pip circuit is power frequency component, and zero crossing waveform carries out synchronous sampling control synchronizing signal as sampling trigger signal.
In one embodiment, the not gate of Schmidt trigger input is SN74LVC1G17 is do further shaping by it to the output waveform of LM211, has reached spendable degree.
Described trigger pip circuit is placed on sampling mainboard 100, sends the signal starting to gather, transferred the signal to the in hyperchannel AD daughter board 200 by bus under the control of DSP signal-processing board to each hyperchannel AD daughter board 200.
In another embodiment, trigger pip circuit also can comprise 1N4148 diode D510,1N4148 diode D511,1N5819 diode D514, the first resistance R511, the second resistance R512, the 3rd resistance R513, the 4th resistance R515, the 5th resistance R527 and electric capacity C515.Wherein:
1N4148 diode is the small area analysis HF switch diode of point-contact type, and speed is high.Two 1N4148 diode D510 and D511 form clamping circuit, the sine-shaped top of input and bottom are remained on about the forward voltage 0.7V of 1N4148.
The feature of 1N5819 diode is speed ultrafast (switching loss is low), forward voltage drop spy low (voltage loss is low), but oppositely withstand voltage also low, is usually less than 60V.Use 1N5819 diode D514 as input protection diode in the present embodiment, prevent input superpotential to the infringement of comparer chip U507.
First resistance R511, the second resistance R512 form bleeder circuit, make the negative input input voltage of comparer chip U507 be about 0.7V.
3rd resistance R513, the 4th resistance R515 also form bleeder circuit, coordinate D510 and D511 clamping circuit to decide the input voltage size of the positive input of comparer chip U507.When input waveform is within positive and negative 0.7V, because D510 and D511 does not all have conducting, so now the forward input voltage of comparer chip U507 equals the dividing potential drop 2.5V of R513 and R515; When input waveform is beyond positive and negative 0.7V, one in D510 or D511 by conducting, then the forward input voltage of U507 is clamped to about 0.7V.Thus, the output of comparer chip U507 along with this waveform change upset, will realize the sine-shaped zero passage detection of power frequency 50Hz.
5th resistance R527 lifts piezoresistance, and the high level that comparer chip U507 exports is drawn high 3.3V.
Electric capacity C515 and resistance R514 forms simple capacitance-resistance low-pass filter circuit, carries out filtering, filter away high frequency noise to the output waveform of comparer chip U507.
The above embodiment only have expressed several embodiment of the present utility model, and it describes comparatively concrete and detailed, but therefore can not be interpreted as the restriction to the utility model the scope of the claims.It should be pointed out that for the person of ordinary skill of the art, without departing from the concept of the premise utility, can also make some distortion and improvement, these all belong to protection domain of the present utility model.Therefore, the protection domain of the utility model patent should be as the criterion with claims.
Claims (9)
1. a local discharge signal harvester, it is characterized in that, comprise sampling mainboard, signal-processing board and at least two hyperchannel AD daughter boards, described sampling mainboard comprises trigger pip circuit, described signal-processing board, described hyperchannel AD and described trigger pip circuit are interconnected by bus, described signal-processing board assigns in the first draw-in groove of described sampling mainboard, and described hyperchannel AD daughter board assigns in the second draw-in groove of described sampling mainboard.
2. local discharge signal harvester according to claim 1, is characterized in that, described hyperchannel AD daughter board comprises interconnective CPLD, double channel A/D chip and static RAM.
3. local discharge signal harvester according to claim 2, is characterized in that, described static RAM comprises the asynchronous CMOS static random access storer of two 16.
4. local discharge signal harvester according to claim 2, is characterized in that, described double channel A/D chip comprises 14 binary channels analog-digital chips.
5. local discharge signal harvester according to claim 1, is characterized in that, described signal-processing board is DSP signal-processing board.
6. local discharge signal harvester according to claim 5, is characterized in that, described DSP signal-processing board also comprises the network interface extended out.
7. local discharge signal harvester according to claim 1, it is characterized in that, described trigger pip circuit comprises the not gate of interconnective comparer LM211 and Schmidt trigger input, the positive input terminal of described comparer LM211 connects described signal-processing board, and the output terminal of the not gate of described Schmidt trigger input connects described hyperchannel AD daughter board.
8. local discharge signal harvester according to claim 1, is characterized in that, also comprise background server, and described signal-processing board is connected with described background server by Ethernet.
9. local discharge signal harvester as claimed in any of claims 1 to 8, it is characterized in that, described bus comprises bus and the bus of transfer address information between slave and bus main control equipment of the transmission of data between slave and bus main control equipment.
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105319490A (en) * | 2015-12-04 | 2016-02-10 | 重庆臻远电气有限公司 | Partial discharge data acquisition circuit and equipment |
| CN105334443A (en) * | 2015-12-04 | 2016-02-17 | 重庆臻远电气有限公司 | Partial discharge data collecting circuit and monitoring equipment |
| CN105353287A (en) * | 2015-12-04 | 2016-02-24 | 重庆臻远电气有限公司 | Partial discharge data acquisition circuit and apparatus |
| CN106324482A (en) * | 2016-08-26 | 2017-01-11 | 天津市英贝特航天科技有限公司 | LBE bus mainboard automatic test realization method |
| CN110554283A (en) * | 2018-05-31 | 2019-12-10 | 广东电网有限责任公司 | Envelope signal sampling device of partial discharge signal |
| CN110850776A (en) * | 2019-11-21 | 2020-02-28 | 杭州迪普科技股份有限公司 | Control method and control device of frame type equipment and frame type equipment |
-
2014
- 2014-10-23 CN CN201420622510.8U patent/CN204166088U/en active Active
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105319490A (en) * | 2015-12-04 | 2016-02-10 | 重庆臻远电气有限公司 | Partial discharge data acquisition circuit and equipment |
| CN105334443A (en) * | 2015-12-04 | 2016-02-17 | 重庆臻远电气有限公司 | Partial discharge data collecting circuit and monitoring equipment |
| CN105353287A (en) * | 2015-12-04 | 2016-02-24 | 重庆臻远电气有限公司 | Partial discharge data acquisition circuit and apparatus |
| CN106324482A (en) * | 2016-08-26 | 2017-01-11 | 天津市英贝特航天科技有限公司 | LBE bus mainboard automatic test realization method |
| CN110554283A (en) * | 2018-05-31 | 2019-12-10 | 广东电网有限责任公司 | Envelope signal sampling device of partial discharge signal |
| CN110850776A (en) * | 2019-11-21 | 2020-02-28 | 杭州迪普科技股份有限公司 | Control method and control device of frame type equipment and frame type equipment |
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Effective date of registration: 20231106 Address after: 510620, No. two, No. 2, Tianhe South Road, Guangzhou, Guangdong, Tianhe District Patentee after: Guangzhou Power Supply Bureau of Guangdong Power Grid Co.,Ltd. Patentee after: SHANGHAI JIAO TONG University Address before: 510620, No. two, No. 2, Tianhe South Road, Guangzhou, Guangdong, Tianhe District Patentee before: GUANGZHOU POWER SUPPLY Co.,Ltd. Patentee before: SHANGHAI JIAO TONG University |