CN1959966A - 包括冶金接合的集成电路装置以增强到散热片的热传导 - Google Patents

包括冶金接合的集成电路装置以增强到散热片的热传导 Download PDF

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CN1959966A
CN1959966A CNA2006101395386A CN200610139538A CN1959966A CN 1959966 A CN1959966 A CN 1959966A CN A2006101395386 A CNA2006101395386 A CN A2006101395386A CN 200610139538 A CN200610139538 A CN 200610139538A CN 1959966 A CN1959966 A CN 1959966A
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matrix
knitting layer
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CN1959966B (zh
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万斯·D.·阿彻尔三世
库罗斯·阿兹米
大卫·P.·切希尔
沃伦·K.·格莱丹
康承赫
鞠泰镐
塞勒西·M·莫扎特
维万·莱恩
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Avago Technologies International Sales Pte Ltd
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Abstract

一种包括冶金接合的集成电路装置,可增强到散热片的热传导。在半导体装置中,集成电路模片的表面冶金地接合至散热片表面。在装置制造的实例方法中,封装衬底的上表面包括内部区域和***区域。集成电路模片放在衬底表面上,集成电路模片的第一表面与封装衬底接触。金属化层是在集成电路模片的第二相对表面上形成的。预制成型件放在金属化层上,而散热片放在预制成型件上。接合层是用预制成型件形成的,将散热片冶金接合至集成电路模片的第二表面。

Description

包括冶金接合的集成电路装置 以增强到散热片的热传导
技术领域
一般而言,本发明涉及半导体集成电路。更明确地讲,本发明涉及从集成电路装置传输热量的结构和相关方法。
技术背景
现在普遍采用倒装晶片(flip chip)法将半导体模片通过封装衬底电气连接至引线板。这些方法尤其适用于含有大量接合垫的装置,成为传统引线接合的替代法。所述封装衬底作为印制电路或引线板的接口,在一种被熟知为FCBGA的布局中,或称为倒装晶片球栅阵列。在这些装配中,散热片被用来驱散操作装置期间产生的热量,其中热润滑脂通常用作模片的背部和散热片之间的接口。然而,模片的背部和散热片之间的热导率通常低于最佳热散逸的期望值。这一部分是因为与模片邻接放置的散热片表面不是十分光滑。半导体装置的背部表面也可能存在光滑性差异。结果是空气经常被困在这两个表面之间,使从装置到散热片的热传输效率降低。
几种平滑这些粗糙表面的方法被提出。包括对接触面施加压力。其它消除缝隙的方法包括填充高导热率的材料,如热润滑脂,使用橡胶垫,传导粘合剂,相变材料,云母垫,胶带和多酰胺膜。
典型的热润滑脂含有合成物,其包括硅或烃油以及热导材料(如氧化铝),另一种氧化物粉,或其它适宜的传导填充材料。传导材料的粒度对于决定涂层热导性是至关重要的。此外,***热润滑脂层从制造角度来讲可能是有难度的,例如,这样的润滑脂易在短时间段内挥发、压出并流动,而且,因为这些热润滑脂没有黏性,必须引入一种机械附着技术以在散热片/装置表面施加足够的压力并最小化接合层厚度。通常,这样的黏性由额外的散热垫和粘合层提供,以使所述模片与散热片松散地接触。基于硅的润滑由于可能污染焊接区域而需要得到人们的关注。
橡胶比热润滑脂更容易使用,但要求更高的机械压力将材料注入以填充空缺。一些橡胶材料是预制成型的。这些橡胶填充物由含有高热导材料(如氮化硼)矩阵的硅胶垫组成。施加必要的压力可产生额外压力使得导线和焊接点可断裂。额外压力还可能影响封装内的芯片。
多孔性也是热塑化合物的一种非期望的特性,造成传导热量低效传输。而且在这样的化合物、散热片和硅之间的热扩张的差异会引起可靠性问题。
人们还知道当装置处于宽泛的温度和湿度条件时,橡胶和热润滑脂将呈现相位变化,使装置不适合于计算机***、汽车和移动通讯装置的应用。
发明内容
依照发明,半导体装置包括具有第一和第二表面的集成电路模片。第一表面用于电气连接在其上形成的元件以及众多的焊接突起封装导体。散热片有一个表面冶金地(metallurgically)接合至集成电路摸的第二表面。
在相关方法中,封装衬底包含上下表面,上表面包括内部区域和***区域。集成电路模片放在衬底上表面上。模片包含与封装衬底接触的第一表面和在其上形成金属层的第二相对表面。预制成型件放在金属层上,散热片放在预制成型件上。接合层随预制成型件形成,将散热片冶金地接合至集成电路模片的第二表面。
附图说明
前面提到的以及其它的发明特性在接下来更具体的发明介绍中将会更明显,如附图所示,其中附图标记代表通篇各图中相同的部件。附图并非一定按比例绘制,而在于着重阐述发明原理。
图1跟据发明展示了封装集成电路装置的横截面视图。
图2是在半导体晶片上形成的背部金属堆叠的横截面视图。
图3、4、5根据发明以横截面视图展示了半导体装置制造过程的步骤。
图6是根据发明在散热片上形成镀金属堆叠的横截面视图。
图7根据发明的另一种实例展示在散热片上形成的镀金属堆叠。
图8是在半导体晶片上形成背部金属堆叠的另一种实例横截面视图,当装置已在晶片正面形成之后制造工序中的步骤。
具体实施方式
当发明在采用倒装晶片法封装半导体模片的文中描述时,我们应该认为这只是提供改进热传输的结构和方法的示范。
但对于热失配和材料不相容等问题,金和以金为主的合金作为用来在散热片和半导体模片间的接口之间传输热量的过渡层将是优选的组成部分。金和以金为主的合金(如金和硅(Si)、锡(Sn)或锗(Ge)的组合)比包括上面讨论的热润滑脂在内的有机材料有更高的热导率。根据发明的一个实例,预制成型结构由金或以金为主的合金材料构成。当这样的预制成型件置于在集成电路装置和散热片之间的多层冶金堆叠中时,所得到的层与邻接材料是相容的,并提供从集成电路模片驱散热量的有效路径。
参考图1,为了更清晰地阐述发明特性,集成电路装置10的局部视图如图所示。装置10包含集成电路模片14所附着的封装衬底12。模片14包括形成电路装置所在的有效面16、和提供热散逸路径的背面18。在一些情况下,集成电路模片14的芯片直装附着法可以在电路板26上实现,消除过渡的封装衬底12。在这个实例中,电路板26可被构建来接触所述加固环。
模片14的有效面16正对并以焊接突起20的方式通过众多的电气接触连接至封装衬底12。焊接突起20可能被围在非传导的下填充材料22中而得以保护。封装衬底12含有进一步的互联***(未展示),提供从焊接突起20到封装外部焊接球24矩阵的电气连接。焊接球24连接至电路板26或另一装置以实现与模片14上线路的电气连接。
模片14的背部表面18通过夹在之间的第一接合层30与散热片28接触。在一个实例中,接合层30由金或以金为主的合金层组成,提供从模片14的背部表面18到散热片28的高热导路径。接合层30提供了模片表面18和散热片28之间的冶金接合。散热片28可能附着的封装***中的各部分未作介绍。例如,散热片可能是多芯片模块封装的部件。
矩形加固环32随着诸如粘合层34附着在封装衬底12的***,以形成封装衬底12的集成部件。加固环32、封装衬底12和散热片28的组合,围绕着模片14。在阐述的实例中,同样可能由金或以金为主的合金层组成的第二接合层36,提供加固环32和散热片28之间的冶金接合。
在提供热润滑脂层的场所,接合层30与模片14和散热片28中任一个之间的冶金接合都实现了模片14和散热片28之间的高热导路径。根据本发明,装置10制造过程的工序在下面参考图2至7进行介绍。
图2展示了半导体晶片40在众多集成电路装置(未展示)已于正面有效侧42上形成之后的制造工序中的步骤。晶片40的背部44被定为以接收可由例如粘合层48、阻挡层50和含金层52组成的背部金属堆叠46。由于金不能很好地与硅粘合,提供的粘合层可能包括用传统的等离子蒸气沉积(PVD)溅射技术堆积的1000埃到2000埃的钛。在粘合层48上形成的阻挡层50,例如通过喷镀,以防止层52上的金通过粘合层48扩散并进入晶片40的半导体材料。优选的,阻挡层50主要包括铂,其提供具有低腐蚀和低氧化性的稳定膜层。阻挡层50在厚度上可能介于50到1000埃的范围,优选厚度为1000埃。其它形成阻挡层50的材料包括镍、钯、铜、铬和它们的合金。在阻挡层50上形成的金层52,确保了在接下来的接合过程中金的可用性,并促使接合层30与模片14和散热片28中每一个之间形成冶金接合。金层52在厚度上可能介于1000到15,000埃的范围,优选厚度为2000埃。根据应用要求这些范围可能会有所超出。层52还可能由如金-硅、金-锡、金-铬的金合金组成。
尽管没有介绍,晶片40接下来的处理工序可能包括传统的使用倒装晶片或其它封装方法的封装步骤。焊接突起20采用几种熟知工艺中的一种应用于晶片40的有效面42。在形成焊接突起20期间,保护层(未展示)可能应用于背部金属堆叠46来防止它遭到破坏并因此被移除。那样模片14就被孤立了。
图3展示了放在封装衬底12上的模片14,有效面16上的焊接突起20连接至封装衬底12上的接缝垫(未展示),后者提供与焊接球24的接触。背部金属堆叠46背对封装衬底12。加固环32通过粘合层34连接至封装衬底12的外部区域形成封装衬底12的集成部件。下填充材料22用于保护焊接突起20。
接下来,图4展示了电路内部预制成型件60,包括放在模片14背部金属堆叠46上的金合金。金合金材料的电路内部预制成型件60用来将模片14的背部金属堆叠46冶金地附着于散热片28,从而允许紧密接触而丝毫没有空气空缺。同时随着电路内部预制成型件60的放置,外部预制成型件62被放在加固环32上。每个预制成型件60、62都包括金合金,其是接合层30、36成分。通过举例,电路内部和外部预制成型件60、62的金合金可能包括硅、锗或锡,这导致比纯金有更低的共熔(eutectic)接合温度,尽管预制成型件可能是由纯金组成的。根据发明的一方面,采用达到或高于预制成型件60、62中金合金的共熔温度的加热会熔化预制成型件,并从任何邻接金属层(如背面金属堆叠46以及散热片28的金属堆叠70)中消耗金。在冷却中,固体材料结合以在每个预制成型件和邻接的背部金属堆叠46之间形成冶金接合。金合金的组成可根据共熔属性来选择。例如,预制成型件60、62可能包括金和百分之6重量硅的共熔成分。其它金合金可能含有金和近似百分之20重量的锡、或金和百分之12重量的锗。预制成型件60、62的厚度范围可能在0.5和2密耳(mil)之间,优选厚度为1密耳。或者,散热片28在被附着于模片14和加固环32之前可能适合于预制成型件60或62。或者,在使用预制成型件的场所,金或金合金可以在金属堆叠46上以电镀过程或其它沉积工艺形成。集成电路模片可以直接附着至电路板26,使用上述过程,以构建与晶片直接附着法相同的附着过程。
图5展示了与电路内部和外部预制成型件60、62接触的散热片28以围绕着模片14。图6展示的散热片28包括镀金属堆叠70、90,在散热片28的下部72形成。堆叠70与电路内部预制成型件60接触,堆叠90与外部预制成型件62接触。散热片28可包括铜、镍或合金42材料的衬底。堆叠70、90可能是由粘合层76,阻挡层78和金合金层80完全相同地组成。粘合层76可能是厚度为50到2000埃范围的钛层。阻挡层78可能是厚度为50到2000埃的范围的镍层。其它过渡贵金属元素,如铂或钯,也可用于层78。金合金层80在阻挡层78上沉积,厚度为1000到2000埃范围。76、78、80每个层都可能采用传统方法作为散热片制造过程的一部分进行沉积。
实现散热片28和模片14之间接合的示范性加热过程包括两个加热元件,每个含有分别对应预制成型件60、62之一的模式。所述元件可以施加于散热片28的背部82来达到必要的温度以形成接合层30、36。加热过程期间,金和背部金属堆叠46的层52中的(电路内部预制成型件60中)、以及散热片28的金属堆叠70所在层80中的其它材料,达到熔化温度成为流动的。当冷却时,所述材料形成接合层30,提供了模片14的背部18和散热片28内部表面72之间的冶金接合,产生了一条从模片14到散热片28的有效热传输路径。在加热过程中,外部预制成型件62熔化,并在冷却时形成接合层36,提供了在加固环32和散热片28的表面72之间的冶金接合。
加热过程期间提升的温度取决于金合金预制成型件60、62的成分。对于由近似百分之20重量锡组成的金-锡合金来说,形成镀金属接合的过程可能需要采用加热温度超过摄氏280的共熔温度,且优选的采用摄氏300到325范围的摄氏温度。由百分之12重量锗组成的金-锗合金可能优选的使用摄氏356摄氏度或更高的加热温度。用于散热片28的每个金属堆叠74、90的层80中的金合金成分应该与预制成型件60、62的成分一致。
如图7所示,根据发明的另一种实例,金合金层94构成散热片28的镀金属堆叠70a和90a的一部分。在此例中,层80a是可选的,但若被选中时,可能在500到1000埃范围的厚度,作为电镀过程中沉积层94的种子层。层94可以是1000到15,000埃范围厚度的金合金,由非电镀或电镀过程形成。层94可以是金与硅、锡或锗之一的合金。
在另一实例中,如图8所示,背部金属堆叠46a可由厚金合金层96形成,其由电镀过程沉积而成。在此例中,层52a是可选的,但若选中时,可以是一薄层金,500到1000埃范围的厚度,作为电镀过程的种子层。层96是金合金,2到10微米厚,也是由电镀或非电镀过程形成。外部预制成型件62在这个实例的制造过程中是可选的。
根据发明的另一实例,加热过程期间,硅从模片14的背部18通过阻挡层50迁移进入到电路内部预制成型件60。从模片14的背部18进入到电路内部预制成型件60上金合金的硅扩散创造了到达低共熔熔点的条件。背部金属堆叠46、46a的金层52、52a被消耗在电路内部预制成型件60的金合金的熔化过程中,并被拉向形成电路热传输接合层30的区域。被熔化的材料冷却并形成包括金、硅和其它一种元素(例如锡或锗)的接合层30,当这些元素包含在电路内部预制成型件60的金合金内时。一种机械附着过程,不需要热量,也可用来将散热片28附着于电路内部和外部预制成型件60、62。
虽然没有介绍,制造工序包括传统的附加步骤,例如倒装晶片制造,形成焊接球24,并进一步装配封装装置10与电路板26或另一结构。
已经介绍了具有改进的热传输能力的半导体装置。文中给出的实例提供了发明的实践基础,但显然会有各种变化。例如,当提到金是一种材料用于许多此处提到的结构时,我们可能发现其它热导材料也是适合的。更一般地说,不要将与介绍的实例有关的特性和因素理解为所有实例所要求的因素,且发明仅局限于下面的权利要求。

Claims (10)

1.一种倒装芯片的集成电路装置,包括:
封装衬底,其具有上表面和下表面,其中上表面具有用于接收所述集成电路装置的互联的内部区域和***区域;
具有上和下表面的加固环,其中该下表面附着于所述封装衬底的上表面的所述***区域;
集成电路模片,具有第一和第二相对侧,所述第一侧包括与所述内部区域互联电气连接的多个焊接突起;
散热片;以及
接合层,其冶金地接合至所述模片的所述第二侧。
2.权利要求1中的装置,进一步包括第二接合层,其冶金地接合至所述加固环上表面和所述散热片。
3.权利要求1的装置,其中所述接合层包括金和从包括硅、锡、锗的组中选择的至少一个元素的合金。
4.权利要求3的装置,其中接合层包括金和百分之二十重量的锡的合金,包括金和百分之一到六重量的硅的合金,或含有百分之十二或更少锗重量的金锗合金。
5.一种制造倒装芯片的集成电路装置的方法,包含步骤:
提供有上表面和下表面的封装衬底,其中上表面包括内部区域和***区域;
将集成电路模片定位在所述衬底的上表面上,所述模片包括与所述封装衬底相接触的第一表面和其上形成有金属化层的第二相对表面;
将一预制成型件定位在所述金属化层上;
将一散热片定位在所述预制成型件上;以及
用所述预制成型件形成一接合层,所述接合层将所述散热片冶金地接合至所述集成电路模片的第二表面。
6.权利要求5的方法,进一步包括步骤:
提供具有上下表面的加固环并将该下表面附着于所述封装衬底的所述***区域;
将第二预制成型件放在所述加固环的上表面和所述散热片之间;以及
用第二预制成型件形成一第二接合层,其将所述加固环冶金地接合至所述散热片。
7.权利要求5的方法,其中所述接合层包括金合金,所述金合金包括硅、锡、锗组成的组中选择的至少一种元素。
8.权利要求7的方法,其中所述接合层包括含有百分之二十重量的锡的金合金,或所述接合层包括含有百分之一到六重量的硅的金合金,或其中所述接合层包括含有不超过百分之十二、或17重量的锗的金锗合金。
9.权利要求5的方法,其中集成电路模片的第二表面包括硅,以及形成所述接合层包括硅从集成电路模片的第二表面迁移进入到所述预制成型件中,从而降低了预制成型件的熔化温度。
10.一种集成电路,包括:
衬底,包括多个电导体;
半导体模片,包括具有多个传导垫的有效面和相对的背面,所述模片放在所述衬底上,所述多个传导垫与所述衬底电导体相接触,所述背面背对所述衬底;
可回流的热导材料层,覆盖在所述半导体模片的背面;以及
散热片,冶金地接合至所述热导材料层,从而所述层为从所述模片的背面到所述散热片的热传输提供一热传导路径。
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CN1959966B (zh) 2010-05-12
US7429502B2 (en) 2008-09-30
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US20080026508A1 (en) 2008-01-31
TWI336512B (en) 2011-01-21
GB2442992B (en) 2011-06-22
GB0617493D0 (en) 2006-10-18
JP5250193B2 (ja) 2013-07-31
KR101245114B1 (ko) 2013-03-25
GB201020754D0 (en) 2011-01-19
GB2442992A (en) 2008-04-23
KR20070035457A (ko) 2007-03-30
US7327029B2 (en) 2008-02-05
GB2474967A (en) 2011-05-04
JP2007096316A (ja) 2007-04-12
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TW200721410A (en) 2007-06-01
TW200933838A (en) 2009-08-01

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