CN1689156A - 具有集成无源电子组件的电子组件及其制造方法 - Google Patents
具有集成无源电子组件的电子组件及其制造方法 Download PDFInfo
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- CN1689156A CN1689156A CNA038245426A CN03824542A CN1689156A CN 1689156 A CN1689156 A CN 1689156A CN A038245426 A CNA038245426 A CN A038245426A CN 03824542 A CN03824542 A CN 03824542A CN 1689156 A CN1689156 A CN 1689156A
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Abstract
一电子组件(EB)具有一第一绝缘层,于其上设置一第一金属层(5)。一电传导结构整合于所述的第一绝缘层(1),并于所述的电子组件(EB)的接合及/或装设期间机械化地稳定所述的第一绝缘层(1),并且形成一无源电子组件。
Description
技术领域
本发明与具有一集成电子组件的一电子组件以及用以制造这个电子组件的一方法有关。
背景技术
多数的数字/模拟合成电路的模拟电路部分都需要用到被动组件,例如具有一高电阻值、高线性度与高品质的电容器。为了最小化制造所述组件的成本,让所述的这些组件,尤其是电容或电感结构的组件尽可能以最少的制程步骤来制造是需要的。除此之外,这些组件以及集成电路最小化的发展常常伴随着使所述的集成被动组件具有最小可能的需求面积的要求。
在专利说明书US 5,583,359中已揭露用于一集成电路上的一电容结构。在那个例子中,多个用以形成一叠层电容的电极的金属薄板以堆栈的方式一层层的排列,并藉由介电层而加以分隔。设置于每一金属薄板上的是绝缘各别的薄板的一金属线。所述的金属现在每一个情况中藉由连接点接触连接两侧,由于这样,在其中一侧的所有置放于叠层上的奇数型式以及在另一侧的所有置放叠层中的偶数型式的薄板彼此之间是相互电连接的。藉由连接所述的置放在偶数型式中的薄板到一第一连接线以及连接所述的置放在奇数型式中的薄片到一第二连接线,相邻的薄板处于不同的电位下并且在每一情形中形成一对一对型式的一薄板电容的电极。所述的电容表面的面积因此由薄板的表面所构成。这样的电极的一个可替代的具体实施例可藉由形成一长条状且彼此平行排列的线路所构成的薄板来形成。
所述的电容结构的另一个可能的配置方法已揭露于Aparicio,R.and Hajimiri,A.于IEEE Journal of Solid-State Circuits,Vol.37,No.3,2002,pp.384-393所发表的文章“Capacity Limits andMatching Properties of Integrated Capacitors”中,其中于该文献的图5-图10中已表示出一透视的说明。
除此之外,在具有以具有低接口常数的材料,例如SiLK(具有介电常数值2.65的有机材料)、黑钻石、珊瑚(具有一介电常数小于3的掺杂碳的两个氧化物)、或其多孔隙的形成物,所形成的介电区域的新颖式芯片上,通常需要进行机械应力的强化,以为了避免这些接口材料在考量到该组件受到机械利的作用下的低硬度可能受到的损坏。
因此,所述的被动组件以及机械装设结构所组成的组件都需要一相对大数量级的空间。空间越大所述的机械装设结构在所述的组件完成之后便不再需要,尤其是在接合或者是该组件在封装的装设上。
因此,本发明的目的在于提供一具有集成无源电子组件一电子组件以及用以制造所述的电子组件的方法,而且本发明可以以一相对较低花费与节省空间的方法来进行制造,而且对于任何机械力的作用可以是更坚固耐用的。
发明内容
本发明之目的可藉由具有如权利要求1特征的电子组件以及具有如权利要求18所述步骤的方法来达成。
根据本发明的一电子组件具有一第一绝缘层,一上金属层形成于所述的绝缘层上。所述的上金属层形成一电传导接合衬垫层,尤其是所接合的可以是,铝、金接线,用以电连接所述的电子组件或芯片的接触区域到一封装结构的接触轨道,该封装结构用以装设所述的电子组件。一电传导结构整合于所述的第一绝缘层而且于机械力作用的情况下机械性地稳定所述的第一绝缘层,尤其是在所述的上金属层的接合期间及/或所述的电子组件(EB)的装设期间。所述的电传导结构额外地形成一无源电子组件。
因此,制造只要一相对较低的空间需求而且可以以一相对较低的成本制造的电子组件是可能的。所述的电传导结构在电子组件中一方面作为当机械力作用于该组件上的装设结构,尤其是用于所述的第一绝缘层的一机械装设结构,而另一方面也作为所述的电子组件的一被动组件。这个具有双重功能的个别结构减少了制造期间的制程步骤,因此制造的成本因为机械支持或稳定结构与被动组件结构不需要各别制造而得以降低。
在一较佳的具体实施例中,所述的第一绝缘层形成一由介电常数数值小于4的材料所组成的介电层。举例来说,一种有机材料,SiLK的介电常数具有2.65的数值。其它材料可以是,例如碳掺杂氧化物以及具有一介电常数小于3的珊瑚或黑钻石。这些材料的较小模数以及低硬度意味着即使相对较低的机械力可能造成损坏,由于这样,因此在集成的电传导结构作为提供机械稳定性的情况中证明是特别的具有优势。所述的第一绝缘层也可能形成一多层结构的***,其中各别的结构层在某些情况下也具有高于4的介电常数。在这个情况中的基本论点在于所述的多结构层***具有小于4的介电常数,特别是小于3的介电常数。
在一较佳的具体实施例中,所述的电传导结构基本上铅直地排列于所述的上金属层的一接合区域下方。所述的接合区域基本上表示所述的上金属层上方的区域,而且可以许多不同的方式来实现,其中于所述的上金属层上,一电连接结构,特别是接触接线,用以产生与所设置的封装结构的接触轨道产生电接触。将所述的电传导结构直接排列于所述的接合区域下方造就了一最佳化的机械稳定性。假如所述的电传导结构的尺寸在平行于所述的上金属层的平面上具有至少所述的接合区域的尺寸是特别较佳的。无关于一接合区域的位置或是机械力作用于所述的接合区域上的作用,所述的第一绝缘层或整个电子组件因此可以免于机械损坏或毁灭。
将所述的电传导结构排列于所述的第一绝缘层以使得所述的电传导结构基本上充满所述的第一绝缘层的水平平面上。结果,所述的电传导结构形成于所述的第一绝缘层上以使得所述的第一绝缘层的水平表面的部分区域由所述的电传导结构的表面区域所形成。在这个情况下,所述的电传导结构以最大的数量级形成于在铅直方向上的第一绝缘层上(第一绝缘层与电传导结构基本上在铅直方向上具有相等的尺寸)。所述的机械稳定性由于这样可以再次改善,因为于所述的接合区域下方不在具有所述的第一绝缘区域的不被该电传导区域所装设的较低机械稳定性或「软」区域。
另一个较佳的具体实施例的特征在于所述的电传导结构藉由一金属长条,特别是形成于另一金属化平面上的接触金属长条的连接结构而连接到一供应电压电位,而且也藉由形成于一金属化平面上的另一金属长条所形成的连接结构而连接到接地端的电位。所述的结构也许提供成两个接触长条皆形成于相较于所述的第一绝缘层具有一较佳的机械稳定性的材料所制造的一第二绝缘层上。所述的第二绝缘层的材料的弹性模数较佳者具有一大于15Gpa(gigapascals),特别是20Gpa的数值,而且其硬度大于4。然而,所述的结构也可能供应成只有一个或者没有何接触长条形成于所述的第二绝缘层上。这与所述的电传导结构的几何性质以及接触金属长条的相关排列有关。于由具有高机械稳定性的材料所组成的一第二绝缘层上形成只少一个能够使电传导结构电接触式地连接到电压电位的金属长条达成了所述的电子组件于机械力的作用下的一额外的稳定性,特别是于所述的上金属层的接合区域上。一氧化层或者由FSG(fluorosilicate glass)所形成的一介电层可能用来构成所述的第二绝缘层。
另一个特别具有优势的是假如一电传导遮蔽层形成于介于所述的上金属层以及所述的电传导结构之间。所述的电传导遮蔽层分别与所述的上金属层以及所述的电传导结构相互绝缘。所述的遮蔽层可以特别有利的形成一金属层,该金属层较佳者连接到接地端的电位上。由于这样可以达成的是供应到所述的上金属层的信号无法耦接于在下方的电传导结构层而供应到所述的电传导结构层或供应到所述的被动组件的信号也无法耦接到上方的上金属层。
较佳者,形成所述的遮蔽层于一第三绝缘层上,所述的第三绝缘层排列于所述的上金属层与所述的第一绝缘层之间。较佳者将所述的第三绝缘层作为一氧化层使得所述的第一绝缘层获得另一个机械性质的改良变得可能。所述的遮蔽层可以形成一连续平板或者是一网格结构。
当所述的遮蔽层较佳者形成使该面对电传导结构的遮蔽层面积于数量级上至少相当于所述的电传导结构层面对该遮蔽层的面积时,可以获得特别有效的一电子遮蔽。所述的遮蔽层较佳者形成与所述的电传导结构上以使得,所述的遮蔽层的一平面图的情况中,该遮蔽层的面积轮廓覆盖所述的电传导结构的面积轮廓。
另一个较佳的具体实施例在于所述的电传导结构形成一电容结构及/或一电感结构。在这个情况中,该结构可能提供成所述的电传导结构完全制造成一电容或完全制造成一电容。然而,在多个部分结构中,在所述的第一绝缘层上,一部份结构可排列成一电容结构而且另一部分结构排列成一电感。
所述的电传导结构的一较佳具体实施例的特征在于至少一部份结构形成一电容结构,其延伸超过至少两个金属化平面,而且排列成彼此平行而且以电绝缘的方式彼此绝缘的金属长条形成于每一金属化平面上。所述的第一金属化平面的金属长条基本上一致地排列于相对所述的第一金属化平面上的金属长条,而且透过连接结构以铅直的方向彼此相互电连接。
另一个较佳的具体实施例中,所述的结构提供成至少所述的电传导结构的一部份形成一电感结构而且具有金属化平面,并于该平面上形成一螺旋金属轨道。
所述的上金属层可能藉由在第二绝缘层的一接触孔动而接触连接到形成于下方的电传导区域,特别是在所述的第三绝缘层中。所述的接触孔动角加者排列在所述的上金属层的接合区域以外的区域,而且如同所述的电传导区域的方式一样,可能排列成相对于所述的电传导结构具有一水平偏移。
在一较佳的具体实施例中,根据本发明所述的电子组件排列于一集成电路的一基板上。
在根据本发明的一种用以制造一电子组件的方法中,于一第一绝缘层上,形成一电传导结构以作为至少一被动组件以及作为用以装设在机械力作用下的第一绝缘层的一机械稳定性结构。于所述的第一绝缘层上制造一上金属层,其形成一电传导接合衬垫层,特别是机械力将作用于该衬垫层上,特别是在所述的电子组件的接合或是装设期间。
一种具有双重功能的电子组件结构因此可以以一简单的方式来制造,而且只呈现出较低的花费。因此,所述的电子组件可以以一节省空间的方式以及有效花费的方式来实现。
在一较佳的具体实施例中,所述的第一绝缘层从具有一介电常数小于4的材料中形成,更甚者则是介电常数少于3的材料。该绝缘层的机械稳定性的一可察觉的大幅度改善因此可以达成,特别是对于机械力作用时具有这样的机械不稳定性以及相对低敏感的材料。
在一较佳的具体实施例中,将所述的电传导结构形成于所述的上金属层的一接合区域是特别具有优势的,由于所述的电子组件,特别是在接合区域下方的电子区域的接合或装设,较大的机械力作用可能会造成损坏以及毁损。
本发明的其它较佳的具体实施例将藉由其它附属的权利要求中详细说明。
附图说明
本发明的较佳具体实施例将藉由下列所附加的图式加以详细说明,这些图式的简单说明如下:
图1表示根据本发明构想的一电子组件的一截面图说明;
图2表示根据本发明构想所述的电子组件的一电传导结构的一第一较佳具体实施例的透视图;
图3表示根据本发明构想所述的电子组件的一电传导结构的一第二较佳具体实施例的平面图;
图4表示对照图3所示的电传导结构的一详细说明的透视图。
具体实施方式
一电子组件EB(图1)具有一第一绝缘层1,在一较佳的具体实施例中,所述的第一绝缘层由具有低介电常数的一材料中所形成。一电传导结构2整合于所述的这个第一绝缘层1中。这个电传导结构2形成一电容结构并且由金属长条M11到M33所构成。所述的这些金属长条M11到M33沿着z轴方向延伸并彼此相互平行,而金属长条M11到M13、金属长条M21到M23,以及金属长条M31到M33在每一情况下形成于一金属化平面上。其中,金属长条M11、M21与M31相互对齐一致的排列成一直线并且透过一连接结构v彼此相互电连接。这样的排列方式同时对应到另两组金属长条M12、M22与M32,以及M13、M23与M 33。所述的金属长条M11、M21与M31以及M13、M23与M33连接到一供应电压电位-DC或AC电压。另一组金属长条M12、M22与M32则是连接到接地端的电位。所述的电容结构设置于所述的第一绝缘层1以使得所述的金属长条M11、M12与M13终止于所述的第一绝缘层的一平面型式的较低水平表面上。同样的,所述的金属薄片M31、M32与M33则是嵌于所述的第一绝缘层1的表面以使得它们共同形成所述的第一绝缘层1的一较高水平表面且在x-z平面具有相同的水平高度。另一个绝缘层4b则是设置成紧连接所述的第一绝缘层1的方式,并且由一相对于所述的第一绝缘层具有更高的机械稳定性的材料所组成。其中,电子组件,例如晶体管等,形成于这个绝缘层4b中。所述的绝缘层设置于一基板(没有表示于图中)上。
所述的形成一电容结构的结构2除了在较佳具体实施例中所述的形成方法外,也可以以其它各种不同的方式来形成。另一个可能结构,已表示于Aparicio,R.and Hajimiri,A.于IEEE Journal ofSolid-State Circuits,Vol.37,No.3,2002,pp.384-393所发表的文章“Capacity Limits and Matching Properties ofIntegrated Capacitors”中的图5-图10中所表示的一透视图说明。所述的晶体管结构2也可以形成如一网格(grid)结构或者是一半导体组件中的一MOS结构。
在所述的这个结构2上,一电传导遮蔽层3作成的金属层设置于一第三绝缘层4a内。所述的遮蔽层3形成一个平板,设置于所述的第三绝缘层4a内,以使得所述的结构2完全排列在所述的遮蔽层3之下。所述的第三绝缘层4a在一较佳的具体实施例中,可以具体表示维一氧化层。较上方的一金属层5在所述的第三绝缘层4a上方形成一接合衬垫层5。所述的接合衬垫层5藉由形成于所述的第三绝缘层4a内的一接触孔6而连接到一电传导区域7。所述的接触孔与所述的电传导区域7都位在所述的接合衬垫层5的一接合区域BB之外。为了使所述的第一绝缘层1获得一最佳的机械强化或机械稳定性,尤其是发生于接合及/或在电子组件封装的装设期间所发生的机械力作用的情况下,所述的结构2基本上设置在所述的接合区域BB的正下方。所述的接合区域BB藉由移除(例如以曝光或是蚀刻的方式)形成于所述的接合衬垫层5上的结构层10,及/或氧化层8与氮化层9而产生。所述的结构层10在一较佳的具体实施例中为一PSPI层(photo-sensitive polyamidelayer)。
所述的遮蔽层3连接到接地端的电位,因此能够避免出现于硕的接合衬垫层5的一信号耦接到所述的结构2或者是出现在结构2的一信号耦街道所述的接合衬垫层5。
假如在所说明的具体实施例(图1)中,没有遮蔽层3存在的话,也许需要事先准备以在设置金属长条M31到M33的金属化平面内形成所述的电传导区域7。
图2表示一所述的电容结构2的一透视说明图,其中所包含的金属长条M11、M21与M31、金属长条M12、M22与M32以及金属长条M13、M23与M33在每一例子中藉由连接结构V而从y方向来看接触连接成一单一结构。其中,所述的金属长条M12、M22与M32到接地端电位的电连接,以及另两组金属长条M11、M21与M31与M13、M23与M33到供应电压电位的电连接藉由连接结构(没有表示于图中)与金属长条KM(没有表示于图中)所影响。至少所述的金属长条KM都形成于一第二绝缘层(没有表示于图中)内,所述的第二绝缘层相较于所述的第一绝缘层(如图1所示)具有一较高的机械稳定度。所述的第二绝缘层可以相当于如图1所示的第三绝缘层4。所述的第二绝缘层的材料相较于所述的第一绝缘层的材料具有一较高的机械稳定性。所述的第二绝缘层可以由例如,一氧化层或者是一FSG介电材料所形成的结构层所组成。然而,其中一种情况中也可能只有所述的接触长条KM形成于所述的第二绝缘层中。此外,在所述的第一绝缘层中形成接触金属长条也是可能的。
图3图标说明根据本发明的一电子组件的一电传导结构2的另一较佳具体实施例的平面图(沿着负y轴的方向看)。所述的电传导结构2形成在这个具体实施例中形成一电感结构。具有一矩形型式的一螺旋状的金属轨道MB4形成于一单一金属化平面上。所述的金属轨道MB4整合于所述的第一绝缘层1(没有表示于图3中)中。所述的以螺旋金属轨道型式所形成的电感结构也可能形成于多个金属化平面上,而在这种例子,如铜对照图1与图2所示的电容结构的具体实施例,可以看出本发明的一个基本论点,这里尤其指整个金属轨道MB4延伸于所述的第一绝缘层中的事实。在所述的螺旋状的内部端点上,所述的金属轨道MB4藉由连接结构V而接触连接到一接触金属长条KM,而所述的接触金属长条KM则是连接到一供应电压电位。所述的接触金属长条KM产生于一比所述的金属轨道MB4所形成的金属化平面更高的一金属化平面(对应图1、图2与图4,从y方向观察的平面)。在这个例子中,设置于更高位置的一金属化平面可以理解成,从一相同的方向来看,相较于具有那个电传导结构以电容结构及/或电感结构形成的那个金属化平面更远离那个设置根据本发明的电子组件EB的一集成电路的基板的一金属化平面。同时,在这个具体实施例中,所述的第二绝缘层可以相等于如图1所示的第三绝缘层4a。
而在所述的螺旋状金属轨道MB4的外部第二端点可能藉由连接结构(没有表示于图中)而电连接到接地端的电位以及另一个接触金属长条KM(没有表示于图中)。所述的这个另一个接触金属长条KM可能排列在所述的第一绝缘层1(图1)或第二绝缘层或一可能出现的更高(从正y的方向观察)的绝缘层。
所述的电传导结构2在平面图(图3)上的几何区域配置则是本发明的第二重点。因此,根据本发明的图3所示的螺旋金属轨道也可以设计成,例如正方形。在一较佳的特别方式中,所述的几何区域配置,特别是轮廓外形以及其所形成的电传导结构的尺寸特别选择成使得所述的第一金属层5的接合区域BB的范围,于投射到所述的电传导结构的轮廓范围上时,完全包含于所述的电传导结构的轮廓区域。
图4表示在图3中所描述的区域I的一透视截面表示。在图4中,形成一电感结构的一电传导结构整合于所述的第一绝缘层1并且形成于四个金属化平面上。MB1到MB4的其中一个金属轨道在每一情况中形成一金属化平面上,其中在每一情况中的金属轨道透过连接结构V而使彼此之间相互电接触连接。所述的连接结构可以形成是铅直的柱状结构或者是沿着平行于所述的金属轨道MB1到MB4延伸的装设架结构。在考虑所谓的阶级制度相互连接的科技方面,所述的金属轨道MB1到MB4随着与基板S的距离增加(沿着正y的方向)可能形成一越来越大的截面区域,以及彼此之间越来越长的间隔距离(沿着正y的方向)。而设置有所述的接触金属长条KM的第二绝缘层(没有表示于图中)可以以直接贴合的方式形成于所述的绝缘层1上。而如图1所示3-10的结构层,也许排列于所述的第二绝缘层上。如同从图4中可以看出,所述的具有金属线圈MB1到MB4形式的电感结构2也形成使所述的金属轨道MB4的表面区域以及金属轨道MB1的表面区域以形成一表面的型态(从x-z平面来观察)存在于所述的第一绝缘层1中。所述的金属轨道MB4在所述的第1绝缘层中的规划以如图中的需线所示,相同的规划也应用于金属轨道MB1到MB3中。所述的第一绝缘层1直接贴合所述的绝缘层4b,所述的绝缘层4b则形成于所述的基板S上。
形成所述的电传导结构2也可能准备成使其具有如参照图1或图2的具体实施例所示的电容结构的一第一部份结构以及参照图3或图4的具体实施例所示的电感结构的一第二部份结构。在这个实施例中,一具机械稳定性的结构以及两个无源电子组件可以实现于所述的电传导结构中。所述的部分结构可以设置于相邻的两侧或者是相互堆栈的两层。
所述的电传导结构可以以各种不同的方式来实现,而并不限定于本发明的具体实施例中所列举的方式。因此,所述的电传导结构也可以形成于两个或超过似的的金属化平面。同样的,所述的绝缘层在每一情况中可以从多层结构中建构出来。本发明的构想也可能只形成如根据图1与图2所示的电容结构于一金属化平面以及,例如以只制造金属长条M11、M12与M13。
藉由根据本发明的电子组件以及用以制造该电子组件的方法,藉由适当的成形技术以及形成于一绝缘层中的一单一电传导结构,特别是由具有一低介电常数的材料所形成的一介电层的排列,以产生被动组件以及所述的电子组件EB的机械装设或稳定结构是可能的,特别是,针对所述的其中有形成电传导结构的绝缘层,使其能够防止在座用力施加的情况下,例如在组件封装的装设或者是接合期间产生损坏。因此,最佳化的利用在所述的接合衬垫层底下的区域中进行,该区域基本上为电子组件所不需要利用的区域,因此造成最小尺寸与最佳功能利用的拓朴结构。
本发明的基础在于所述的电传导结构具有双重功能,其一方面具有至少一被动组件的形式,而另一方面则是作为所述的电子组件EB,特别是用于所述的第一绝缘层的一机械稳定性结构。
Claims (28)
1.一种电子组件,其具有
一第一绝缘层(1);
一上金属层(5),特别是电传导接合衬垫层,其形成于所述的第一绝缘层(1)之上;以及
一电传导结构(2),其整合于所述的第一绝缘层(1),以机械性地稳定在机械力作用下的绝缘层(1),特别是在所述的上金属层(5)的接合期间及/或所述的电子组件(EB)的装设期间,所述的电传导结构(2)形成一无源电子组件。
2.如权利要求1所述的电子组件,其特征在于
所述的第一绝缘层(1)由具有一介电常数小于4,特别是小于3的材料所形成。
3.如权利要求1或2所述的电子组件,其特征在于
所述的上金属层(5)具有一接合区域(BB)而所述的电传导结构(2)基本上排列在这个接合区域(BB)铅直下方。
4.如权利要求3所述的电子组件,其特征在于
在一平面上平行于上金属层(5)的电传导结构(2)的尺寸至少在数量级上相等于所述的接合区域(BB)。
5.如前面任一项权利要求所述的电子组件,其特征在于
所述的电传导结构(2)分别藉由连接结构(V)与电接触长条(KM),特别是接触金属长条,电连接到供应电压电位与接地端电位。
6.如前面任一项权利要求所述的电子组件,其特征在于
至少一电传导遮蔽层(3)形成于介于且以电绝缘的方式绝缘于所述的上金属层(5)与所述电传导结构(2)。
7.如权利要求6所述的电子组件,其特征在于
所述的遮蔽层(3)为一第二金属层并且电连接到接地端的电位。
8.如权利要求6或7所述的电子组件,其特征在于
所述的遮蔽层(3)形成于一第三绝缘层(4a),所述的第三绝缘层(4a)设置于所述的第一绝缘层(1)与所述的上金属层(5)之间。
9.如权利要求6-8任一项所述的电子组件,其特征在于
所述的遮蔽层(3)形成一连续平板或一网格结构。
10.如权利要求6-9任一项所述的电子组件,其特征在于
面对电传导结构(2)的遮蔽层(3)的面积至少在数量级上相同于面对遮蔽层(3)的电传导结构(2)的面积,而且排列成使得当这些面积投射到彼此时,所述的遮蔽层(3)的该面积完全覆盖所述的传导结构(2)的该面积。
11.如前面任一项权利要求所述的电子组件,其特征在于
所述的电传导结构(2)形成一电容结构及/或一电感结构。
12.如权利要求11所述的电子组件,其特征在于
所述的电传导结构(2)的至少一部份区域形成一电容结构而且具有至少二金属化平面,排列成相互平行且彼此相互绝缘的长条(M11、M12、M13)形成于第一金属化平面上,该长条一致地排列成相对于第二金属化平面上相互平行排列且彼此相互绝缘的长条(M21、M22、M23),而且在这两个金属化平面上,铅直方向上排列成一个叠一个的这些长条(M11、M21;M12、M22;M13、M23)藉由连接结构(V)而电连接。
13.如权利要求11或12所述的电子组件,其特征在于
所述的电传导结构(2)的至少一部份区域形成一电感结构,且具有至少一金属化平面,且在该平面上形成一螺旋金属轨道。
14.如权利要求8所述的电子组件,其特征在于
所述的上金属层(5)藉由在所述的第三绝缘层(4a)中的一接触区域(6)电连接到一电传导区域(7),所述的电传导区域排列于,特别是所述的第二或第三绝缘层。
15.如权利要求14所述的电子组件,其特征在于
所述的接触区域(6)与所述的第二电传导区域(7)排列成相对于所述的电传导结构(2)以及所述的上金属层(5)的接合区域(BB)具有一水平偏移。
16.如前面任一项权利要求所述的电子组件,其特征在于
所述的电传导结构(2)形成具有所述第一绝缘层(1)的水平表面的一平面形式,而所述的第一传导结构(2)的表面区域形成该第一绝缘层(1)的水平表面的部分区域。
17.一种具有一基板与根据权利要求1到16任一项的电子组件的电子组件(EB),所述的电子组件形成于所述的基板上。
18.一种用以制造电子组件的方法,其中
产生一第一绝缘层(1);
于所述的第一绝缘层(1)上,产生一上金属层(5),特别是一电传导接合衬垫层;以及
于所述的第一绝缘层中,形成一电传导结构(2)以作为一被动组件以及作为与所述的上绝缘层(5)具有电绝缘形式的一机械稳定结构。
19.如权利要求18所述的方法,其特征在于
所述第一绝缘层(1)从具有介电常数小于4,特别是小于3的材料所形成。
20.如权利要求18或19所述的方法,其特征在于
所述的电传导结构(2)基本上形成于所述的上金属层(5)的一接合区域下方,而且所述的电传导结构(2)于平行所述的金属层(5)的一平面上的尺寸被制造成在数量级上至少与所述的接合区域(BB)相等。
21.如权利要求18到20任一项所述的方法,其特征在于
所述的电传导结构(2)藉由连接结构(V)以及接触长条(KM),特别是接触金属长条而分别电接触连接到供应电压电位以及接地端的电位。
22.如权利要求18到21任一项的方法,其特征在于
介于所述的上金属层(5)以及所述的电传导结构(2)之间,以一电绝缘于所述的上金属层(5)与所述的电传导结构(2)的形式形成一电传导遮蔽层(3),特别是于产生于所述的第一绝缘层(1)上方的一第三绝缘层。
23.如权利要求22所述的方法,其特征在于
所述的电传导遮蔽层(3)形成一平板或者一网格结构,并且连接到接地端的电位。
24.如权利要求22或23所述的方法,其特征在于
所述的电传导遮蔽层(3)系形成使其水平的面积范围在数量级上至少与所述的电传导结构(2)的面积范围相等,而且所述的电传导结构(2)的水平面积范围完全被所述的电传导遮蔽层(3)的面积范围所覆盖。
25.如权利要求18到24任一项所述的方法,其特征在于
所述的电传导结构(2)形成一电容结构及/或一电感结构。
26.如权利要求25所述的方法,其特征在于
所述的电传导结构(2)的至少一部份区域形成一电容结构,在每一情况下形成彼此相互平行而且彼此之间相互绝缘的电传导长条(M11、M12、M13;M21、M22、M23)产生于一第一与一第二金属化平面上,于所述的第一与第二金属化平面上的长条(M11、M12、M13;M21、M22、M23)基本上排列成一致并且藉由连接结构(V)而电连接,而在水平方向相邻的长条(M11、M12、M13;M21、M22、M23)分别交互地连接到一第一与一第二电位。
27.如权利要求25或26所述的方法,其特征在于
所述的电传导结构(2)的至少一部份形成一电感结构,一螺旋金属轨道产生于至少一金属化平面上。
28.一种用以制造集成电路的方法,其中提供一基板,而根据权利要求18到27任一项的电子组件(EB)形成于所述的基板上。
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DE10249192A DE10249192A1 (de) | 2002-10-22 | 2002-10-22 | Elektronisches Bauelement mit integriertem passiven elektronischen Bauelement und Verfahren zu dessen Herstellung |
DE10249192.5 | 2002-10-22 |
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CN1689156A true CN1689156A (zh) | 2005-10-26 |
CN100459112C CN100459112C (zh) | 2009-02-04 |
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CNB038245426A Expired - Fee Related CN100459112C (zh) | 2002-10-22 | 2003-09-09 | 具有集成无源电子组件的电子组件 |
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US (1) | US7193263B2 (zh) |
EP (1) | EP1556899B1 (zh) |
JP (1) | JP4391419B2 (zh) |
KR (1) | KR100815655B1 (zh) |
CN (1) | CN100459112C (zh) |
DE (1) | DE10249192A1 (zh) |
TW (1) | TWI241635B (zh) |
WO (1) | WO2004040646A1 (zh) |
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JP2007059867A (ja) * | 2005-07-26 | 2007-03-08 | Matsushita Electric Ind Co Ltd | 半導体装置 |
JP4761880B2 (ja) * | 2005-08-09 | 2011-08-31 | パナソニック株式会社 | 半導体装置 |
DE102005045056B4 (de) | 2005-09-21 | 2007-06-21 | Infineon Technologies Ag | Integrierte Schaltungsanordnung mit mehreren Leitstrukturlagen und Kondensator |
DE102005045059B4 (de) * | 2005-09-21 | 2011-05-19 | Infineon Technologies Ag | Integrierte Schaltungsanordnung mit mehreren Leitstrukturlagen und Spule sowie Verfahren zur Herstellung |
JP5090688B2 (ja) * | 2006-08-17 | 2012-12-05 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
KR100829789B1 (ko) * | 2006-11-29 | 2008-05-16 | 삼성전자주식회사 | 반도체 장치 및 이의 제조 방법 |
JP5442950B2 (ja) | 2008-01-29 | 2014-03-19 | ルネサスエレクトロニクス株式会社 | 半導体装置、その製造方法、当該半導体装置を用いた信号送受信方法、およびテスタ装置 |
US7956438B2 (en) * | 2008-11-21 | 2011-06-07 | Xilinx, Inc. | Integrated capacitor with interlinked lateral fins |
US7994610B1 (en) | 2008-11-21 | 2011-08-09 | Xilinx, Inc. | Integrated capacitor with tartan cross section |
US8362589B2 (en) * | 2008-11-21 | 2013-01-29 | Xilinx, Inc. | Integrated capacitor with cabled plates |
US7994609B2 (en) * | 2008-11-21 | 2011-08-09 | Xilinx, Inc. | Shielding for integrated capacitors |
US8207592B2 (en) * | 2008-11-21 | 2012-06-26 | Xilinx, Inc. | Integrated capacitor with array of crosses |
US7944732B2 (en) * | 2008-11-21 | 2011-05-17 | Xilinx, Inc. | Integrated capacitor with alternating layered segments |
JP5643580B2 (ja) | 2009-11-27 | 2014-12-17 | 株式会社東芝 | 血流動態解析装置、血流動態解析プログラム、流体解析装置及び流体解析プログラム |
JP5551480B2 (ja) * | 2010-03-24 | 2014-07-16 | ルネサスエレクトロニクス株式会社 | 半導体装置および半導体装置の製造方法 |
US8653844B2 (en) | 2011-03-07 | 2014-02-18 | Xilinx, Inc. | Calibrating device performance within an integrated circuit |
US8941974B2 (en) | 2011-09-09 | 2015-01-27 | Xilinx, Inc. | Interdigitated capacitor having digits of varying width |
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CN113066799B (zh) * | 2021-03-16 | 2022-08-19 | 泉芯集成电路制造(济南)有限公司 | 半导体器件及其制作方法 |
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-
2002
- 2002-10-22 DE DE10249192A patent/DE10249192A1/de not_active Withdrawn
-
2003
- 2003-09-09 EP EP03753282.7A patent/EP1556899B1/de not_active Expired - Fee Related
- 2003-09-09 JP JP2004547382A patent/JP4391419B2/ja not_active Expired - Fee Related
- 2003-09-09 WO PCT/DE2003/002987 patent/WO2004040646A1/de active Application Filing
- 2003-09-09 KR KR1020057006831A patent/KR100815655B1/ko not_active IP Right Cessation
- 2003-09-09 CN CNB038245426A patent/CN100459112C/zh not_active Expired - Fee Related
- 2003-09-22 TW TW092126121A patent/TWI241635B/zh not_active IP Right Cessation
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KR20050071600A (ko) | 2005-07-07 |
JP2006504274A (ja) | 2006-02-02 |
US7193263B2 (en) | 2007-03-20 |
EP1556899A1 (de) | 2005-07-27 |
CN100459112C (zh) | 2009-02-04 |
DE10249192A1 (de) | 2004-05-13 |
JP4391419B2 (ja) | 2009-12-24 |
TW200421449A (en) | 2004-10-16 |
EP1556899B1 (de) | 2015-08-12 |
TWI241635B (en) | 2005-10-11 |
US20050199934A1 (en) | 2005-09-15 |
WO2004040646A1 (de) | 2004-05-13 |
KR100815655B1 (ko) | 2008-03-20 |
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