CN1468322A - 等离子加工用的静电夹紧边环 - Google Patents

等离子加工用的静电夹紧边环 Download PDF

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CN1468322A
CN1468322A CNA018167756A CN01816775A CN1468322A CN 1468322 A CN1468322 A CN 1468322A CN A018167756 A CNA018167756 A CN A018167756A CN 01816775 A CN01816775 A CN 01816775A CN 1468322 A CN1468322 A CN 1468322A
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杰罗姆·S·胡巴塞克
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Abstract

一种联接环组合件包括被静电边环夹盘支承的边环，和一种在等离子加工室内改进边环温度控制的方法。边环可用导电材料如硅和碳化硅制成，而边环的温度控制可将热转移气体如氦供应到边环和边环夹盘之间的两个相对的表面上来增强。

Description

等离子加工用的静电夹紧边环
本发明的领域
本发明涉及等离子加工用的一种改进的设备和方法，特别是等离子蚀刻半导体基片用的改进的设备和方法。
本发明的背景
在半导体加工的领域内，一般使用真空加工室来蚀刻和将材料化学汽相沉积(CVD)在基片上，过程是将蚀刻或沉积气体供应到真空室，然后将RF(射频)场施加给气体使气体增能成为等离子状态。有关平行板、变压器联接等离子体(TCPTM)或被称为感应联接等离子体(ICP)、和电子回旋加速器谐振(ECR)反应器及其构件的例子曾在本申请人共同拥有的美国专利号4,340,462；4,948,458；5,200,232和5,820,723中公开过。美国专利号4,793,975也曾公开过一种平行板等离子反应器。
在加工半导体基片时，典型的做法是用机械夹紧器和静电夹紧器(ESC)将基片夹持在真空室内基片夹持器的工位上。这种夹紧***及其构件的例子可在本申请人共同拥有的美国专利号5,262,029和5,838,529中找到。单极夹盘的例子可在美国专利号4,665,463中找到，双极夹盘的例子可在美国专利号4,692,836和5,055,964中找到。为了冷却基片，可将冷却气体如氦供应到基片的背侧。这种冷却气体的例子可在美国专利号5,160,152；5,238,499；5,350,479和5,534,816中找到。
基片支承可包括环绕基片的、能消耗(牺牲)的边环，目的是要将等离子体限制在晶片之上的区域内及/或保护ESC使它免受等离子体的腐蚀。例如在本申请人共同拥有的美国专利号5,805,408；5,998,932和6,013,984中所说明的边环配置。其他边环配置可在美国专利号5,494,523；5,986,874；6,022,809；6,096,161；和6,117,349中找到。
在将牺牲环环绕晶片布置的等离子加工配置中，最好能改进环和在其下的基片支承部分之间的热接触。由于热联接的改进，便可改进对环的温度控制，并可减小环和晶片之间所需的间隙。而且最好能使从基板到晶片之上区域内等离子的RF阻抗路径较密切地与从基板到边环区域内等离子的RF阻抗路径匹配，为的是提高晶片边缘附近等离子的均匀度。
本发明的综述
本发明提供的联接环的组合件适宜用在等离子反应室内环绕基片支承布置。联接环组合件包括一个具有环形支承表面的零件和一个在支承表面上的静电夹盘。
本发明还提供一个等离子反应室，该室包括一个晶片支承，要被加工的晶片可支承在其上，和一个静电边环夹盘，在加工时边环可支承在其上。在等离子反应室的一个较优的实施例中，基片支承包括一个基板，在其上表面上设有一个静电晶片夹盘。在等离子反应室的另一个较优的实施例中，边环夹盘为联接环组合件的一个部件。
本发明还提供一种在等离子室内处理半导体基片如晶片的方法，其中等离子室包括一个基片支承、一个设在基片支承上表面上的静电晶片夹盘、和一个可将边环支承在其上的静电边环夹盘。在一个较优的实施例中，该方法包括下列工步：用静电将晶片夹紧在晶片夹盘上，用静电将边环夹紧在边环夹头上，将加工气体供应到等离子室内，将加工气体增能使成为等离子态，然后用等离子加工晶片。
附图的简要说明
图1为按照本发明的平行板等离子加工设备的部分视图；
图2为按照本发明的一个实施例的等离子室的部分视图，该室包括一个装在联接环上的边环夹盘；
图3为按照本发明另一个实施例的等离子室的部分视图，该室包括一个装在基板上的边环夹盘；
图4为按照本发明的等离子室的部分视图，该室包括一个装在基板上的整体的边环/晶片夹盘；及
图5为按照本发明另一个实施例的等离子室的部分视图，该室包括一个适宜配装在基板上晶片和边环夹盘之间槽内的边环。
较优实施例的详细说明
本发明提供一种等离子反应器用的、改进的基片支承配置，其中牺牲边环环绕半导体基片如硅晶片布置。在该配置中，边环只是支承在其下的基片支承上，并且只是用重力及/或与基片支承的摩擦接合保持在位，在用等离子加工基片时边环能变得非常热。在基片与边环一部分叠置的情况下，在用等离子加工时边环的热膨胀会将基片从基片支承上举起，因此在边环和基片之间必需留有足够的间隙。在使用静电夹盘来将基片固定到基片支承上的情况下，在该支承内设有一个通电的电极，该电极将RF偏频供应到基片上，从通电的电极通过ESC和基片到等离子体的RF阻抗路径可能不同于从通电电极的外部通过边环到等离子体的RF阻抗路径，这样就在基片的边缘上造成一个不均匀的等离子密度。本发明克服这些问题的方法是，设置一个静电边环夹盘来改善边环对基片支承的热联接。另外，按照本发明还选用边环夹盘和边环的材料，这样由于RF阻抗路径匹配的改善，越过基片的等离子密度便能较为均匀。
图1示出按照本发明一个实施例的平行板等离子反应室10。该设备包括一个上电极11和一个下电极组合件12。下电极组合件包括一个基板13和一个装在其上表面上的静电晶片夹盘14。有一联接环15停留在基板的突缘16上。联接环15有一边环夹盘17装在其上表面上。有一边环18支承在边环夹盘17的、外露的上表面上。晶片19装在晶片夹盘14上以致覆盖晶片夹盘和边环18的内表面。晶片19覆盖晶片夹盘14的边缘使晶体夹盘14的边缘得以减少暴露在等离子体内的离子下，因为暴露在等离子下能够造成腐蚀，从而减少夹盘14的寿命。环绕晶片夹盘14的边环18就是为了进一步保护晶片夹盘14使它不受离子损害而设。边环18是一个能消耗而可更换的部件。晶片19伸出到晶片夹盘14之外，边环18的一部分在晶片19边缘之下延伸。晶片19一般伸出到晶片夹盘14边缘之外1到2mm。为了对晶片夹盘14提供较大程度的保护，边环18顶面的定位应尽可能地接近晶片19的下侧。由于边环在加工时会受热膨胀，在晶片下侧和边环之间需要有一间隙。如果边环被放置得与晶片背侧过分接近，那么边环在加工时的热膨胀实际上能迫使晶片离开夹盘，使加工过程失败。
图2为图1中的下电极组合件12的放大视图。晶片19搭接在边环18上，在晶片背侧和边环18之间形成一个间隙23。边环18的内边与晶片夹盘14对接，这样来将边环18保持在对晶片19合适的位置上。如图所示，边环18停留在联接环组合件上，该组合件包括一个联接环15和一个固定在其上表面上的静电边环夹盘17。边环夹盘17能延伸到完全越过联接环15或者边环夹盘17可被坐落在联接环15上表面的凹腔内。联接环15可被支承在基板13上，使用或不用机械的或胶粘的固紧手段如使用多个螺栓24。边环夹盘17可被合适的供电配置26使用一条延伸通过其中一个螺栓24内通道的导线28供以DC(直流)电。为了改进边环15和基板13之间的热转移，可将热转移气体如He或加工气体从气体源30通过气体通道32供应到联接环15和基板13之间及/或边环夹盘17和边环18之间的界面上。气体通道32能在环绕基板13而间隔开的一个或多个位置上延伸通过基板13和联接环15，例如延伸通过螺检28内的通道。边环夹盘17可以是单极或双极的夹盘。
图3-5示出本发明另一实施例的多个变型，其中边环夹盘装在基板上而不是装在联接环上。如图3所示，边环夹盘被支承在基板32上，而在晶片夹盘36上支承着晶片38。为了促进热转移，气体供应源30可将热转移气体通过气体通道32供应到边环夹盘34和边环30之间的界面上。
图4示出本发明的等离子室的另一实施例，该室具有一个整体的(单件的)晶片夹盘和边环夹盘。如图所示，在该整体的晶片/边环夹盘40上表面的周边部上制有凹槽允许将晶片42装在夹盘的中心部上并搭置在边环44上，而该边环装在夹盘的周边部上。边环夹盘的电极被示出系用DC电源46供电。夹盘边环部的内部电极(单极的或双极的)最好在电路上与夹盘晶片部的内部电极绝缘。
图5示出本发明的等离子室的另一实施例，其中边环夹盘50和晶片夹盘都直接装在基板54上使两个夹盘50、52的上表面近似在同一平面上。在基板54上有一凹槽将这两个夹盘50、52隔开。边环58有一沿轴向延伸的部分60，其形状正好与基板56内的凹槽接合，还有一沿径向延伸的部分62，其下表面搁置在边环夹盘50上。边环沿轴向延伸的部分60的大小须能容许边环在加工时的膨胀。边环沿轴向和径向延伸的部分60、62被一过渡部64连接起来，其形状允许晶片66搭置在边环58的内表面上。与其他实施例相同，在边环58的下侧供有热转移气体68。在边环的轴向延伸部60和基板56内的凹槽之间的界面上也可供有热转移气体以资进一步改善基板和边环之间的热联接。
较好地控制边环的温度能造成许多加工上的优点。首先，控制边环的温度可减少边环热膨胀的数量，这样在边环顶面和晶片下侧之间就可采用较小的间隙。例如当边环只是搁置在其下的联接环或基片支承上时，在晶片背侧和边环之间的间隙通常在0.005到0.006英寸的范围内。但对于用静电夹紧的边环，这个间隙可以减小到0.002到0.003英寸。由于边环和晶片之间间隙的减小，晶片夹盘边缘对等离子的侵蚀可以得到较大程度的保护。另外，在等离子加工时产生的微粒积聚在夹盘边缘上的趋势亦可减少，而微粒的积聚能阻止晶片与晶片夹盘均匀地接触，会造成夹紧能力的减弱。由于边环材料与等离子内离子的化学反应速率会随着温度的下降而降低，因此降低边环的温度还能提高边环的寿命。
使用静电夹盘来夹紧边环还能导致晶片蚀刻特性的改进。蚀刻均匀性的改进既可来自晶片和边环温度的匹配，还可来自RF阻抗路径通过晶片和边环的匹配。首先，如果晶片和边环在加工时温度近似，在晶片边缘附近的蚀刻特性就可较为均匀。其次，由于使用的边环夹盘是用与晶片夹盘相同的材料制成，因此从RF供能的基板通过热边环的阻抗路径可被制造得与从RF供能的基板通过晶片的阻抗路径较为近似，特别是当晶片和边环用同一材料(如硅)制成时尤其是这样。在晶片和边环表面邻近的等离子区内的电流密度受这两表面对RF阻抗的影响。由于使边环和晶片对RF阻抗的匹配，可使从等离子区流到晶片表面的电流在晶片边缘附近较为均匀，这样就可提高反应器的等离子均匀性和蚀刻功效。
当与固定边环的其他方法如胶粘剂粘结或机械固紧比较时可以看到用静电夹紧边环还能降低操作等离子加工设备的费用。例如，由于不需要将边环粘结到另一个零件上，能消耗的边环的费用可被降低。而且，采用静电夹紧，边环就没有外露的螺钉头需要在设备操作之前的另一个分开的工步中加以覆盖。
边环可由任何一种导电的材料制成，包括但并不限于硅、氮化硅、碳化硅和氮化铝。边环材料最好与晶片材料相同为的是提高RF联接的均匀性。
边环夹盘可由任何一种合适的材料制成，如同那些在传统的静电晶片夹盘中使用的材料，包括阳极化的铝、聚酰亚胺和陶瓷材料。边环夹盘最好由陶瓷材料如氧化铝或氮化铝制成。边环夹盘的电极可由任何一种合适的导电材料制成。采用烧结的陶瓷夹盘时，电极最好由能够承受在烧结时遇到的高温的耐热金属如钨或钼制成。边环夹盘可用烧结法制成，该法系将耐热金属电极(钨墨)嵌夹在两个陶瓷生片之间然后加热形成烧结结构。边环夹盘可以是coulombic型(完全绝缘)或Johnsen-Rahbeck型(半导电)。
边环夹盘可用本行业已知用来固定晶片夹盘的任何一种方法和材料来固定到联接环或基片支承上。例如边环夹盘可用高温聚合物粘结剂如聚硅氧粘结剂固定。
虽然本发明已结合实施例在上面说明，但本行业的行家当会知道，在不背离所附权利要求所限定的本发明的创意和范围的条件下是可以不具体说明地对本发明作出增添、删除、修改和替代的。

Claims (25)

1.一种适宜用来围绕等离子反应室内基片支承的联接环组合件，包括：
一个具有环形支承表面的零件；和
一个在支承表面上的静电夹盘。
2.根据权利要求1的联接环组合件，其特征在于，静电夹盘包括一个陶瓷体和一个或多个埋入的电极。
3.根据权利要求1的联接环组合件，其特征在于，静电夹盘用胶粘剂被粘结到支承表面上。
4.根据权利要求1的联接环组合件，特征在于，还包括至少一条延伸通过零件和静电夹盘的气体通道，该通道适宜用来将热转移气体供应到静电夹盘的外露表面上。
5.根据权利要求1的联接环组合件，其征在于，还包括一个边环，该边环适宜被静电夹盘夹紧到零件上。
6.一种等离子反应室，包括：
一个能装上要加工晶片的基片支承；和
一个在加工时能支承边环的静电边环夹盘。
7.根据权利要求6的等离子室，其特征在于，基片支承包括一个基板，在其上表面上有一静电晶片夹盘。
8.根据权利要求6的等离子室，其特征在于，边环夹盘为联接环组合件的一个部件，该组合件包括一个环状基体和一个在其上表面上的静电边环夹盘，并且其中环状基体的下表面与基片支承的上表面接触。
9.根据权利要求7的等离子室，其特征在于，晶片夹盘的上表面高于边环夹盘的上表面。
10.根据权利要求7的等离子室，其特征在于，基板内在晶片夹盘和边环夹盘之间还包括一个凹槽。
11.根据权利要求6的等离子室，其特征在于，还包括一个支承在边环夹盘上的边环，边环的下表面与边环夹盘接触。
12.根据权利要求11的等离子室，其特征在于，边环含有导电材料。
13.根据权利要求12的等离子室，其特征在于，边环含有硅。
14.根据权利要求11的等离子室，其特征在于，边环包括一个在其上表面的内侧边上的凹腔，并且其中该凹腔适宜配合在一装在晶片夹盘上的晶片之下。
15.根据权利要求7的等离子室，其特征在于，基板含有导电材料。
16.根据权利要求15的等离子室，其特征在于，基板为被RF驱动的电极。
17.根据权利要求7的等离子室，其特征在于，还包括一个支承在边环夹盘上的边环，边环的下表面与边环夹盘接触。
18.根据权利要求17的等离子室，其特征在于，该室包括一个上电极面向基板的平行板反应器。
19.根据权利要求18的等离子室，其特征在于，还包括一个装在晶片夹盘上的晶片，使晶片的外边伸出边环之外，而在晶片的下表面和边环的上表面之间具有间隙。
20.根据权利要求19的等离子室，其特征在于，晶片伸出到边环内边之外。
21.根据权利要求19的等离子室，其特征在于，间隙的最大间隔约为0.002到0.003英寸。
22.根据权利要求8的等离子室，其特征在于，联接环组合件用螺栓或螺钉被固紧到基片支承上。
23.根据权利要求6的等离子室，其特征在于，等离子室为一半导体蚀刻设备。
24.一种在权利要求7的等离子室内处理半导体基片的方法，该方法包括下列步骤：
用静电将晶片夹紧在晶片夹盘上；
用静电将边环夹紧在边环夹盘上；
将加工气体供应到等离子室的内部；
将加工气体增能到等离子状态；和
用等离子加工晶片。
25.根据权利要求24的方法，其特征在于，还包括在边环和环状基体两个相对表面之间供应热转移气体来控制边环的温度。
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