US6896765B2 - Method and apparatus for the compensation of edge ring wear in a plasma processing chamber - Google Patents

Method and apparatus for the compensation of edge ring wear in a plasma processing chamber Download PDF

Info

Publication number
US6896765B2
US6896765B2 US10/247,812 US24781202A US6896765B2 US 6896765 B2 US6896765 B2 US 6896765B2 US 24781202 A US24781202 A US 24781202A US 6896765 B2 US6896765 B2 US 6896765B2
Authority
US
United States
Prior art keywords
edge ring
capacitance
plasma
plasma processing
ring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime, expires
Application number
US10/247,812
Other versions
US20040053428A1 (en
Inventor
Robert J. Steger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lam Research Corp
Original Assignee
Lam Research Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lam Research Corp filed Critical Lam Research Corp
Assigned to LAM RESEARCH CORPORATION reassignment LAM RESEARCH CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: STEGER, ROBERT J.
Priority to US10/247,812 priority Critical patent/US6896765B2/en
Priority to CNB038223147A priority patent/CN100481307C/en
Priority to PCT/US2003/029309 priority patent/WO2004027816A2/en
Priority to AU2003276895A priority patent/AU2003276895A1/en
Priority to JP2004537951A priority patent/JP4841840B2/en
Priority to DE60331557T priority patent/DE60331557D1/en
Priority to AT03797912T priority patent/ATE459975T1/en
Priority to KR1020057004768A priority patent/KR101075048B1/en
Priority to EP03797912A priority patent/EP1540695B1/en
Priority to TW092125775A priority patent/TWI324809B/en
Publication of US20040053428A1 publication Critical patent/US20040053428A1/en
Priority to US10/971,971 priority patent/US7176403B2/en
Priority to IL167491A priority patent/IL167491A/en
Publication of US6896765B2 publication Critical patent/US6896765B2/en
Application granted granted Critical
Adjusted expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32623Mechanical discharge control means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • H01J37/32091Radio frequency generated discharge the radio frequency energy being capacitively coupled to the plasma
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32623Mechanical discharge control means
    • H01J37/32642Focus rings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05HPLASMA TECHNIQUE; PRODUCTION OF ACCELERATED ELECTRICALLY-CHARGED PARTICLES OR OF NEUTRONS; PRODUCTION OR ACCELERATION OF NEUTRAL MOLECULAR OR ATOMIC BEAMS
    • H05H1/00Generating plasma; Handling plasma
    • H05H1/24Generating plasma
    • H05H1/46Generating plasma using applied electromagnetic fields, e.g. high frequency or microwave energy

Definitions

  • the present invention relates in general to substrate manufacturing technologies and in particular to methods and apparatus for improving process results by compensating for edge ring wear in a plasma processing chamber.
  • plasma is often employed.
  • the wafer is divided into a plurality of dies, or rectangular areas, each of which will become an integrated circuit.
  • the wafer is processed in a series of steps in which materials are selectively removed (etching) and deposited (deposition) in order to form electrical components thereon.
  • the wafer is coated with a thin film of hardened emulsion (i.e., such as a photoresist mask) prior to etching. Areas of the hardened emulsion are then selectively removed, causing parts of the underlying layer to become exposed.
  • the wafer is then placed in a plasma processing chamber on a negatively charged electrode, called a chuck. Appropriate etchant source gases are then flowed into the chamber and struck to form a plasma to etch exposed areas of the underlying layer(s).
  • plasma is also employed to facilitate and/or improve deposition from the source deposition materials.
  • FIG. 1 illustrates a simplified cross section view of a plasma processing chamber 100 .
  • a wafer 104 sits on a chuck 112 which supports the wafer in the plasma processing chamber.
  • Chuck 112 acts as a work piece holder and may be electrically energized by an RF power source to facilitate etching and deposition, as is well known.
  • a coupling ring 108 is shown disposed between chuck 112 and a ceramic ring 110 .
  • One of the functions of coupling ring 108 includes providing a current path from chuck 112 to an edge ring 102 .
  • Edge ring 102 performs many functions, including positioning wafer 104 on chuck 112 and shielding the underlying components not protected by the wafer itself from being damaged by the ions of the plasma.
  • edge ring 112 One important function of edge ring 112 relates to its effect on process uniformity across the substrate. It is well known that the equipotential lines of the plasma sheath 106 curve upward sharply past the edge of the chuck. Without an edge ring, the substrate edge electrically defines the outer edge of the chuck, and the equipotential lines would curve upward sharply in the vicinity of the substrate edge. As such, areas of the substrate around the substrate edge would experience a different plasma environment from the plasma environment that exists at the center of substrate, thereby contributing to poor process uniformity across the substrate surface.
  • the edge of the chuck appears electrically to the plasma to extend some distance outside of the edge of the substrate.
  • the equipotential lines of the plasma sheath stays more constant over the entire surface of the substrate, thereby contributing to process uniformity across the substrate surface.
  • edge rings tend to be worn away over time by the plasma environment. As the edge ring wears away, the plasma environment in the vicinity of the damaged regions of the edge ring changes. The change to the plasma in turn causes the process result to change over time, and contributes to process degradation as the edge ring wears away. This is the case even if the process employs the same recipe in the same chamber time after time.
  • the invention relates, in one embodiment, to a method for processing a plurality of substrates in a plasma processing chamber of a plasma processing system, each of the substrate being disposed on a chuck and surrounded by an edge ring during the processing.
  • the method includes processing a first substrate of the plurality of substrates in accordance to a given process recipe in the plasma processing chamber.
  • the method further includes adjusting, thereafter, a capacitance value of a capacitance along a capacitive path between a plasma sheath in the plasma processing chamber and the chuck through the edge ring by a given value.
  • the method additionally includes processing a second substrate of the plurality of substrates in accordance to the given process recipe in the plasma processing chamber after the adjusting, wherein the adjusting is performed without requiring a change in the edge ring.
  • the invention in another embodiment, relates to a plasma processing system having at least one plasma processing chamber for processing a plurality of substrates.
  • the plasma processing chamber includes a chuck configured for supporting a substrate during the processing and an edge ring having an outer periphery.
  • the outer periphery of the edge ring surrounds the chuck, wherein the edge ring is disposed along a capacitive path between a plasma sheath and the chuck during the processing, the plasma sheath being associated with a plasma generated during the processing.
  • the plasma processing chamber additionally includes an arrangement for adjusting in-situ a capacitance value of a capacitance disposed along the capacitive path.
  • the invention in yet another embodiment, relates to a plasma processing system having at least one plasma processing chamber for processing a plurality of substrates.
  • the plasma processing chamber includes supporting means for supporting a substrate during the processing.
  • an edge ring having an outer periphery, the outer periphery of the edge ring surrounding the supporting means, wherein the edge ring is disposed along a capacitive path between a plasma sheath and the supporting means during the processing, the plasma sheath being associated with a plasma generated during the processing.
  • means for adjusting in-situ a capacitance value of a capacitance disposed along the capacitive path there is included.
  • FIG. 1 depicts a simplified cross section view of a plasma processing chamber
  • FIG. 2A depicts a simplified cross section view of a plasma processing chamber according to an embodiment of the invention
  • FIG. 2B depicts a simplified electrical diagram for a capacitive path according to an embodiment of the invention
  • FIG. 3A depicts a simplified cross section view of a plasma processing chamber according to an embodiment of the invention
  • FIG. 3B depicts a simplified electrical diagram for a capacitive path according to an embodiment of the invention.
  • FIG. 4A depicts a simplified cross section view of a plasma processing chamber according to an embodiment of the invention.
  • FIG. 4B depicts a simplified electrical diagram for a capacitive path according to an embodiment of the invention.
  • FIG. 2A illustrates another plasma processing chamber diagram is which the capacitive path 150 from plasma sheath 106 to chuck 112 through edge ring 102 is depicted.
  • plasma sheath 106 , wafer 104 , chuck 112 , coupling ring 108 , edge ring 102 , and ceramic ring 110 are as shown in FIG. 1 .
  • an equivalent capacitance C 0 is shown which is defined by the surface of chuck 112 , the surface of coupling ring 108 , and the space in between.
  • capacitance 2 is defined by the surfaces of coupling ring 108 and the lower face of edge ring 102 and the space in between.
  • the dielectric material in edge ring 102 forms another capacitance C 1 .
  • the gap between plasma sheath 106 and the upper surface of edge ring 102 forms another capacitance Cs along capacitive path 150 .
  • FIG. 2B a simplified electrical diagram for capacitive path 150 is shown.
  • Chuck 112 is electrically coupled in series with capacitance C 0 , which is shown disposed between chuck 112 and coupling ring 108 .
  • Capacitance C 2 is coupled in series along the capacitive path 150 between coupling ring 108 and the lower face of edge ring 102 .
  • Capacitance 1 which is formed by the dielectric material of edge ring 102 is shown coupled in series with capacitance C 2 .
  • Capacitance Cs completes the capacitive path 150 by coupling in series with capacitance C 2 between capacitance C 2 and plasma sheath 106 .
  • the capacitance C 1 attributable to the dielectric material of the edge ring changes.
  • the change in capacitance C 1 in turn affects the plasma environment in the vicinity of the damaged regions of the edge ring. As the plasma environment changes, process result degrades.
  • FIG. 3A illustrates a simplified cross section view of the plasma processing chamber of FIG. 2A , including an exemplary damaged region 304 in edge ring 102 .
  • damaged region 304 which may take the form of a trench, cavity, or pit in edge ring 102 alters the aforementioned capacitance C 1 in the vicinity of the damaged region.
  • the changed capacitive path is shown in FIG. 3 B.
  • the edge ring would either not erode or erode at a slow rate which would allow the etcher to remain in service until some later service interval was reached.
  • Some semiconductor manufacturing processes cannot tolerate the etching characteristics changing more than a very small amount, and as such the edge ring lifetime is shortened more so than by the mere loss of material. It is the purpose of this invention to effectively extend the service life of the edge ring by compensating for the erosion so as to minimize the substrate edge etch rate change and feature tilt effects with time.
  • the change in the capacitance along capacitive path 150 attributable to edge ring damage is compensated for by reducing the capacitance of one or more of capacitances C 0 , C 2 or CS.
  • the increase in capacitance C 1 due to edge ring thinning damage is offset by decreasing the capacitance C 2 associated with the gap between the lower surface of the edge ring and the coupling ring.
  • decreasing the capacitance C 2 is accomplished by providing a mechanism that can move the edge ring and the coupling ring further apart to decrease the capacitance C 2 in between to compensate for the increased capacitance C 1 caused by edge ring thinning damage.
  • FIG. 4A illustrates, in accordance with one embodiment of the present invention, a simplified cross section view of a plasma processing chamber with a variable position coupling ring 408 .
  • variable position coupling ring 408 is configured to travel along a path 404 . Since the capacitance value of capacitance C 2 is dependent upon the distance between lower surface of edge ring 102 and variable position coupling ring 408 , changing the position of variable position edge ring 408 will change the capacitance value of capacitance C 2 .
  • the increase in the capacitance C 1 associated with damaged edge ring 102 can now be offset by changing the capacitance C 2 through the repositioning of variable position coupling ring 408 along path 404 .
  • the net result is that the total capacitance along capacitance path 150 stays substantially the same, or is changed to a lesser extent. Since the capacitance between the plasma sheath and the chuck remains substantially unchanged or is changed to a lesser extent with the use of a variable position coupling ring, the impedance between the plasma sheath and the chuck stays substantially unchanged or is changed to a lesser extent as the edge ring wears away. This in turn helps keep the plasma environment in the vicinity of the damaged regions of the edge ring substantially unchanged or is changed to a lesser extent as the edge ring wears away.
  • the use of a variable position coupling ring delays the need to change the edge ring. As the edge ring wears away, the coupling ring is repositioned to correct for process degradation. A point will still be reached at which edge ring 102 will need to be replaced because of extensive structural damage or because the increase in the capacitance C 1 due to edge ring damage cannot be adequately compensated beyond some point by further decreasing one of the other capacitances. However, replacement will occur less frequently than in the prior art, thereby reducing both costly manufacturing down time as well as the need for equipment recalibration necessitated by the replacement process.
  • the amount of edge ring thinning or damage may be empirically determined for a particular process in a particular plasma processing chamber by measuring the edge ring thickness over time. For example, the thickness of the edge ring in the affected regions may be measured using a contact probe, in one embodiment. Once the amount of edge ring thinning is determined as a function of time or as a function of the number of substrates processed, the capacitance value C 1 as a function of time or as a function of the number of substrates processed may be determined.
  • This information may be used to determine the required decrease in capacitance, as a function of time or as a function of the number of substrates processed, in one or more of the other capacitances along the capacitive path between the plasma sheath and the chuck in order to offset the increase in the capacitance caused by edge ring thinning damage.
  • this information may in turn be employed to calculate the required gap during production runs between the coupling ring and the edge ring, as a function of time or as a function of the number of substrates processed, to satisfactorily offset the increase in the capacitance caused by edge ring thinning damage.
  • the decrease in the capacitance value of one or more of the other capacitances along the capacitive path between the plasma sheath and the chuck may be computed, either theoretically or via computer-assisted modeling taken into account, among others, the materials of the various components of the plasma processing chamber, the geometry of the chamber and its components, and the process recipe. This information may then be employed to reduce the capacitance of one or more of the other capacitances along the capacitive path between the plasma sheath and the chuck in the production chamber.
  • Reducing the capacitance value of one or more of the other capacitances along the capacitive path between the plasma sheath and the chuck through the edge ring may be accomplished in various ways.
  • one or more linear or screw actuators may be provided to physically move variable position coupling ring 408 relative to the edge ring.
  • the actuator(s) may be anchored against chuck 112 or ceramic ring 110 or even edge ring 102 if desired.
  • the edge ring may alternately or additionally be made movable to compensate for the increase in the capacitance C 1 attributable to edge ring thinning damage. Still further, it is possible to keep the coupling and edge rings stationary and provide movable inserts, which can be positioned as needed in the gaps between the chuck and the coupling ring, or in between the coupling ring and the edge ring, or in between the edge ring and the plasma sheath, to offset the increase in the capacitance C 1 attributable to edge ring thinning damage.
  • the capacitance adjustment be performed in-situ. That is, it is preferable that there be a mechanism provided with the plasma processing chamber to allow the capacitance of one or more of the other capacitances along the capacitive path between the plasma sheath and the chuck to be adjusted without the need to remove the plasma processing chamber from service on the production line for an extended period of time.
  • the actuator coupled to the variable position coupling ring is but one example of this type of in-situ capacitance adjustment mechanism to offset the increase in the capacitance C 1 attributable to edge ring thinning damage.
  • the coupling ring may be made stationary but may have a variable impedance to the chuck through the use of a variable impedance device, such as a variable capacitor.
  • the adjustment may be made by adjusting the value of the variable impedance device as necessary to offset the change in the capacitance of the edge ring.
  • some chamber designs may include fewer or a greater number of components in the capacitive path between the plasma sheath and the chuck through the edge ring. Irrespective of the number of components (such as rings or any other structures) involved, as long as one or more of the other capacitances along the capacitive path between the plasma sheath and the chuck body can be reduced to offset the increase in the capacitance C 1 attributable to edge ring thinning damage, process degradation is reduced and the edge ring can be employed for a longer period of time before requiring a replacement.
  • the amount of deposition over time may be empirically determined to ascertain the change in the capacitance of the edge ring due to the deposition, or the change in the capacitance of the edge ring may be modeled or mathematically computed. This information may then be employed to facilitate compensation by adjusting one or more capacitances along the aforementioned capacitive path.
  • the invention applies to any and all plasma processing systems that experience process degradation due to edge ring thinning damage or the buildup of material on the edge ring, irrespective of how the plasma is generated, including inductively coupled plasma processing systems, capacitively coupled plasma processing systems, and others. It should also be noted that there are many alternative ways of implementing the methods and apparatuses of the present invention. It is therefore intended that the following appended claims be interpreted as including all such alterations, permutations, and equivalents as fall within the true spirit and scope of the present invention.

Abstract

A method for processing a plurality of substrates in a plasma processing chamber of a plasma processing system, each of the substrate being disposed on a chuck and surrounded by an edge ring during the processing. The method includes processing a first substrate of the plurality of substrates in accordance to a given process recipe in the plasma processing chamber. The method further includes adjusting, thereafter, a capacitance value of a capacitance along a capacitive path between a plasma sheath in the plasma processing chamber and the chuck through the edge ring by a given value. The method additionally includes processing a second substrate of the plurality of substrates in accordance to the given process recipe in the plasma processing chamber after the adjusting, wherein the adjusting is performed without requiring a change in the edge ring.

Description

BACKGROUND OF THE INVENTION
The present invention relates in general to substrate manufacturing technologies and in particular to methods and apparatus for improving process results by compensating for edge ring wear in a plasma processing chamber.
In the processing of a substrate, e.g., a semiconductor wafer or a glass panel such as one used in flat panel display manufacturing, plasma is often employed.
As part of the processing of a semiconductor wafer, for example, the wafer is divided into a plurality of dies, or rectangular areas, each of which will become an integrated circuit. The wafer is processed in a series of steps in which materials are selectively removed (etching) and deposited (deposition) in order to form electrical components thereon.
In an exemplary plasma etching process, the wafer is coated with a thin film of hardened emulsion (i.e., such as a photoresist mask) prior to etching. Areas of the hardened emulsion are then selectively removed, causing parts of the underlying layer to become exposed. The wafer is then placed in a plasma processing chamber on a negatively charged electrode, called a chuck. Appropriate etchant source gases are then flowed into the chamber and struck to form a plasma to etch exposed areas of the underlying layer(s). In an exemplary plasma deposition process, plasma is also employed to facilitate and/or improve deposition from the source deposition materials.
In many plasma processing chambers, an edge ring is often employed. To facilitate discussion, FIG. 1 illustrates a simplified cross section view of a plasma processing chamber 100. A wafer 104 sits on a chuck 112 which supports the wafer in the plasma processing chamber. Chuck 112 acts as a work piece holder and may be electrically energized by an RF power source to facilitate etching and deposition, as is well known. A coupling ring 108 is shown disposed between chuck 112 and a ceramic ring 110. One of the functions of coupling ring 108 includes providing a current path from chuck 112 to an edge ring 102. Edge ring 102 performs many functions, including positioning wafer 104 on chuck 112 and shielding the underlying components not protected by the wafer itself from being damaged by the ions of the plasma.
One important function of edge ring 112 relates to its effect on process uniformity across the substrate. It is well known that the equipotential lines of the plasma sheath 106 curve upward sharply past the edge of the chuck. Without an edge ring, the substrate edge electrically defines the outer edge of the chuck, and the equipotential lines would curve upward sharply in the vicinity of the substrate edge. As such, areas of the substrate around the substrate edge would experience a different plasma environment from the plasma environment that exists at the center of substrate, thereby contributing to poor process uniformity across the substrate surface.
By electrically extending the plasma-facing area of the chuck with an edge ring and/or other underlying structures, the edge of the chuck appears electrically to the plasma to extend some distance outside of the edge of the substrate. Thus, the equipotential lines of the plasma sheath stays more constant over the entire surface of the substrate, thereby contributing to process uniformity across the substrate surface.
Unfortunately, edge rings tend to be worn away over time by the plasma environment. As the edge ring wears away, the plasma environment in the vicinity of the damaged regions of the edge ring changes. The change to the plasma in turn causes the process result to change over time, and contributes to process degradation as the edge ring wears away. This is the case even if the process employs the same recipe in the same chamber time after time.
Over time, the process result degrades to the point where an edge ring change is necessary. When an edge ring change is required, substrate processing is brought to a halt, and the plasma processing chamber is taken out of service in order to facilitate an edge ring change. During the edge ring change operation, which may take hours or days, the manufacturer is deprived of the use of the affected plasma processing system, which contributes to a higher cost of ownership for the plasma processing system.
In view of the foregoing, there are desired improved methods and apparatus for improving process results in a plasma processing system that employs edge rings, as well as for reducing the frequency with which an edge ring change is required.
SUMMARY OF THE INVENTION
The invention relates, in one embodiment, to a method for processing a plurality of substrates in a plasma processing chamber of a plasma processing system, each of the substrate being disposed on a chuck and surrounded by an edge ring during the processing. The method includes processing a first substrate of the plurality of substrates in accordance to a given process recipe in the plasma processing chamber. The method further includes adjusting, thereafter, a capacitance value of a capacitance along a capacitive path between a plasma sheath in the plasma processing chamber and the chuck through the edge ring by a given value. The method additionally includes processing a second substrate of the plurality of substrates in accordance to the given process recipe in the plasma processing chamber after the adjusting, wherein the adjusting is performed without requiring a change in the edge ring.
In another embodiment, the invention relates to a plasma processing system having at least one plasma processing chamber for processing a plurality of substrates. The plasma processing chamber includes a chuck configured for supporting a substrate during the processing and an edge ring having an outer periphery. The outer periphery of the edge ring surrounds the chuck, wherein the edge ring is disposed along a capacitive path between a plasma sheath and the chuck during the processing, the plasma sheath being associated with a plasma generated during the processing. The plasma processing chamber additionally includes an arrangement for adjusting in-situ a capacitance value of a capacitance disposed along the capacitive path.
In yet another embodiment, the invention relates to a plasma processing system having at least one plasma processing chamber for processing a plurality of substrates. The plasma processing chamber includes supporting means for supporting a substrate during the processing. There is further included an edge ring having an outer periphery, the outer periphery of the edge ring surrounding the supporting means, wherein the edge ring is disposed along a capacitive path between a plasma sheath and the supporting means during the processing, the plasma sheath being associated with a plasma generated during the processing. Additionally, there is included means for adjusting in-situ a capacitance value of a capacitance disposed along the capacitive path.
These and other features of the present invention will be described in more detail below in the detailed description of the invention and in conjunction with the following figures.
BRIEF DESCRIPTION OF THE DRAWINGS
The present invention is illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar elements and in which:
FIG. 1 depicts a simplified cross section view of a plasma processing chamber;
FIG. 2A depicts a simplified cross section view of a plasma processing chamber according to an embodiment of the invention;
FIG. 2B depicts a simplified electrical diagram for a capacitive path according to an embodiment of the invention;
FIG. 3A depicts a simplified cross section view of a plasma processing chamber according to an embodiment of the invention;
FIG. 3B depicts a simplified electrical diagram for a capacitive path according to an embodiment of the invention;
FIG. 4A depicts a simplified cross section view of a plasma processing chamber according to an embodiment of the invention; and,
FIG. 4B depicts a simplified electrical diagram for a capacitive path according to an embodiment of the invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
The present invention will now be described in detail with reference to a few preferred embodiments thereof as illustrated in the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without some or all of these specific details. In other instances, well known process steps and/or structures have not been described in detail in order to not unnecessarily obscure the present invention. The features and advantages of the present invention may be better understood with reference to the drawings and discussions that follow.
While not wishing to be bound by theory, it is believed by the inventor herein that when the edge ring is worn away, the capacitance along the capacitive path from the plasma sheath to the chuck through the edge ring changes. The change in the capacitance in turn affects the plasma environment in the vicinity of the damaged regions of the edge ring. Unless this change in capacitance is compensated for as the edge ring wears away, process degradation is inevitable. Furthermore, without compensating for the change in capacitance as the edge ring wears away, the process degradation is uncorrected and necessitates more frequent edge ring changes.
To facilitate discussion, FIG. 2A illustrates another plasma processing chamber diagram is which the capacitive path 150 from plasma sheath 106 to chuck 112 through edge ring 102 is depicted. Referring now to FIG. 2A, plasma sheath 106, wafer 104, chuck 112, coupling ring 108, edge ring 102, and ceramic ring 110 are as shown in FIG. 1. Beginning at the conducting surface of chuck 112, there is shown an equivalent capacitance C0, which is defined by the surface of chuck 112, the surface of coupling ring 108, and the space in between. Along the capacitive path 150, there is another equivalent capacitance 2 which is defined by the surfaces of coupling ring 108 and the lower face of edge ring 102 and the space in between. Further along the capacitive path 150, the dielectric material in edge ring 102 forms another capacitance C1. Additionally, the gap between plasma sheath 106 and the upper surface of edge ring 102 forms another capacitance Cs along capacitive path 150.
Referring now to FIG. 2B, a simplified electrical diagram for capacitive path 150 is shown. Chuck 112 is electrically coupled in series with capacitance C0, which is shown disposed between chuck 112 and coupling ring 108. Capacitance C2 is coupled in series along the capacitive path 150 between coupling ring 108 and the lower face of edge ring 102. Capacitance 1 which is formed by the dielectric material of edge ring 102 is shown coupled in series with capacitance C2. Capacitance Cs completes the capacitive path 150 by coupling in series with capacitance C2 between capacitance C2 and plasma sheath 106.
When the edge ring is worn away and/or damaged by the plasma, the capacitance C1 attributable to the dielectric material of the edge ring changes. The change in capacitance C1 in turn affects the plasma environment in the vicinity of the damaged regions of the edge ring. As the plasma environment changes, process result degrades.
FIG. 3A illustrates a simplified cross section view of the plasma processing chamber of FIG. 2A, including an exemplary damaged region 304 in edge ring 102. It is believed that damaged region 304, which may take the form of a trench, cavity, or pit in edge ring 102 alters the aforementioned capacitance C1 in the vicinity of the damaged region. The changed capacitive path is shown in FIG. 3B. In contrast to the situation in FIG. 2B, the value of the capacitance C1′ attributable to the damaged dielectric material in edge ring 102 is larger due to the thinning of the dielectric material (since C=εA/d). This increase in the value of capacitance C1 in turn increases the total capacitance along capacitive path 150, contributing to a reduction in the impedance along path 150 (since Z=1/ωC or Z=d/εAω). As the impedance along the path from the plasma sheath to the chuck decreases, the current along path 150 increases. This increase in the current between the plasma sheath and the chuck through the damaged regions of the edge ring coincides with an increase in the etch rate at the edge of the substrate, relative to other regions of the substrate. In addition, the features etched in the edge areas of the substrate show more tilt towards the substrate perimeter as the edge ring erosion progresses. Ideally, there would be no change in substrate edge etch rate and no tilting of the etched features over time. Also, the edge ring would either not erode or erode at a slow rate which would allow the etcher to remain in service until some later service interval was reached. Some semiconductor manufacturing processes cannot tolerate the etching characteristics changing more than a very small amount, and as such the edge ring lifetime is shortened more so than by the mere loss of material. It is the purpose of this invention to effectively extend the service life of the edge ring by compensating for the erosion so as to minimize the substrate edge etch rate change and feature tilt effects with time.
In accordance with one aspect of the present invention, the change in the capacitance along capacitive path 150 attributable to edge ring damage is compensated for by reducing the capacitance of one or more of capacitances C0, C2 or CS. In a preferred embodiment, the increase in capacitance C1 due to edge ring thinning damage is offset by decreasing the capacitance C2 associated with the gap between the lower surface of the edge ring and the coupling ring. In one embodiment, decreasing the capacitance C2 is accomplished by providing a mechanism that can move the edge ring and the coupling ring further apart to decrease the capacitance C2 in between to compensate for the increased capacitance C1 caused by edge ring thinning damage.
FIG. 4A illustrates, in accordance with one embodiment of the present invention, a simplified cross section view of a plasma processing chamber with a variable position coupling ring 408. Referring now to FIG. 4A, variable position coupling ring 408 is configured to travel along a path 404. Since the capacitance value of capacitance C2 is dependent upon the distance between lower surface of edge ring 102 and variable position coupling ring 408, changing the position of variable position edge ring 408 will change the capacitance value of capacitance C2.
By using a variable position coupling ring, the increase in the capacitance C1 associated with damaged edge ring 102 can now be offset by changing the capacitance C2 through the repositioning of variable position coupling ring 408 along path 404. The net result is that the total capacitance along capacitance path 150 stays substantially the same, or is changed to a lesser extent. Since the capacitance between the plasma sheath and the chuck remains substantially unchanged or is changed to a lesser extent with the use of a variable position coupling ring, the impedance between the plasma sheath and the chuck stays substantially unchanged or is changed to a lesser extent as the edge ring wears away. This in turn helps keep the plasma environment in the vicinity of the damaged regions of the edge ring substantially unchanged or is changed to a lesser extent as the edge ring wears away.
Furthermore, the use of a variable position coupling ring delays the need to change the edge ring. As the edge ring wears away, the coupling ring is repositioned to correct for process degradation. A point will still be reached at which edge ring 102 will need to be replaced because of extensive structural damage or because the increase in the capacitance C1 due to edge ring damage cannot be adequately compensated beyond some point by further decreasing one of the other capacitances. However, replacement will occur less frequently than in the prior art, thereby reducing both costly manufacturing down time as well as the need for equipment recalibration necessitated by the replacement process.
In one embodiment, the amount of edge ring thinning or damage may be empirically determined for a particular process in a particular plasma processing chamber by measuring the edge ring thickness over time. For example, the thickness of the edge ring in the affected regions may be measured using a contact probe, in one embodiment. Once the amount of edge ring thinning is determined as a function of time or as a function of the number of substrates processed, the capacitance value C1 as a function of time or as a function of the number of substrates processed may be determined. This information may be used to determine the required decrease in capacitance, as a function of time or as a function of the number of substrates processed, in one or more of the other capacitances along the capacitive path between the plasma sheath and the chuck in order to offset the increase in the capacitance caused by edge ring thinning damage. In the variable position coupling ring case, this information may in turn be employed to calculate the required gap during production runs between the coupling ring and the edge ring, as a function of time or as a function of the number of substrates processed, to satisfactorily offset the increase in the capacitance caused by edge ring thinning damage.
In another embodiment, the decrease in the capacitance value of one or more of the other capacitances along the capacitive path between the plasma sheath and the chuck may be computed, either theoretically or via computer-assisted modeling taken into account, among others, the materials of the various components of the plasma processing chamber, the geometry of the chamber and its components, and the process recipe. This information may then be employed to reduce the capacitance of one or more of the other capacitances along the capacitive path between the plasma sheath and the chuck in the production chamber.
Reducing the capacitance value of one or more of the other capacitances along the capacitive path between the plasma sheath and the chuck through the edge ring may be accomplished in various ways. In the case of a variable position coupling ring, for example, one or more linear or screw actuators may be provided to physically move variable position coupling ring 408 relative to the edge ring. The actuator(s) may be anchored against chuck 112 or ceramic ring 110 or even edge ring 102 if desired.
Additionally, it is contemplated that the edge ring may alternately or additionally be made movable to compensate for the increase in the capacitance C1 attributable to edge ring thinning damage. Still further, it is possible to keep the coupling and edge rings stationary and provide movable inserts, which can be positioned as needed in the gaps between the chuck and the coupling ring, or in between the coupling ring and the edge ring, or in between the edge ring and the plasma sheath, to offset the increase in the capacitance C1 attributable to edge ring thinning damage.
In any case, it is preferable that the capacitance adjustment be performed in-situ. That is, it is preferable that there be a mechanism provided with the plasma processing chamber to allow the capacitance of one or more of the other capacitances along the capacitive path between the plasma sheath and the chuck to be adjusted without the need to remove the plasma processing chamber from service on the production line for an extended period of time. The actuator coupled to the variable position coupling ring is but one example of this type of in-situ capacitance adjustment mechanism to offset the increase in the capacitance C1 attributable to edge ring thinning damage. As a further example, the coupling ring may be made stationary but may have a variable impedance to the chuck through the use of a variable impedance device, such as a variable capacitor. In this case, the adjustment may be made by adjusting the value of the variable impedance device as necessary to offset the change in the capacitance of the edge ring.
It should also be understood that some chamber designs may include fewer or a greater number of components in the capacitive path between the plasma sheath and the chuck through the edge ring. Irrespective of the number of components (such as rings or any other structures) involved, as long as one or more of the other capacitances along the capacitive path between the plasma sheath and the chuck body can be reduced to offset the increase in the capacitance C1 attributable to edge ring thinning damage, process degradation is reduced and the edge ring can be employed for a longer period of time before requiring a replacement.
While this invention has been described in terms of several preferred embodiments, there are alterations, permutations, and equivalents which fall within the scope of this invention. For example, although the drawings are described in the context of an etching application, it should be understood that the invention also applies to deposition processes. In the case of a deposition process, or even for certain etch processes, the deposition of material on the edge ring may decrease the capacitance of the edge ring along the aforementioned capacitive path between the plasma sheath and the chuck body, and in some cases, require an adjustment that increases the capacitance elsewhere along the capacitive path to compensate. In this case, the amount of deposition over time may be empirically determined to ascertain the change in the capacitance of the edge ring due to the deposition, or the change in the capacitance of the edge ring may be modeled or mathematically computed. This information may then be employed to facilitate compensation by adjusting one or more capacitances along the aforementioned capacitive path.
Furthermore, it is not necessary that the invention be limited to any particular type of plasma generation technology. Accordingly, it is contemplated that the invention applies to any and all plasma processing systems that experience process degradation due to edge ring thinning damage or the buildup of material on the edge ring, irrespective of how the plasma is generated, including inductively coupled plasma processing systems, capacitively coupled plasma processing systems, and others. It should also be noted that there are many alternative ways of implementing the methods and apparatuses of the present invention. It is therefore intended that the following appended claims be interpreted as including all such alterations, permutations, and equivalents as fall within the true spirit and scope of the present invention.

Claims (15)

1. A plasma processing system having at least one plasma processing chamber for processing a plurality of substrates, said plasma processing chamber comprising:
a chuck configured for supporting a substrate during said processing;
an edge ring having an outer periphery, said outer periphery of said edge ring surrounding said chuck, wherein said edge ring is disposed along a capacitive path between a plasma sheath and said chuck during said processing, said plasma sheath being associated with a plasma generated during said processing;
a coupling ring disposed along said capacitive path; and,
an arrangement for adjusting a capacitance value of a capacitance disposed along said capacitive path, said adjusting comprises moving, along an axis that is substantially perpendicular to a surface of said edge ring, one of said edge ring and said coupling ring to adjust a gap between adjacent surfaces, said adjacent surfaces including a said surface of said edge ring and a surface of said coupling ring.
2. The plasma processing system of claim 1 wherein said arrangement is coupled to said coupling ring and is configured to move said coupling ring along an axis that is perpendicular to said surface of said edge ring to increase said gap.
3. The plasma processing system of claim 1 wherein said arrangement includes an actuator.
4. The plasma processing system of claim 3 wherein said actuator is a linear actuator.
5. The plasma processing system of claim 3 wherein said actuator is a screw actuator.
6. The plasma processing system of claim 1 wherein said capacitance value of said capacitance disposed along said capacitive path is decreased by a given value, said given value represents a capacitance value sufficient to offset a first increase in capacitance along said capacitive path, said first increase in capacitance being attributable to thinning damage of said edge ring.
7. The plasma processing system of claim 1 wherein said processing includes etching said substrate.
8. The plasma processing system of claim 1 wherein said processing includes depositing a layer of material on said substrate.
9. A plasma processing system having at least one plasma processing chamber for processing a plurality of substrates, said plasma processing chamber comprising:
a chuck configured for supporting a substrate during said processing;
an edge ring having an outer periphery, said outer periphery of said edge ring surrounding said chuck, wherein said edge ring is disposed alone a capacitive path between a plasma sheath and said chuck during said processing, said plasma sheath being associated with a plasma generated during said processing; and,
an arrangement for adjusting a capacitance value of a capacitance disposed alone said capacitive path, wherein said capacitance represents a variable impedance device, said arrangement for adjusting said capacitance value of said capacitance includes an adjustment mechanism for adjusting a capacitance value of said variable impedance device.
10. A plasma processing system having at least one plasma processing chamber for processing a plurality of substrates, said plasma processing chamber comprising:
supporting means for supporting a substrate during said processing;
an edge ring having an outer periphery, said outer periphery of said edge ring surrounding said supporting means, wherein said edge ring is disposed along a capacitive path between a plasma sheath and said supporting means during said processing, said plasma sheath being associated with a plasma generated during said processing;
a coupling ring disposed along said capacitive path; and,
means for adjusting a capacitance value of a capacitance disposed along said capacitive path, said adjusting comprises moving, along an axis that is substantially perpendicular to a surface of said edge ring, one of said edge ring and said coupling ring to adjust a gap between adjacent surfaces, said adjacent surfaces including said surface of said edge ring and a surface of said coupling ring.
11. The plasma processing system of claim 10 wherein said means for adjusting is coupled to said coupling ring and is configured to move said coupling ring along an axis that is substantially perpendicular to said surface of said edge ring to increase said gap.
12. The plasma processing system of claim 10 wherein said means for adjusting is coupled to said coupling ring and is configured to move said coupling ring along an axis that is substantially perpendicular to said surface of said edge ring to decrease said gap.
13. The plasma processing system of claim 10 wherein said means for adjusting includes one of a linear actuator and a screw actuator.
14. The plasma processing system of claim 10 wherein said capacitance value of said capacitance disposed along said capacitive path is decreased by a given value, said given value represents a capacitance value sufficient to offset a first increase in capacitance along said capacitive path, said first increase in capacitance being attributable to thinning damage of said edge ring from said processing.
15. The plasma processing system of claim 10 wherein said capacitance value of said capacitance disposed along said capacitive path is increased by a given value, said given value represents a capacitance value sufficient to offset a first decrease in capacitance along said capacitive path, said first decrease in capacitance being attributable a build up of material on said edge ring from said processing.
US10/247,812 2002-09-18 2002-09-18 Method and apparatus for the compensation of edge ring wear in a plasma processing chamber Expired - Lifetime US6896765B2 (en)

Priority Applications (12)

Application Number Priority Date Filing Date Title
US10/247,812 US6896765B2 (en) 2002-09-18 2002-09-18 Method and apparatus for the compensation of edge ring wear in a plasma processing chamber
AT03797912T ATE459975T1 (en) 2002-09-18 2003-09-16 METHOD AND DEVICE FOR COMPENSATING EDGE RING WEAR IN A PLASMA PROCESSING CHAMBER
EP03797912A EP1540695B1 (en) 2002-09-18 2003-09-16 A method and apparatus for the compensation of edge ring wear in a plasma processing chamber
AU2003276895A AU2003276895A1 (en) 2002-09-18 2003-09-16 A method and apparatus for the compensation of edge ring wear in a plasma processing chamber
JP2004537951A JP4841840B2 (en) 2002-09-18 2003-09-16 Method and apparatus for compensation of edge ring wear in a plasma processing chamber
DE60331557T DE60331557D1 (en) 2002-09-18 2003-09-16 DRING USE IN A PLASMA PROCESSING CHAMBER
CNB038223147A CN100481307C (en) 2002-09-18 2003-09-16 Method and apparatus for the compensation of edge ring wear in a plasma processing chamber
KR1020057004768A KR101075048B1 (en) 2002-09-18 2003-09-16 A method and apparatus for the compensation of edge ring wear in a plasma processing chamber
PCT/US2003/029309 WO2004027816A2 (en) 2002-09-18 2003-09-16 A method and apparatus for the compensation of edge ring wear in a plasma processing chamber
TW092125775A TWI324809B (en) 2002-09-18 2003-09-18 A method and apparatus for the compensation of edge ring wear in a plasma processing chamber
US10/971,971 US7176403B2 (en) 2002-09-18 2004-10-22 Method and apparatus for the compensation of edge ring wear in a plasma processing chamber
IL167491A IL167491A (en) 2002-09-18 2005-03-16 Method and apparatus for the compensation of edge ring wear in a plasma processing chamber

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/247,812 US6896765B2 (en) 2002-09-18 2002-09-18 Method and apparatus for the compensation of edge ring wear in a plasma processing chamber

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US10/971,971 Division US7176403B2 (en) 2002-09-18 2004-10-22 Method and apparatus for the compensation of edge ring wear in a plasma processing chamber

Publications (2)

Publication Number Publication Date
US20040053428A1 US20040053428A1 (en) 2004-03-18
US6896765B2 true US6896765B2 (en) 2005-05-24

Family

ID=31992568

Family Applications (2)

Application Number Title Priority Date Filing Date
US10/247,812 Expired - Lifetime US6896765B2 (en) 2002-09-18 2002-09-18 Method and apparatus for the compensation of edge ring wear in a plasma processing chamber
US10/971,971 Expired - Lifetime US7176403B2 (en) 2002-09-18 2004-10-22 Method and apparatus for the compensation of edge ring wear in a plasma processing chamber

Family Applications After (1)

Application Number Title Priority Date Filing Date
US10/971,971 Expired - Lifetime US7176403B2 (en) 2002-09-18 2004-10-22 Method and apparatus for the compensation of edge ring wear in a plasma processing chamber

Country Status (11)

Country Link
US (2) US6896765B2 (en)
EP (1) EP1540695B1 (en)
JP (1) JP4841840B2 (en)
KR (1) KR101075048B1 (en)
CN (1) CN100481307C (en)
AT (1) ATE459975T1 (en)
AU (1) AU2003276895A1 (en)
DE (1) DE60331557D1 (en)
IL (1) IL167491A (en)
TW (1) TWI324809B (en)
WO (1) WO2004027816A2 (en)

Cited By (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050133164A1 (en) * 2003-12-17 2005-06-23 Andreas Fischer Temperature controlled hot edge ring assembly for reducing plasma reactor etch rate drift
US20060196605A1 (en) * 2005-03-07 2006-09-07 Eiji Ikegami Method and apparatus for plasma processing
US20070169891A1 (en) * 2003-09-05 2007-07-26 Tokyo Electron Limited Focus ring and plasma processing apparatus
US20080236751A1 (en) * 2007-03-30 2008-10-02 Tooru Aramaki Plasma Processing Apparatus
WO2009006038A1 (en) * 2007-06-28 2009-01-08 Lam Research Corporation Edge ring arrangements for substrate processing
US20090025636A1 (en) * 2007-07-27 2009-01-29 Applied Materials, Inc. High profile minimum contact process kit for hdp-cvd application
US20090223810A1 (en) * 2007-06-28 2009-09-10 Rajinder Dhindsa Methods and arrangements for plasma processing system with tunable capacitance
US20090261065A1 (en) * 2008-04-18 2009-10-22 Lam Research Corporation Components for use in a plasma chamber having reduced particle generation and method of making
US20100108261A1 (en) * 2008-10-31 2010-05-06 Lam Research Corporation Lower electrode assembly of plasma processing chamber
US20110126852A1 (en) * 2009-11-30 2011-06-02 Lam Research Corporation Electrostatic chuck with an angled sidewall
US20120055403A1 (en) * 2009-03-03 2012-03-08 Tokyo Electron Limited Mounting table structure, film forming apparatus and raw material recovery method
US9279758B2 (en) 2007-09-04 2016-03-08 Lam Research Corporation Method and apparatus for diagnosing status of parts in real time in plasma processing equipment
US9947517B1 (en) 2016-12-16 2018-04-17 Applied Materials, Inc. Adjustable extended electrode for edge uniformity control
US10312121B2 (en) 2016-03-29 2019-06-04 Lam Research Corporation Systems and methods for aligning measurement device in substrate processing systems
US10410832B2 (en) 2016-08-19 2019-09-10 Lam Research Corporation Control of on-wafer CD uniformity with movable edge ring and gas injection adjustment
US10438833B2 (en) 2016-02-16 2019-10-08 Lam Research Corporation Wafer lift ring system for wafer transfer
US10553404B2 (en) 2017-02-01 2020-02-04 Applied Materials, Inc. Adjustable extended electrode for edge uniformity control
US10600623B2 (en) 2018-05-28 2020-03-24 Applied Materials, Inc. Process kit with adjustable tuning ring for edge uniformity control
US10651015B2 (en) 2016-02-12 2020-05-12 Lam Research Corporation Variable depth edge ring for etch uniformity control
US10658222B2 (en) 2015-01-16 2020-05-19 Lam Research Corporation Moveable edge coupling ring for edge process control during semiconductor wafer processing
US10699878B2 (en) 2016-02-12 2020-06-30 Lam Research Corporation Chamber member of a plasma source and pedestal with radially outward positioned lift pins for translation of a substrate c-ring
US10825659B2 (en) 2016-01-07 2020-11-03 Lam Research Corporation Substrate processing chamber including multiple gas injection points and dual injector
US10957561B2 (en) 2015-07-30 2021-03-23 Lam Research Corporation Gas delivery system
US11011353B2 (en) 2016-03-29 2021-05-18 Lam Research Corporation Systems and methods for performing edge ring characterization
US11043400B2 (en) 2017-12-21 2021-06-22 Applied Materials, Inc. Movable and removable process kit
US11075105B2 (en) 2017-09-21 2021-07-27 Applied Materials, Inc. In-situ apparatus for semiconductor process module
US11101115B2 (en) 2019-04-19 2021-08-24 Applied Materials, Inc. Ring removal from processing chamber
US11289310B2 (en) 2018-11-21 2022-03-29 Applied Materials, Inc. Circuits for edge ring control in shaped DC pulsed plasma process device
US11393710B2 (en) 2016-01-26 2022-07-19 Applied Materials, Inc. Wafer edge ring lifting solution
US11446788B2 (en) 2014-10-17 2022-09-20 Applied Materials, Inc. Precursor formulations for polishing pads produced by an additive manufacturing process
US11471999B2 (en) 2017-07-26 2022-10-18 Applied Materials, Inc. Integrated abrasive polishing pads and manufacturing methods
US11605546B2 (en) 2015-01-16 2023-03-14 Lam Research Corporation Moveable edge coupling ring for edge process control during semiconductor wafer processing
US11685014B2 (en) 2018-09-04 2023-06-27 Applied Materials, Inc. Formulations for advanced polishing pads
US11724362B2 (en) 2014-10-17 2023-08-15 Applied Materials, Inc. Polishing pads produced by an additive manufacturing process
US11745302B2 (en) 2014-10-17 2023-09-05 Applied Materials, Inc. Methods and precursor formulations for forming advanced polishing pads by use of an additive manufacturing process
US11772229B2 (en) 2016-01-19 2023-10-03 Applied Materials, Inc. Method and apparatus for forming porous advanced polishing pads using an additive manufacturing process
US11935773B2 (en) 2018-06-14 2024-03-19 Applied Materials, Inc. Calibration jig and calibration method
US11958162B2 (en) 2014-10-17 2024-04-16 Applied Materials, Inc. CMP pad construction with composite material properties using additive manufacturing processes

Families Citing this family (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101996843B (en) * 2003-01-07 2013-05-01 东京毅力科创株式会社 Plasma processing device and focusing ring
KR100610010B1 (en) * 2004-07-20 2006-08-08 삼성전자주식회사 Apparatus for
JP2007250967A (en) * 2006-03-17 2007-09-27 Tokyo Electron Ltd Plasma treating apparatus and method, and focus ring
JP5069452B2 (en) 2006-04-27 2012-11-07 アプライド マテリアルズ インコーポレイテッド Substrate support with electrostatic chuck having dual temperature zones
US7572737B1 (en) * 2006-06-30 2009-08-11 Lam Research Corporation Apparatus and methods for adjusting an edge ring potential substrate processing
US7943007B2 (en) 2007-01-26 2011-05-17 Lam Research Corporation Configurable bevel etcher
JP5317424B2 (en) 2007-03-28 2013-10-16 東京エレクトロン株式会社 Plasma processing equipment
CN101552182B (en) * 2008-03-31 2010-11-03 北京北方微电子基地设备工艺研究中心有限责任公司 Marginal ring mechanism used in semiconductor manufacture technology
JP5350043B2 (en) * 2009-03-31 2013-11-27 東京エレクトロン株式会社 Plasma processing apparatus and plasma processing method
US20110011534A1 (en) * 2009-07-17 2011-01-20 Rajinder Dhindsa Apparatus for adjusting an edge ring potential during substrate processing
SG170717A1 (en) * 2009-11-02 2011-05-30 Lam Res Corp Hot edge ring with sloped upper surface
JP5654297B2 (en) * 2010-09-14 2015-01-14 東京エレクトロン株式会社 Plasma processing apparatus and plasma processing method
JP5741124B2 (en) * 2011-03-29 2015-07-01 東京エレクトロン株式会社 Plasma processing equipment
CN103177925B (en) * 2011-12-23 2015-08-26 中微半导体设备(上海)有限公司 A kind of adjustable confinement ring for plasma processing apparatus
CN103187234B (en) * 2011-12-30 2016-03-16 中微半导体设备(上海)有限公司 A kind of adjustable constraint device for plasma processing apparatus
US8525069B1 (en) * 2012-05-18 2013-09-03 Hypertherm, Inc. Method and apparatus for improved cutting life of a plasma arc torch
US20140034242A1 (en) * 2012-07-31 2014-02-06 Lam Research Corporation Edge ring assembly for plasma processing chamber and method of manufacture thereof
JP6573325B2 (en) * 2013-12-17 2019-09-11 東京エレクトロン株式会社 System and method for controlling plasma density
US10804081B2 (en) 2013-12-20 2020-10-13 Lam Research Corporation Edge ring dimensioned to extend lifetime of elastomer seal in a plasma processing chamber
JP5767373B2 (en) * 2014-07-29 2015-08-19 東京エレクトロン株式会社 Plasma processing apparatus, plasma processing method, and storage medium for storing program for implementing the same
US10854492B2 (en) * 2015-08-18 2020-12-01 Lam Research Corporation Edge ring assembly for improving feature profile tilting at extreme edge of wafer
CN105185732A (en) * 2015-08-24 2015-12-23 沈阳拓荆科技有限公司 Ceramic ring capable of changing shape and appearance of surface film of wafer
US10685862B2 (en) 2016-01-22 2020-06-16 Applied Materials, Inc. Controlling the RF amplitude of an edge ring of a capacitively coupled plasma process device
US9852889B1 (en) * 2016-06-22 2017-12-26 Lam Research Corporation Systems and methods for controlling directionality of ions in an edge region by using an electrode within a coupling ring
JP2018006299A (en) 2016-07-08 2018-01-11 東芝メモリ株式会社 Processing object susceptor for plasma processing apparatus, plasma processing apparatus and plasma processing method
CN107644802B (en) * 2016-07-21 2019-09-06 中微半导体设备(上海)股份有限公司 Plasma etching apparatus and its edge ring assembly and electrostatic chuck
KR102581226B1 (en) 2016-12-23 2023-09-20 삼성전자주식회사 Plasma processing device
JP6974088B2 (en) * 2017-09-15 2021-12-01 東京エレクトロン株式会社 Plasma processing equipment and plasma processing method
CN109920716B (en) * 2017-12-13 2021-06-08 中微半导体设备(上海)股份有限公司 Plasma processing device and method for balancing etching rate
KR102505152B1 (en) * 2017-12-15 2023-02-28 램 리써치 코포레이션 Ring structures and systems for use in a plasma chamber
JP7055040B2 (en) * 2018-03-07 2022-04-15 東京エレクトロン株式会社 Placement device and processing device for the object to be processed
KR101995760B1 (en) * 2018-04-02 2019-07-03 세메스 주식회사 Apparatus and method for treating substrate
US11512393B2 (en) * 2018-11-29 2022-11-29 Lam Research Corporation Dynamic sheath control with edge ring lift
US10903050B2 (en) * 2018-12-10 2021-01-26 Lam Research Corporation Endpoint sensor based control including adjustment of an edge ring parameter for each substrate processed to maintain etch rate uniformity
US11955314B2 (en) * 2019-01-09 2024-04-09 Tokyo Electron Limited Plasma processing apparatus
KR102214333B1 (en) 2019-06-27 2021-02-10 세메스 주식회사 Apparatus and method for treating substrate
JP7278160B2 (en) * 2019-07-01 2023-05-19 東京エレクトロン株式会社 Etching method and plasma processing apparatus
KR20220038172A (en) * 2019-08-05 2022-03-25 램 리써치 코포레이션 Edge Ring Systems for Substrate Processing Systems
CN112885690B (en) * 2019-11-29 2023-10-20 中微半导体设备(上海)股份有限公司 Plasma processing device
US11380575B2 (en) 2020-07-27 2022-07-05 Applied Materials, Inc. Film thickness uniformity improvement using edge ring and bias electrode geometry
CN112259452B (en) * 2020-10-21 2023-04-07 上海华力集成电路制造有限公司 Control method of plasma dry etching process
KR102587757B1 (en) 2021-01-20 2023-10-12 주식회사 레인테크 Attaching apparatus and attaching method
KR102335630B1 (en) 2021-04-20 2021-12-08 (주)앤피에스 Heat source device, substrate support device and substrate processing facility

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5252827A (en) * 1990-08-31 1993-10-12 Hitachi, Ltd. Method and apparatus for analysis of gases using plasma
US6074488A (en) * 1997-09-16 2000-06-13 Applied Materials, Inc Plasma chamber support having an electrically coupled collar ring
US6475336B1 (en) * 2000-10-06 2002-11-05 Lam Research Corporation Electrostatically clamped edge ring for plasma processing

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW418461B (en) * 1997-03-07 2001-01-11 Tokyo Electron Ltd Plasma etching device
US6039836A (en) 1997-12-19 2000-03-21 Lam Research Corporation Focus rings
US6013984A (en) * 1998-06-10 2000-01-11 Lam Research Corporation Ion energy attenuation method by determining the required number of ion collisions
US6363882B1 (en) * 1999-12-30 2002-04-02 Lam Research Corporation Lower electrode design for higher uniformity
US6528751B1 (en) * 2000-03-17 2003-03-04 Applied Materials, Inc. Plasma reactor with overhead RF electrode tuned to the plasma
TW506234B (en) * 2000-09-18 2002-10-11 Tokyo Electron Ltd Tunable focus ring for plasma processing
JP3388228B2 (en) * 2000-12-07 2003-03-17 株式会社半導体先端テクノロジーズ Plasma etching apparatus and plasma etching method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5252827A (en) * 1990-08-31 1993-10-12 Hitachi, Ltd. Method and apparatus for analysis of gases using plasma
US6074488A (en) * 1997-09-16 2000-06-13 Applied Materials, Inc Plasma chamber support having an electrically coupled collar ring
US6475336B1 (en) * 2000-10-06 2002-11-05 Lam Research Corporation Electrostatically clamped edge ring for plasma processing

Cited By (61)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7658816B2 (en) * 2003-09-05 2010-02-09 Tokyo Electron Limited Focus ring and plasma processing apparatus
US20070169891A1 (en) * 2003-09-05 2007-07-26 Tokyo Electron Limited Focus ring and plasma processing apparatus
US7244336B2 (en) * 2003-12-17 2007-07-17 Lam Research Corporation Temperature controlled hot edge ring assembly for reducing plasma reactor etch rate drift
US20050133164A1 (en) * 2003-12-17 2005-06-23 Andreas Fischer Temperature controlled hot edge ring assembly for reducing plasma reactor etch rate drift
US20060196605A1 (en) * 2005-03-07 2006-09-07 Eiji Ikegami Method and apparatus for plasma processing
US20080236751A1 (en) * 2007-03-30 2008-10-02 Tooru Aramaki Plasma Processing Apparatus
US20100163186A1 (en) * 2007-03-30 2010-07-01 Tooru Aramaki Plasma Processing Apparatus
KR101513322B1 (en) 2007-06-28 2015-04-17 램 리써치 코포레이션 Methods and arrangements for plasma processing system with tunable capacitance
US9184074B2 (en) 2007-06-28 2015-11-10 Lam Research Corporation Apparatus and methods for edge ring implementation for substrate processing
WO2009006038A1 (en) * 2007-06-28 2009-01-08 Lam Research Corporation Edge ring arrangements for substrate processing
US20110070743A1 (en) * 2007-06-28 2011-03-24 Rajinder Dhindsa Apparatus and methods for edge ring implementation for substrate processing
US20090223810A1 (en) * 2007-06-28 2009-09-10 Rajinder Dhindsa Methods and arrangements for plasma processing system with tunable capacitance
KR101155837B1 (en) * 2007-06-28 2012-06-21 램 리써치 코포레이션 Edge ring arrangements for substrate processing
US8563619B2 (en) * 2007-06-28 2013-10-22 Lam Research Corporation Methods and arrangements for plasma processing system with tunable capacitance
WO2009018143A1 (en) * 2007-07-27 2009-02-05 Applied Materials, Inc. High profile minimum contact process kit for hdp-cvd application
US20090025636A1 (en) * 2007-07-27 2009-01-29 Applied Materials, Inc. High profile minimum contact process kit for hdp-cvd application
TWI455238B (en) * 2007-07-27 2014-10-01 Applied Materials Inc High profile minimum contact process kit for hdp-cvd application
US9541514B2 (en) 2007-09-04 2017-01-10 I Am Research Corporation Method and apparatus for diagnosing status of parts in real time in plasma processing equipment
US9279758B2 (en) 2007-09-04 2016-03-08 Lam Research Corporation Method and apparatus for diagnosing status of parts in real time in plasma processing equipment
US20090261065A1 (en) * 2008-04-18 2009-10-22 Lam Research Corporation Components for use in a plasma chamber having reduced particle generation and method of making
US9412555B2 (en) * 2008-10-31 2016-08-09 Lam Research Corporation Lower electrode assembly of plasma processing chamber
US20100108261A1 (en) * 2008-10-31 2010-05-06 Lam Research Corporation Lower electrode assembly of plasma processing chamber
KR20160063412A (en) * 2008-10-31 2016-06-03 램 리써치 코포레이션 Lower electrode assembly of plasma processing chamber
US8992686B2 (en) * 2009-03-03 2015-03-31 Tokyo Electron Limited Mounting table structure, film forming apparatus and raw material recovery method
US20120055403A1 (en) * 2009-03-03 2012-03-08 Tokyo Electron Limited Mounting table structure, film forming apparatus and raw material recovery method
US20110126852A1 (en) * 2009-11-30 2011-06-02 Lam Research Corporation Electrostatic chuck with an angled sidewall
US11745302B2 (en) 2014-10-17 2023-09-05 Applied Materials, Inc. Methods and precursor formulations for forming advanced polishing pads by use of an additive manufacturing process
US11958162B2 (en) 2014-10-17 2024-04-16 Applied Materials, Inc. CMP pad construction with composite material properties using additive manufacturing processes
US11724362B2 (en) 2014-10-17 2023-08-15 Applied Materials, Inc. Polishing pads produced by an additive manufacturing process
US11446788B2 (en) 2014-10-17 2022-09-20 Applied Materials, Inc. Precursor formulations for polishing pads produced by an additive manufacturing process
US11605546B2 (en) 2015-01-16 2023-03-14 Lam Research Corporation Moveable edge coupling ring for edge process control during semiconductor wafer processing
US10658222B2 (en) 2015-01-16 2020-05-19 Lam Research Corporation Moveable edge coupling ring for edge process control during semiconductor wafer processing
US10957561B2 (en) 2015-07-30 2021-03-23 Lam Research Corporation Gas delivery system
US10825659B2 (en) 2016-01-07 2020-11-03 Lam Research Corporation Substrate processing chamber including multiple gas injection points and dual injector
US11772229B2 (en) 2016-01-19 2023-10-03 Applied Materials, Inc. Method and apparatus for forming porous advanced polishing pads using an additive manufacturing process
US11393710B2 (en) 2016-01-26 2022-07-19 Applied Materials, Inc. Wafer edge ring lifting solution
US10699878B2 (en) 2016-02-12 2020-06-30 Lam Research Corporation Chamber member of a plasma source and pedestal with radially outward positioned lift pins for translation of a substrate c-ring
US10651015B2 (en) 2016-02-12 2020-05-12 Lam Research Corporation Variable depth edge ring for etch uniformity control
US11342163B2 (en) 2016-02-12 2022-05-24 Lam Research Corporation Variable depth edge ring for etch uniformity control
US10438833B2 (en) 2016-02-16 2019-10-08 Lam Research Corporation Wafer lift ring system for wafer transfer
US10312121B2 (en) 2016-03-29 2019-06-04 Lam Research Corporation Systems and methods for aligning measurement device in substrate processing systems
US11011353B2 (en) 2016-03-29 2021-05-18 Lam Research Corporation Systems and methods for performing edge ring characterization
US10410832B2 (en) 2016-08-19 2019-09-10 Lam Research Corporation Control of on-wafer CD uniformity with movable edge ring and gas injection adjustment
US11424103B2 (en) 2016-08-19 2022-08-23 Lam Research Corporation Control of on-wafer cd uniformity with movable edge ring and gas injection adjustment
US9947517B1 (en) 2016-12-16 2018-04-17 Applied Materials, Inc. Adjustable extended electrode for edge uniformity control
US10103010B2 (en) 2016-12-16 2018-10-16 Applied Materials, Inc. Adjustable extended electrode for edge uniformity control
US10504702B2 (en) 2016-12-16 2019-12-10 Applied Materials, Inc. Adjustable extended electrode for edge uniformity control
US10553404B2 (en) 2017-02-01 2020-02-04 Applied Materials, Inc. Adjustable extended electrode for edge uniformity control
US10991556B2 (en) 2017-02-01 2021-04-27 Applied Materials, Inc. Adjustable extended electrode for edge uniformity control
US11471999B2 (en) 2017-07-26 2022-10-18 Applied Materials, Inc. Integrated abrasive polishing pads and manufacturing methods
US11075105B2 (en) 2017-09-21 2021-07-27 Applied Materials, Inc. In-situ apparatus for semiconductor process module
US11887879B2 (en) 2017-09-21 2024-01-30 Applied Materials, Inc. In-situ apparatus for semiconductor process module
US11043400B2 (en) 2017-12-21 2021-06-22 Applied Materials, Inc. Movable and removable process kit
US10790123B2 (en) 2018-05-28 2020-09-29 Applied Materials, Inc. Process kit with adjustable tuning ring for edge uniformity control
US10600623B2 (en) 2018-05-28 2020-03-24 Applied Materials, Inc. Process kit with adjustable tuning ring for edge uniformity control
US11728143B2 (en) 2018-05-28 2023-08-15 Applied Materials, Inc. Process kit with adjustable tuning ring for edge uniformity control
US11201037B2 (en) 2018-05-28 2021-12-14 Applied Materials, Inc. Process kit with adjustable tuning ring for edge uniformity control
US11935773B2 (en) 2018-06-14 2024-03-19 Applied Materials, Inc. Calibration jig and calibration method
US11685014B2 (en) 2018-09-04 2023-06-27 Applied Materials, Inc. Formulations for advanced polishing pads
US11289310B2 (en) 2018-11-21 2022-03-29 Applied Materials, Inc. Circuits for edge ring control in shaped DC pulsed plasma process device
US11101115B2 (en) 2019-04-19 2021-08-24 Applied Materials, Inc. Ring removal from processing chamber

Also Published As

Publication number Publication date
US7176403B2 (en) 2007-02-13
WO2004027816A3 (en) 2004-12-09
KR101075048B1 (en) 2011-10-19
ATE459975T1 (en) 2010-03-15
TW200408043A (en) 2004-05-16
EP1540695A2 (en) 2005-06-15
US20050056622A1 (en) 2005-03-17
KR20050050660A (en) 2005-05-31
CN100481307C (en) 2009-04-22
US20040053428A1 (en) 2004-03-18
EP1540695B1 (en) 2010-03-03
IL167491A (en) 2009-08-03
AU2003276895A1 (en) 2004-04-08
TWI324809B (en) 2010-05-11
JP2005539397A (en) 2005-12-22
DE60331557D1 (en) 2010-04-15
CN1682344A (en) 2005-10-12
WO2004027816A2 (en) 2004-04-01
JP4841840B2 (en) 2011-12-21

Similar Documents

Publication Publication Date Title
US6896765B2 (en) Method and apparatus for the compensation of edge ring wear in a plasma processing chamber
KR102496625B1 (en) Tunable upper plasma-exclusion-zone ring for a bevel etcher
KR100938635B1 (en) Plasma confinement baffle and flow equalizer for enhanced magnetic control of plasma radial distribution
KR100900585B1 (en) Focus ring and plasma processing apparatus
US6433484B1 (en) Wafer area pressure control
JP5597456B2 (en) Dielectric thickness setting method and substrate processing apparatus provided with dielectric provided on electrode
US8426317B2 (en) Plasma processing apparatus and plasma processing method
US10170284B2 (en) Plasma processing method and plasma processing apparatus
KR20020041340A (en) Techniques for improving etch rate uniformity
US6416635B1 (en) Method and apparatus for sputter coating with variable target to substrate spacing
JP5305287B2 (en) Semiconductor manufacturing equipment
KR102245903B1 (en) Plasma processing device cleaning method and plasma processing device
WO1999063571A1 (en) Pedestal insulator for a pre-clean chamber
JP2006332336A (en) Plasma etching device for photomask, and etching method
US20220051881A1 (en) Plasma Etching Apparatus and Method
KR20150008819A (en) Hybrid feature etching and bevel etching systems
WO2021216557A1 (en) Methods and apparatus for reducing defects in preclean chambers
JP2000226649A (en) High frequency sputtering device, gland ring on the substrate side and target side and formation of oxidized insulating film
JP2007149753A (en) Semiconductor manufacturing device

Legal Events

Date Code Title Description
AS Assignment

Owner name: LAM RESEARCH CORPORATION, CALIFORNIA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:STEGER, ROBERT J.;REEL/FRAME:013324/0936

Effective date: 20020913

STCF Information on status: patent grant

Free format text: PATENTED CASE

FPAY Fee payment

Year of fee payment: 4

FPAY Fee payment

Year of fee payment: 8

FPAY Fee payment

Year of fee payment: 12

SULP Surcharge for late payment

Year of fee payment: 11