CN1278949A - 碳化硅衬底上具有导电缓冲中间层结构的ⅲ族氮化物光子器件 - Google Patents
碳化硅衬底上具有导电缓冲中间层结构的ⅲ族氮化物光子器件 Download PDFInfo
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Abstract
这里公开了一种具有Ⅲ族氮化物有源层的光电子器件,该器件包括:碳化硅衬底;具有Ⅲ族氮化物有源层的光电子二极管;选自由氮化镓和铟镓氮构成的组中的缓冲结构,该结构位于所说碳化硅衬底和所说光电子二极管间;及应力吸收结构,包括在所说缓冲结构的晶体结构内的多个预定应力释放区,以便所说缓冲结构中产生的应力诱发开裂,发生在所说缓冲层内的预定区域,而非其它区域。
Description
发明的领域
本发明涉及宽带隙材料的光子器件,特别涉及在碳化硅衬底上形成有Ⅲ族氮化物有源层的光子器件。
发明的背景
近些年来人们对例如金刚石、碳化硅和氮化镓等宽带隙半导体材料越来越感兴趣,是由于它们的宽带隙特性使得它们能够发射比例如硅或砷化镓等其它半导体材料更高能量的光(对应于更高频率和更短波长)。具体说,碳化硅、氮化镓和某些其它Ⅲ族氮化物具有足以产生包括较高能量的蓝光部分的整个可见光谱的可见光。所以它们为半导体激光器及蓝和绿发射的发光二极管(LEDs)的发展提供了基础。
这些材料中,由于氮化镓是直接半导体,即,从价带到导带的跃迁不需要电子晶体动量改变,所以人们对氮化镓特别感兴趣。结果,这种跃迁可以非常有效地发光。相反,碳化硅是间接半导体,带间跃迁能部分作为光子部分作为振动能损失掉。所以,氮化镓的优点是,对于给定工作电压和电流来说,它可以比碳化硅更有效地发光。
然而,对于其它半导体材料来说,形成能工作的光子器件的第一步是建立或获得具有希望有源层的合适晶体结构。然而,由于半导体材料结构特性特别是它们的晶格结构上的差异,某种程度上限制了工作上能支持Ⅲ族氮化物有源层器件的材料。
目前,市场上可买得到的发光二极管光子器件的结构由蓝宝石衬底上的氮化镓或有关的Ⅲ族氮化物有源层构成。蓝宝石(Al2O3)具有与Ⅲ族氮化物较匹配的晶格,但仍存在一些缺点,其中最严重的是电绝缘性。所以,在Ⅲ族氮化物有源层和缓冲层(即提供从衬底到有源层的晶体结构过渡的中间层)建立在蓝宝石上时,蓝宝石不能用作到器件有源部分的导电通道。这限制了能够在蓝宝石上设计和制造的器件种类,特别是限制了形成“纵向”器件的能力,所谓的“纵向”器件是指,器件接触可以设置于器件的相对表面上,具有通过衬底、缓冲层和有源层及器件相对表面上的另一接触的直接导电路径。因此,人们包括本发明的受让人的兴趣集中在使用其它材料作Ⅲ族氮化物光子器件的衬底候选材料。碳化硅(SiC)是特别引人注目的候选材料,原因是它能够制成导电的,具有可以相对于Ⅲ族氮化物有源层适当地被缓冲的晶格匹配,且具有优异的热和机械稳定性。
虽然如此,但碳化硅的晶格结构使得碳化硅衬底上合适Ⅲ族缓冲层的某些最佳候选材料是绝缘的而非导电的。所以,尽管碳化硅衬底可以制成导电的,但碳化硅衬底和Ⅲ族有源层光子器件间的某些优选缓冲层仍是绝缘的,抵消了导电碳化硅衬底的优点。
例如,氮化铝(AlN)在碳化硅衬底和Ⅲ族有源层特别是氮化镓有源层间具有优异的缓冲作用。然而,氮化铝是绝缘的而非导电的。所以具有氮化铝缓冲层的结构需要短路接触使氮化铝缓冲层旁路,以便电连接导电碳化硅衬底与Ⅲ族氮化物有源层。如上所述,这种短路接触的作法妨碍了某些更有益的器件设计。
或者,例如氮化镓(GaN)、铝镓氮(AlGaN)或氮化镓与铝镓氮的复合材料等导电缓冲层材料可以消除这种短路接触。进而,消除这种短路接触可以减小外延层厚度,减少制造器件所需要的制造步骤,减小总芯片尺寸,并提高器件效率。因此,可以低成本制造较高性能的Ⅲ族氮化物器件。
然而,尽管这些导电缓冲材料具备这些优点,但与氮化铝相比,它们与碳化硅的晶格匹配仍不能令人满意。因此,在碳化硅衬底上生长氮化镓、铝镓氮或它们的复合材料外延缓冲层时,它们易在例如发光二极管或激光二极管等光子器件需要的随后外延层中产生过多龟裂。
所以,需要一种具备氮化铝的晶格匹配,同时具备氮化镓或铝镓氮的导电性,并可以与导电碳化硅衬底而非绝缘蓝宝石衬底一起使用的缓冲结构。
本发明的目的和概述
因此,本发明的目的是制造光子器件及其晶片前身,该器件具有Ⅲ族氮化物有源层、导电碳化硅衬底和导电缓冲层,但可以避免龟裂及到目前为止妨碍这些材料和层的组合的其它问题。
本发明用带有Ⅲ族氮化物有源层的光子器件达到该目的,所说光子器件包括碳化硅衬底、具有Ⅲ族氮化物有源层的光电子二极管、碳化硅衬底和光电子二极管之间的缓冲结构,其中缓冲结构是导电的,并能提供合适的结晶特性。
一方面,该缓冲结构选自由氮化镓和铟镓氮(InGaN)组成的组中,并在缓冲层的晶体结构中引入包括多个预定应力释放区的应力吸收结构,以便缓冲层中产生的应力引起的龟裂发生在预定区域中,而不发生在缓冲层内其它区域。
另一方面,该缓冲层包括碳化硅衬底表面上的选自由氮化镓和铟镓氮组成的组中的多个独立晶体部分,以使碳化硅和铝镓氮缓冲结构间的异质势垒最小或被消除。
结合附图所作的详细介绍,可以使本发明的上述及其它目的和优点及其实施方式更清楚。
附图简介
图1是具有短路环接触的现有技术二极管的剖面图;
图2是可以根据本发明制造的纵向二极管的剖面图;
图3是根据本发明形成的像素的放大示意图;
图4是包括多个引入了根据本发明的结构的多个像素的显示器的示意图;
图5是引入了根据本发明的应力释放结构的碳化硅晶片的示意图;
图6是图5所示晶片的剖面图;
图7是图5所示晶片的剖面图,示意性展示了其上生长的缓冲层;
图8是引入本发明第二实施例的晶片的剖面图;
图9是与图8相同的剖面图,展示了其上生长的附加晶体;
图10是没在本发明范围内的外延层的扫描电子显微镜的10倍放大照片;
图11是展示根据本发明的外延层的10倍SEM照片;
图12是展示根据本发明的外延层的另一10倍SEM照片;
图13是与图12类似的外延层的50倍SEM照片。
图14是根据本发明的外延层的100倍SEM照片;
图15是展示未在本发明范围内的另一外延层的另一100倍SEM照片;
图16是本发明第二实施例的15000倍SEM照片;
图17是第二实施例的50000倍SEM照片。
详细介绍
图1是以20表示的现有技术器件的剖面图。如图1所示,器件20包括碳化硅衬底21、衬底21“背”面上的接触22、Ⅲ族氮化物有源层23、绝缘而非导电的缓冲层24、用于提供导电硅缓冲层21和有源层23间的电接触的短路接触25、完成电路并允许工作时电流流过器件的上接触26。
图2展示了本发明提供更小型器件的方式。图2中,器件总体表示为30,包括导电碳化硅衬底31、背接触32、有源层33、导电缓冲结构34及上接触35。本发明去除了图1器件中的短路接触(一般为短路环接触)25。结果,器件30更容易制造,且工作起来更有效。应理解,这里讨论的有源层33可以表示具有一个p-n结、一个或两个p-n异质结或p-n结量子阱结构的器件。现有的美国专利包括5393993和5592501中介绍了这些结构,所以除了更进一步骤展示本发明外,这里不再对其详细讨论。
图3展示了根据本发明的器件30可以与不同发光波长具体为红光发射二极管36和绿光发射二极管37等的类似器件结合,作为总体表示为40的三色像素的一部分,所说像素可以是显示器41中多个这种像素中的一个。图4中示意性展示的纵线42和横线43表示一般用于引入发光二极管的显示器的像素的行和列。
第一方面,本发明是一种具有Ⅲ族氮化物有源层的光子器件,它包括碳化硅衬底31、带有Ⅲ族氮化物有源层33的光二极管、位于碳化硅衬底31和二极管33间选自由氮化镓和铟镓氮组成的组中的缓冲结构34。具体说,该缓冲结构包括缓冲结构34的晶体结构中由多个预定应力释放区域构成的应力吸收结构,以便缓冲结构中产生的应力引起的龟裂,在预定区域而不在结构中其它地方发生。
图5是引入多个器件前身并引入本发明的应力吸收结构的晶片的示意图。图5展示了总体表示为44其上叠置了沟槽45的格栅图形的晶片。图6展示了同一晶片44和剖面取向的沟槽45。在具有沟槽45的晶片44上生长下一外延层46(图7)时,外延层46的表面趋于具有一连串断开47,这些断开47的位置反映了构成晶片44中的图形的沟槽45的位置。在碳化硅晶片44上生长缓冲层46的晶格结构时,这些断开47构成应力在此释放的区域。结果,在预计的地方而非任意位置发生晶格失配(或其它因素)造成的这种应力,所以允许器件形成在其余区域内,没有应力造成的龟裂的严重危险。
如上所述及图5所展示的,在一个优选实施例中,应力释放区的预定图形包括一格栅,该格栅较好是按限定分立器件的任何希望或必需的尺寸形成。例如,在分立器件是发光二极管时,优选的格栅图形限定每侧约为250微米的方形。或者,对于例如激光二极管等不同器件来说,该格栅可以限定约250×500微米的矩形。
图10是以10倍放大的SEM照片(10倍于实际尺寸),展示了看起来象三角形或多边形图形的龟裂可能损害外延层,使之有缺陷或无法用于光子器件的程度。
图11是另一10倍SEM照片,展示了外延层中的沟槽格栅图形。与图10相比,图11所示表面基本上没有龟裂缺陷。
图12是又一10倍SEM照片,展示了类似的格栅图形,与图11一样,根本没有图10所示的龟裂。
图13是具体展示本发明的优点的50倍SEM照片。图13中,一个格栅区包括一个大缺陷(大致“X”形)。然而,缺陷终止于格栅线处,并只损害一个器件(或器件前身),而不会损害晶片的多个器件部分。图14是100倍SEM照片,类似地展示了一个缺陷格栅部分(在照片的右下部分),缺陷在格栅线处终止,而不会进一步延伸到整个表面。
图15是100倍SEM照片,再一次展示了没引入本发明任何一个实施例的表面。图10所示一样,缺陷的几何图形十分明显。
在另一实施例中,应力吸收结构可以包括图8和9中得以很好展示的预定图形的小台面结构。在图8和9中,碳化硅衬底表示为50,小台面结构为51。台面结构51由不利于所选缓冲材料生长于其上的材料构成。关于氮化镓或铟镓氮缓冲结构,优选的材料选自由二氧化硅、氮化硅、和氧化铝构成的组中。
图9示出了与图8相同的结构,但缓冲材料作为外延层生长于碳化硅衬底50上。外延层部分由52表示。如图9所示,由于台面51上不利于生长缓冲材料,所以外延层52形成仍表现为其间为预定应力释放不连续结构的图形。如同先前的实施例,可以使两台面间的区域与各器件具有大致相同尺寸,如上所述,对于LEDs来说约为250微米,对于激光二极管来说约为250×500微米。然而,应理解,格栅或台面结构图形的特定尺寸是例示性的,而非对本发明的限制。
应理解,尽管根据本发明的晶片结构特别有益于光电子器件,但并不限于此,该优异的结构特性也有益于形成于晶片上的其它器件。
如背景部分所述,一般如图1中的23和图2中的33所示,形成于缓冲层上的光电子器件一般不是单层,而是选自由p-n同质结、p-n异质结、p-n单和双异质结、及p-n结量子阱结构构成的组中的多层二极管。
在优选实施例中,碳化硅衬底具有选自3C、4H、6H和15R多型构成的组中的多型。在最优选的实施例中,二极管的Ⅲ族氮化物有源层包括氮化镓或铟镓氮。
图16-18展示了本发明的另一实施例。一般说,图2再次示意性展示了该整体结构,包括碳化硅衬底31、光子二极管33和缓冲层34。然而,该例中,缓冲层是铝镓氮,而不是氮化镓或铟镓氮。该实施例包括图16-18中的白点表示的多个独立晶体部分。独立晶体部分选自由氮化镓和铟镓氮构成的组中,并形成于碳化硅衬底表面上,用于使碳化硅衬底31和铝镓氮缓冲结构34间的异质势垒最小或被消除。
在优选实施例中,独立晶体部分的量应足以使异质势垒最小或被消除,但小于有害地影响或破坏形成于碳化硅衬底31上的任何所得二极管器件的功能的量。如图16-18的照片所示,独立晶体部分的量应为每平方微米约40-60。
此外,独立晶体部分的尺寸较好是大到足以使异质势垒最小或被消除,但小于有害地影响或破坏形成于碳化硅衬底31上的任何所得二极管器件的功能的尺寸。在优选实施例中,独立晶体部分的直径为约0.01-0.1微米。
与先前实施例一样,形成于缓冲结构上的光电子器件33可以包括发光二极管或激光二极管,所得发光二极管可以引入像素中,像素进而可以引入显示器中。
在优选实施例中,铝镓氮缓冲层的铝原子比为约10—15%。另一方面,本发明包括在带有导电缓冲结构的碳化硅衬底上制造Ⅲ族氮化物光电子器件的方法。根据其方法的方案,本发明包括:在碳化硅衬底的上表面上,形成为在其上生长晶体而另外制备的结构图形;在碳化硅衬底的已构图表面上,形成选自由氮化镓和铟镓氮构成的组中的缓冲层,使缓冲层呈现仿照碳化硅衬底表面中开口图形的特征的结构;然后,在缓冲层上形成具有Ⅲ族氮化物有源层的光电子器件。
如关于结构方面所介绍的,形成结构图形的步骤可以包括在碳化硅衬底表面中形成开口图形,或在碳化硅衬底表面上形成台面结构图形。
在图形由开口构成时,形成开口的步骤可以包括例如反应离子腐蚀或掩蔽和腐蚀步骤等技术。对于碳化硅来说,这些步骤中的每一步都较容易理解,所以不再介绍,但注意,例如美国专利4865685和4981551例示性介绍了碳化硅的干法腐蚀程序。
在引入台面结构时,它们较好是选自由二氧化硅、氮化硅和氧化铝构成的组中。与结构情况一样,具有Ⅲ族有源层的光电子器件较好由氮化镓或铟镓氮构成。
与结构实施例一样,本发明方法可以包括形成发光二极管或激光二极管,在形成发光二极管时,该方法还可以包括将LED引入像素,而像素引入显示器。
根据替代的方法方案,在碳化硅衬底上,由铝镓氮形成本发明结构的缓冲结构,所说碳化硅衬底已通过在碳化硅表面上,形成选自由氮化镓和铟镓氮构成的组中的多个独立晶体部分,预先制备好。此后,在缓冲层上形成具有Ⅲ族有源层的光电子器件。
如本发明的结构方案所述,该方法包括其尺寸和量足以使异质势垒最小或被消除,但低于有害地影响或破坏在碳化硅衬底上形成的任何所得二极管器件的功能的独立晶体部分。具体说,本发明提供一种坚固结构,该结构一般能够耐受预计量级的静电放电。
根据第二方法方案,所得器件可形成为发光二极管,所以该方法还可以包括将LED引入像素,并将像素引入显示器的步骤。或者,该方法可以包括形成激光二极管而不LED的步骤。
与本发明的其它方案一样,在使用铝镓氮缓冲层时,较好是其铝原子比约为10-15%。
例子
按制造导电缓冲发光二极管和激光二极管的目前方法,首先淀积GaN点。GaN点的作用是降低SiC衬底和Si掺杂的AlGaN缓冲层间的势垒。
这可以在比结构中其它外延层所用温度低很多的温度下进行。点的尺寸和密度如图16和17所示。重要的是保持点较小,以便静电放电不产生负面影响。GaN点淀积约6秒,然后,用约15秒时间,用Si掺杂的Al0.10Ga0.90N“帽盖”。该帽盖的作用是防止GaN点因加热而发生分解。在该材料系中,在GaN中任意添加多少Al,即Al(1-x)Ga(x)N,都可以减小材料的分解速率,是由于在NH3/H2气氛中,AlGaN比GaN更稳定的缘故。点的帽盖后,将温度升高到缓冲层温度。温度升高后,且在进行缓冲层生长前,让温度稳定约2分钟。
在特定操作期间,在NH3和H2分别为13SLM和15SLM的气氛中,加热SiC晶片。在整个GaN点、AlGaN帽盖层和随后的缓冲层生长期间,这些流量保持恒定。在10分钟内温度升高直到达到约960℃的GaN点温度。使***中的温度稳定约5分钟后,使10-15cc的三甲基镓(TMG;-5℃,600乇)流过,时间约为6秒,进行点淀积。为以确保点是导电的,随着TMG流加入SiH4。SiH4的量通过生长载流子密度约为1×1018cm-3的体GaN层确定。GaN点淀积后,TMG和SiH4继续流过,但现在加入三甲基铝(TMA,92cc,25℃,600乇),于是形成约10-11% AlGaN的“帽盖”。帽盖的生长时间为15秒。然后,终止气流(TMG,TMA和SiH4),将温度升高到一般约为1060℃的缓冲层温度。温度升高1分钟,然后是2分钟使温度稳定的时间周期。然后,生长缓冲层。一般条件是18ccTMG/110cc TMA/0.087ccSiH4。缓冲层由约11-12%的AlGaN构成,一般厚约为1600-2700埃。
在附图和说明书中,已公开了本发明典型实施例,尽管使用了特定的术语,但它们只是一般性描述性使用,目的不在于限制,本发明的范围记载于以下的权利要求书中。
Claims (26)
1.一种具有Ⅲ族氮化物有源层的光电子器件,所说器件包括:
碳化硅衬底;
具有Ⅲ族氮化物有源层的光电子二极管;
选自由氮化镓和铟镓氮构成的组中的缓冲层,该层位于所说碳化硅衬底和所说光电子二极管间;及
应力吸收结构,包括在所说缓冲结构的晶体结构内的多个预定应力释放区,所以所说缓冲结构中产生的应力诱发开裂,发生在所说缓冲层内的预定区域,而非其它区域。
2.根据权利要求1的光电子器件,其中所说缓冲结构是导电的。
3.根据权利要求1的光电子器件,其中所说应力吸收结构包括在所说碳化硅衬底的表面内的预定图形的沟槽。
4.根据权利要求3的光电子器件,其中所说预定图形选自限定每个边约为250微米的方形的格栅,和限定约250×500微米的矩形的格栅。
5.根据权利要求1的光电子器件,其中所说应力吸收结构包括预定图形的小台面结构,所说小台面结构由选自二氧化硅(SiO2)、氮化硅和氧化铝中的材料构成。
6.根据权利要求1的光电子器件,其中所说二极管选自p-n同质结、p-n单和双异质结及p-n结量子阱结构,所说碳化硅衬底具有选自3C、4H、6H和15R多型中的多型。
7.根据权利要求1的光电子器件,其中所说Ⅲ族氮化物有源层选自氮化镓和铟镓氮。
8.一种具有Ⅲ族氮化物有源层的光电子器件,所说器件包括:
碳化硅衬底;
具有Ⅲ族氮化物有源层的光电子二极管;
位于所说碳化硅衬底和所说光电子二极管间的铝镓氮缓冲层;及所说碳化硅衬底表面上的多个独立晶体部分,这些部分选自氮化镓和铟镓氮,用于使所说碳化硅衬底和所说铝镓氮缓冲结构间的异质势垒最小或被消除。
9.根据权利要求8的光电子器件,其中所说独立晶体部分的量应足以使异质势垒最小或被消除,但小于有害地影响或破坏形成于碳化硅衬底上的任何所得二极管器件的功能的量。
10.根据权利要求8的光电子器件,其中所说独立晶体部分的尺寸较好是大到足以使异质势垒最小或被消除,但小于有害地影响或破坏形成于碳化硅衬底上的任何所得二极管器件的功能的尺寸。
11.根据权利要求8的光电子器件,其中所说独立晶体部分的量和尺寸一般足以耐受预计量级的静电放电。
12.根据权利要求1或8的光电子器件,包括发光二极管。
13.一种引入如权利要求12所述的发光二极管的像素。
14.一种引入如权利要求13所述的多个像素的显示器。
15.根据权利要求1或8的光电子器件,包括激光二极管。
16.根据权利要求8的光电子器件,其中所说铝镓氮缓冲层的铝原子比约为10—15%。
17.一种在碳化硅衬底上制造Ⅲ族氮化物光电子器件的方法,包括:
在碳化硅衬底的表面上,形成为在其上生长晶体而另外制备的结构图形;
在碳化硅衬底的构图表面上,形成选自氮化镓和铟镓氮的缓冲层,使该缓冲层呈现仿照碳化硅衬底的表面内图形的特征的结构;及
在缓冲层上形成具有Ⅲ族氮化物有源层的光电子器件。
18.根据权利要求17的方法,其中形成结构图形的步骤包括,通过掩蔽碳化硅衬底表面,然后腐蚀掩蔽表面,形成结构图形,从而在碳化硅衬底表面中形成开口图形。
19.根据权利要求17的方法,其中形成结构图形的步骤包括,在碳化硅衬底的表面上,由选自二氧化硅、氮化硅和氧化铝中的材料形成台面结构图形。
20.根据权利要求17的方法,其中形成具有Ⅲ族氮化物有源层的光电子器件的步骤包括,形成具有选自氮化镓和铟镓氮的有源层的器件。
21.一种在碳化硅衬底上形成Ⅲ族氮化物光电子器件的方法,包括:
在碳化硅衬底的表面上形成多个独立晶体部分,这些晶体部分选自氮化镓和铟镓氮;
在具有独立晶体部分的碳化硅衬底的表面上,形成铝镓氮缓冲层,其中独立晶体部分使碳化硅衬底和铝镓氮缓冲层间的异质势垒最小或被消除;及
在缓冲层上,形成具有Ⅲ族氮化物有源层的光电子器件。
22.根据权利要求21的方法,其中形成独立晶体部分的步骤包括,形成其量足以使异质势垒最小或被消除,但小于有害地影响或破坏形成于碳化硅衬底上的任何所得二极管器件的功能的独立晶体部分。
23.根据权利要求21的方法,其中形成独立晶体部分的步骤包括,形成其尺寸大到足以使异质势垒最小或被消除,但小于有害地影响或破坏形成于碳化硅衬底上的任何所得二极管器件的功能的该部分。
24.根据权利要求21的方法,包括形成其尺寸和量足以使所形成的二极管器件耐受一般预计量级的静电放电的独立晶体部分。
25.一种根据权利要求1的Ⅲ族氮化物器件的晶片前身,所说晶片前身包括:
碳化硅衬底晶片;
所说衬底上的缓冲层,该层选自氮化镓和铟镓氮;及
应力吸收结构,包括所说缓冲层的晶体结构内的多个预定应力释放区,以便所说缓冲层内产生的应力诱发开裂,发生在所说缓冲结构内的所说预定区域内而非其它地方。
26.一种根据权利要求8的Ⅲ族氮化物器件的晶片前身,所说晶片前身包括:
碳化硅衬底晶片;
所说碳化硅衬底上的铝镓氮缓冲层;及
所说的碳化硅衬底表面上的多个独立晶体部分,这些晶体部分选自氮化镓和铟镓氮,用于使所说碳化硅衬底和所说铝镓氮缓冲层间的异质势垒最小或被消除。
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- 1997-10-07 US US08/944,547 patent/US6201262B1/en not_active Expired - Lifetime
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- 1998-10-06 JP JP2000515300A patent/JP4061019B2/ja not_active Expired - Lifetime
- 1998-10-06 WO PCT/US1998/021160 patent/WO1999018617A1/en active IP Right Grant
- 1998-10-06 CA CA002305203A patent/CA2305203C/en not_active Expired - Fee Related
- 1998-10-06 EP EP98950987A patent/EP1027736A1/en not_active Withdrawn
- 1998-10-06 CN CNB988110652A patent/CN1185719C/zh not_active Expired - Lifetime
- 1998-10-06 AU AU96890/98A patent/AU9689098A/en not_active Abandoned
- 1998-10-06 KR KR1020007003789A patent/KR100592897B1/ko not_active IP Right Cessation
-
1999
- 1999-09-20 US US09/399,445 patent/US6187606B1/en not_active Expired - Lifetime
-
2000
- 2000-11-22 US US09/718,654 patent/US6373077B1/en not_active Expired - Lifetime
- 2000-11-22 US US09/718,958 patent/US6492193B1/en not_active Expired - Lifetime
-
2001
- 2001-09-28 US US09/966,789 patent/US6630690B2/en not_active Expired - Lifetime
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2006
- 2006-12-26 JP JP2006349833A patent/JP4966645B2/ja not_active Expired - Lifetime
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1505843B (zh) * | 2001-06-15 | 2010-05-05 | 克里公司 | 在SiC衬底上形成的GaN基LED |
CN101834245B (zh) * | 2001-06-15 | 2013-05-22 | 克里公司 | 在SiC衬底上形成的GaN基LED |
CN100459187C (zh) * | 2003-02-14 | 2009-02-04 | 克里公司 | 用于碳化硅的包含主要由镍组成的层的反射式欧姆接触及其制造方法以及包含该接触的发光器件 |
CN102903812A (zh) * | 2011-07-27 | 2013-01-30 | 南通同方半导体有限公司 | 一种能消除应力的发光二极管结构及其制作方法 |
Also Published As
Publication number | Publication date |
---|---|
JP4966645B2 (ja) | 2012-07-04 |
WO1999018617A1 (en) | 1999-04-15 |
JP2007180556A (ja) | 2007-07-12 |
JP4061019B2 (ja) | 2008-03-12 |
EP1027736A1 (en) | 2000-08-16 |
CA2305203C (en) | 2005-11-29 |
JP2001519603A (ja) | 2001-10-23 |
US6630690B2 (en) | 2003-10-07 |
KR100592897B1 (ko) | 2006-06-23 |
US6187606B1 (en) | 2001-02-13 |
CA2305203A1 (en) | 1999-04-15 |
AU9689098A (en) | 1999-04-27 |
US6373077B1 (en) | 2002-04-16 |
CN1185719C (zh) | 2005-01-19 |
US6492193B1 (en) | 2002-12-10 |
US20020008241A1 (en) | 2002-01-24 |
KR20010031003A (ko) | 2001-04-16 |
US6201262B1 (en) | 2001-03-13 |
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