CN1255818C - 具有奇偶校验单元阵列的存储电路 - Google Patents
具有奇偶校验单元阵列的存储电路 Download PDFInfo
- Publication number
- CN1255818C CN1255818C CNB021528535A CN02152853A CN1255818C CN 1255818 C CN1255818 C CN 1255818C CN B021528535 A CNB021528535 A CN B021528535A CN 02152853 A CN02152853 A CN 02152853A CN 1255818 C CN1255818 C CN 1255818C
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- Prior art keywords
- data
- cell array
- circuit
- test
- error correcting
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- Expired - Fee Related
Links
- 238000003860 storage Methods 0.000 title claims description 68
- 238000012360 testing method Methods 0.000 claims abstract description 371
- 238000011084 recovery Methods 0.000 claims abstract description 15
- 239000004065 semiconductor Substances 0.000 claims description 47
- 230000005540 biological transmission Effects 0.000 claims description 23
- 238000003491 array Methods 0.000 claims description 5
- 239000003990 capacitor Substances 0.000 claims description 5
- GOLXNESZZPUPJE-UHFFFAOYSA-N spiromesifen Chemical compound CC1=CC(C)=CC(C)=C1C(C(O1)=O)=C(OC(=O)CC(C)(C)C)C11CCCC1 GOLXNESZZPUPJE-UHFFFAOYSA-N 0.000 claims description 5
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- 101710182628 DNA fragmentation factor subunit alpha Proteins 0.000 description 3
- 238000004904 shortening Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- INQLNSVYIFCUML-QZTLEVGFSA-N [[(2r,3s,4r,5r)-5-(6-aminopurin-9-yl)-3,4-dihydroxyoxolan-2-yl]methoxy-hydroxyphosphoryl] [(2r,3s,4r,5r)-5-(4-carbamoyl-1,3-thiazol-2-yl)-3,4-dihydroxyoxolan-2-yl]methyl hydrogen phosphate Chemical compound NC(=O)C1=CSC([C@H]2[C@@H]([C@H](O)[C@@H](COP(O)(=O)OP(O)(=O)OC[C@@H]3[C@H]([C@@H](O)[C@@H](O3)N3C4=NC=NC(N)=C4N=C3)O)O2)O)=N1 INQLNSVYIFCUML-QZTLEVGFSA-N 0.000 description 2
- 230000008676 import Effects 0.000 description 2
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Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
- G11C29/42—Response verification devices using error correcting codes [ECC] or parity check
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
- G06F11/106—Correcting systematically all correctable errors, i.e. scrubbing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40603—Arbitration, priority and concurrent access to memory cells for read/write or refresh operations
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40615—Internal triggering or timing of refresh, e.g. hidden refresh, self refresh, pseudo-SRAMs
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C2211/406—Refreshing of dynamic cells
- G11C2211/4062—Parity or ECC in refresh operations
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Dram (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Abstract
Description
Claims (18)
Applications Claiming Priority (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2001358102A JP3938298B2 (ja) | 2001-11-22 | 2001-11-22 | パリティセルアレイを有するメモリ回路 |
JP358102/2001 | 2001-11-22 | ||
JP358102/01 | 2001-11-22 | ||
JP374136/2001 | 2001-12-07 | ||
JP374136/01 | 2001-12-07 | ||
JP2001374136A JP2003173698A (ja) | 2001-12-07 | 2001-12-07 | 半導体メモリ |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1421871A CN1421871A (zh) | 2003-06-04 |
CN1255818C true CN1255818C (zh) | 2006-05-10 |
Family
ID=26624665
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB021528535A Expired - Fee Related CN1255818C (zh) | 2001-11-22 | 2002-11-21 | 具有奇偶校验单元阵列的存储电路 |
Country Status (6)
Country | Link |
---|---|
US (1) | US7032142B2 (zh) |
EP (2) | EP1746606B1 (zh) |
KR (2) | KR100864035B1 (zh) |
CN (1) | CN1255818C (zh) |
DE (2) | DE60234076D1 (zh) |
TW (1) | TW569235B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105807201B (zh) * | 2014-12-17 | 2018-09-28 | 力晶科技股份有限公司 | 芯片可靠度的测试板及其测试*** |
Families Citing this family (57)
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KR100482380B1 (ko) * | 2002-11-11 | 2005-04-14 | (주)실리콘세븐 | 메모리 뱅크별 기입 동작의 수행이 가능한 에스램 호환 메모리 및 그 구동방법 |
US7447950B2 (en) * | 2003-05-20 | 2008-11-04 | Nec Electronics Corporation | Memory device and memory error correction method |
US7191379B2 (en) * | 2003-09-10 | 2007-03-13 | Hewlett-Packard Development Company, L.P. | Magnetic memory with error correction coding |
KR100511047B1 (ko) | 2003-12-08 | 2005-08-30 | 삼성전자주식회사 | 반도체 메모리 테스트 방법 및 이를 수행하기 위한 장치,테스트용 반도체 메모리 |
JP2005203064A (ja) * | 2004-01-19 | 2005-07-28 | Toshiba Corp | 半導体記憶装置 |
JP4569182B2 (ja) * | 2004-03-19 | 2010-10-27 | ソニー株式会社 | 半導体装置 |
JP4578226B2 (ja) * | 2004-12-17 | 2010-11-10 | 富士通セミコンダクター株式会社 | 半導体メモリ |
JP2006179057A (ja) * | 2004-12-21 | 2006-07-06 | Fujitsu Ltd | 半導体メモリ |
JP4980565B2 (ja) * | 2004-12-21 | 2012-07-18 | 富士通セミコンダクター株式会社 | 半導体メモリ |
US20060156131A1 (en) * | 2004-12-24 | 2006-07-13 | Yonsei University | Method of reducing hardware overhead upon generation of test pattern in built-in sef test |
US20060218467A1 (en) * | 2005-03-24 | 2006-09-28 | Sibigtroth James M | Memory having a portion that can be switched between use as data and use as error correction code (ECC) |
US7382673B2 (en) * | 2005-06-15 | 2008-06-03 | Infineon Technologies Ag | Memory having parity generation circuit |
JP4864395B2 (ja) * | 2005-09-13 | 2012-02-01 | 株式会社東芝 | 半導体記憶装置 |
KR100644223B1 (ko) * | 2005-12-06 | 2006-11-10 | 삼성전자주식회사 | 리프레쉬 전류소모를 최소화하는 반도체 메모리 장치 및이에 대한 구동방법 |
US9098641B1 (en) * | 2006-01-30 | 2015-08-04 | Cypress Semiconductor Corporation | Configurable bus |
JP2007207319A (ja) * | 2006-01-31 | 2007-08-16 | Toshiba Corp | 半導体記憶装置 |
US7779334B2 (en) | 2006-06-26 | 2010-08-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Memory having an ECC system |
JP2008034081A (ja) * | 2006-07-07 | 2008-02-14 | Elpida Memory Inc | 半導体記憶装置 |
JP2008059711A (ja) * | 2006-09-01 | 2008-03-13 | Toshiba Corp | 半導体記憶装置 |
DE602006019010D1 (de) * | 2006-10-20 | 2011-01-27 | Fujitsu Ltd | Speicheranordnung und auffrisch-justierverfahren |
JP4652308B2 (ja) * | 2006-10-27 | 2011-03-16 | 富士通テン株式会社 | エラー検出システム及びエラー検出方法 |
KR100852191B1 (ko) * | 2007-02-16 | 2008-08-13 | 삼성전자주식회사 | 에러 정정 기능을 가지는 반도체 메모리 장치 및 에러 정정방법 |
US7474574B1 (en) * | 2007-07-02 | 2009-01-06 | International Business Machines Corporation | Shift register latch with embedded dynamic random access memory scan only cell |
JP2009093714A (ja) * | 2007-10-04 | 2009-04-30 | Panasonic Corp | 半導体記憶装置 |
US8238140B2 (en) * | 2008-01-07 | 2012-08-07 | The New Industry Research Organization | Semiconductor memory and program |
US8195978B2 (en) | 2008-05-16 | 2012-06-05 | Fusion-IO. Inc. | Apparatus, system, and method for detecting and replacing failed data storage |
US8214699B2 (en) * | 2008-06-27 | 2012-07-03 | International Business Machines Corporation | Circuit structure and method for digital integrated circuit performance screening |
US8352781B2 (en) * | 2008-07-04 | 2013-01-08 | Stmicroelectronics International N.V. | System and method for efficient detection and restoration of data storage array defects |
US8281227B2 (en) | 2009-05-18 | 2012-10-02 | Fusion-10, Inc. | Apparatus, system, and method to increase data integrity in a redundant storage system |
US8307258B2 (en) | 2009-05-18 | 2012-11-06 | Fusion-10, Inc | Apparatus, system, and method for reconfiguring an array to operate with less storage elements |
KR101653568B1 (ko) * | 2009-07-03 | 2016-09-02 | 삼성전자주식회사 | 부분 셀프 리플레시 모드에서 전류 소모를 줄일 수 있는 반도체 메모리 장치 |
CN102376722A (zh) * | 2010-08-16 | 2012-03-14 | 英属开曼群岛商恒景科技股份有限公司 | 感测装置及其制造方法 |
JP5606880B2 (ja) * | 2010-11-11 | 2014-10-15 | ピーエスフォー ルクスコ エスエイアールエル | 半導体記憶装置 |
TWI459394B (zh) * | 2011-01-03 | 2014-11-01 | Etron Technology Inc | 產生記憶體晶片的測試樣式的裝置及其方法 |
EP2590080B1 (en) * | 2011-11-02 | 2014-09-03 | Renesas Electronics Europe Limited | Error correction |
US9619318B2 (en) | 2013-02-22 | 2017-04-11 | Intel Deutschland Gmbh | Memory circuits, method for accessing a memory and method for repairing a memory |
US9690650B2 (en) * | 2013-03-11 | 2017-06-27 | Macronix International Co., Ltd. | Storage scheme for built-in ECC operations |
KR101524535B1 (ko) * | 2013-05-28 | 2015-06-01 | 중소기업은행 | Ecc 내장 메모리의 메인 어레이 및 ecc 셀-어레이 테스트 방법 |
US9424953B2 (en) | 2013-06-20 | 2016-08-23 | Samsung Electronics Co., Ltd. | Semiconductor memory device including repair circuit |
KR102254102B1 (ko) * | 2015-01-23 | 2021-05-20 | 삼성전자주식회사 | 메모리 시스템 및 메모리 시스템의 동작 방법 |
CN107077882B (zh) * | 2015-05-04 | 2023-03-28 | 华为技术有限公司 | 一种dram刷新方法、装置和*** |
KR20170051039A (ko) * | 2015-11-02 | 2017-05-11 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그 구동 방법 |
KR102406267B1 (ko) | 2015-11-19 | 2022-06-08 | 삼성전자주식회사 | 불휘발성 메모리 모듈 및 이를 포함하는 전자 장치 |
JP6915372B2 (ja) * | 2017-05-16 | 2021-08-04 | 富士通株式会社 | メモリセル、メモリモジュール、情報処理装置およびメモリセルのエラー訂正方法 |
US10564856B2 (en) * | 2017-07-06 | 2020-02-18 | Alibaba Group Holding Limited | Method and system for mitigating write amplification in a phase change memory-based storage device |
KR102420641B1 (ko) * | 2017-12-15 | 2022-07-14 | 에스케이하이닉스 주식회사 | 에러정정방법 및 이를 이용한 반도체장치 |
KR20190086936A (ko) * | 2018-01-15 | 2019-07-24 | 삼성전자주식회사 | 메모리 장치 |
JP2019168749A (ja) | 2018-03-22 | 2019-10-03 | ソニーセミコンダクタソリューションズ株式会社 | 記憶制御回路、記憶装置、撮像装置、および、記憶制御方法 |
KR20200119613A (ko) * | 2019-04-10 | 2020-10-20 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 및 그의 동작 방법 |
KR20210093610A (ko) * | 2020-01-20 | 2021-07-28 | 에스케이하이닉스 주식회사 | 비휘발성 메모리 장치 및 그것을 포함하는 메모리 시스템 |
TWI719841B (zh) * | 2020-02-25 | 2021-02-21 | 世界先進積體電路股份有限公司 | 測試電路及電子裝置 |
US11177002B1 (en) * | 2020-06-30 | 2021-11-16 | Sandisk Technologies Llc | Programming memory cells using encoded TLC-fine |
JP7143463B2 (ja) | 2021-02-26 | 2022-09-28 | 華邦電子股▲ふん▼有限公司 | 半導体記憶装置 |
CN116343891A (zh) * | 2021-12-23 | 2023-06-27 | 长鑫存储技术有限公司 | 存储块以及存储器 |
CN114999558B (zh) * | 2022-08-03 | 2022-11-29 | 合肥康芯威存储技术有限公司 | 一种存储芯片的测试方法及*** |
CN115083507B (zh) * | 2022-08-18 | 2022-11-01 | 中国电子科技集团公司第五十八研究所 | 一种对存储器ecc校验位存储阵列的测试方法 |
US11955989B2 (en) * | 2022-08-21 | 2024-04-09 | Nanya Technology Corporation | Memory device and test method thereof |
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EP0054023A1 (en) | 1980-06-02 | 1982-06-23 | Mostek Corporation | Semiconductor memory for use in conjunction with error detection and correction circuit |
JPS61134988A (ja) * | 1984-12-04 | 1986-06-23 | Toshiba Corp | 半導体メモリにおける誤り検出訂正機能制御系 |
JPS6257194A (ja) * | 1985-09-05 | 1987-03-12 | Mitsubishi Electric Corp | 二重化メモリ装置 |
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JPH04132093A (ja) * | 1990-09-21 | 1992-05-06 | Toshiba Corp | 半導体記憶装置 |
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US5842033A (en) * | 1992-06-30 | 1998-11-24 | Discovision Associates | Padding apparatus for passing an arbitrary number of bits through a buffer in a pipeline system |
JPH0668700A (ja) * | 1992-08-21 | 1994-03-11 | Toshiba Corp | 半導体メモリ装置 |
JPH10214206A (ja) * | 1997-01-31 | 1998-08-11 | Nec Corp | 情報処理装置 |
KR100266748B1 (ko) * | 1997-12-31 | 2000-10-02 | 윤종용 | 반도체 메모리 장치 및 그 장치의 에러 정정 방법 |
US6185718B1 (en) * | 1998-02-27 | 2001-02-06 | International Business Machines Corporation | Memory card design with parity and ECC for non-parity and non-ECC systems |
-
2002
- 2002-10-17 US US10/271,533 patent/US7032142B2/en not_active Expired - Fee Related
- 2002-10-22 TW TW091124393A patent/TW569235B/zh not_active IP Right Cessation
- 2002-10-22 DE DE60234076T patent/DE60234076D1/de not_active Expired - Lifetime
- 2002-10-22 EP EP06021810A patent/EP1746606B1/en not_active Expired - Fee Related
- 2002-10-22 DE DE60235846T patent/DE60235846D1/de not_active Expired - Lifetime
- 2002-10-22 EP EP02257328A patent/EP1315176B1/en not_active Expired - Fee Related
- 2002-11-14 KR KR1020020070670A patent/KR100864035B1/ko not_active IP Right Cessation
- 2002-11-21 CN CNB021528535A patent/CN1255818C/zh not_active Expired - Fee Related
-
2008
- 2008-08-01 KR KR1020080075614A patent/KR100901404B1/ko not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105807201B (zh) * | 2014-12-17 | 2018-09-28 | 力晶科技股份有限公司 | 芯片可靠度的测试板及其测试*** |
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EP1315176A2 (en) | 2003-05-28 |
TW569235B (en) | 2004-01-01 |
DE60235846D1 (de) | 2010-05-12 |
KR20080077948A (ko) | 2008-08-26 |
US7032142B2 (en) | 2006-04-18 |
KR100864035B1 (ko) | 2008-10-16 |
CN1421871A (zh) | 2003-06-04 |
EP1746606A3 (en) | 2007-03-07 |
EP1315176B1 (en) | 2009-10-21 |
US20030106010A1 (en) | 2003-06-05 |
EP1746606B1 (en) | 2010-03-31 |
EP1746606A2 (en) | 2007-01-24 |
KR100901404B1 (ko) | 2009-06-05 |
EP1315176A3 (en) | 2006-01-11 |
KR20030043658A (ko) | 2003-06-02 |
DE60234076D1 (de) | 2009-12-03 |
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