CN1244141C - 薄膜结构体及其制造方法 - Google Patents

薄膜结构体及其制造方法 Download PDF

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CN1244141C
CN1244141C CNB01816238XA CN01816238A CN1244141C CN 1244141 C CN1244141 C CN 1244141C CN B01816238X A CNB01816238X A CN B01816238XA CN 01816238 A CN01816238 A CN 01816238A CN 1244141 C CN1244141 C CN 1244141C
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forms
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CN1466773A (zh
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奥村美香
堀川牧夫
石桥清志
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Mitsubishi Electric Corp
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Abstract

本发明是关于一种基底及其制造方法,以及薄膜结构体,其目的在提供一种可减低热收缩时基底的氧化膜与形成于该氧化膜上的其他薄膜之间所产生的应力差,同时可缩短较厚的氧化膜形成时所需的成膜时间的基底及其制造方法,以及薄膜结构体。此外,为达成前述目的,本发明的基底(1)具备有:由硅所形成的基底本体(31);以及形成于其上的基台用的氧化膜(33)。氧化膜(33)则具备有:由使基底本体(31)中的硅元素热氧化而形成的热SiO2膜所构成的第1氧化膜(61);以及由在此氧化膜之上堆积而形成的高温氧化膜所构成的第2氧化膜(63)。

Description

薄膜结构体及其制造方法
[技术领域]
本发明是有关一种基底及其制造方法,以及薄膜结构体,尤指用在加速度传感器的基底及其制造方法,以及薄膜结构体。
[技术背景]
本发明是适用在基底上,此基底具备有:以硅为主成份而形成的基底本体;以及形成于该基底本体上的基台用氧化膜。在此种基底上,由于氧化膜与形成于该氧化膜上的其它薄膜的热收缩特性的差异,例如经退火(anneal)处理后,会在氧化膜与其它薄膜之间产生应力差,藉由此应力差,而有可能使氧化膜、或是其它薄膜、或是氧化膜及其它薄膜双方产生裂纹。
有关此种以往的基底中的基台用氧化膜,是由基底本体中的硅被热氧化而形成的热SiO2膜所形成。此外,以此方式形成的以往的基底中,具有一问题点亦即:当热收缩时,会使得在酸SiO2膜与形成于其上的其他薄膜之间所产生的应力差容易变大。此外,当使基台用的氧化膜的膜层厚度加厚时,由于伴随着膜层厚度增大会使热氧化的效率降低,因此会产生需要长时间来形成氧化膜的问题。
[发明内容]
本发明是为解决前述问题点而开发,其目的在提供一种基底及其制造方法,以及薄膜结构体,使于热收缩时,基底的氧化膜与形成于该氧化膜上的其它薄膜之间所产生的应力差得以降低,同时可缩短较厚的氧化膜形成时所需的成膜时间。
本发明的第1方式中,提供一种薄膜结构体,具备有:以硅为主成份而形成的基底本体;藉由使所述基底本体所包含的所述硅热氧化而形成于所述基底本体上的第1氧化膜;在所述第1氧化膜上,堆积TEOS氧化膜而形成的第2氧化膜;在所述第2氧化膜的上方,与所述第2氧化膜隔着间隔而形成的薄膜体;以及在所述第2氧化膜上形成的支撑所述薄膜体的支撑部。
本发明的第2方式中,提供一种薄膜结构体,具备有:以硅为主成份而形成的基底本体;藉由使所述基底本体所包含的所述硅热氧化而形成于所述基底本体上的第1氧化膜;在所述第1氧化膜上,堆积高温氧化膜而形成的第2氧化膜;在所述第2氧化膜的上方,与所述第2氧化膜隔着间隔而形成的薄膜体;以及在所述第2氧化膜上形成的支撑所述薄膜体的支撑部。
在上述的薄膜结构体中,所述薄膜体是通过将在所述第2氧化膜上所形成的牺牲膜去除,与所述第2氧化膜隔着既定间隔而配置成的薄膜体。
在上述的薄膜结构体中,所述基底本体、所述第1氧化膜及所述第2氧化膜是构成加速度传感器中所具备的传感器基底;所述薄膜体则构成所述加速度传感器中所具备的具加速度检测功能的传感器部的至少一部分。
本发明的薄膜结构体的制造方法的第1方式中,包括:在以硅为主成份而形成的基底(31)上,藉由使前述基底本体中的前述硅热氧化,而形成第1氧化膜(48)的工序;在前述第1氧化膜上,堆积TEOS氧化膜而形成第2氧化膜(49)的工序;在所述第2氧化膜的上方,与所述第2氧化膜隔着间隔而形成薄膜体;以及在所述第2氧化膜上形成支撑所述薄膜体的支撑部。
本发明的薄膜结构体的制造方法的第2方式中,包括有:在以硅为主成份而形成的基底本体(31)上,藉由使前述基底本体中的前述硅热氧化,而形成第1氧化膜(61)的工序;在前述第1氧化膜上,堆积高温氧化膜而形成第2氧化膜(63)的工序;在所述第2氧化膜的上方,与所述第2氧化膜隔着间隔而形成薄膜体;以及在所述第2氧化膜上形成支撑所述薄膜体的支撑部。
依据此等方式,在热收缩时,第1及第2两氧化膜所互相波及的应力会互相朝反方向进行,而使两者之间的应力互相抵消,故可降低第1及第2氧化膜与形成于该氧化膜上的其它薄膜之间所产生的应力差,其结果,可防止裂缝的产生。
此外,由于使基底本体中的硅热氧化以形成第1氧化膜,且在其上堆积TEOS氧化膜或是高温氧化膜以形成第2氧化膜,因此在形成厚膜的基台用氧化膜时,和仅藉由第1氧化膜来形成基台用氧化膜的构成相较之下,可缩短成膜所需的时间。
此外,当藉由第2氧化膜形成高温氧化膜时,和藉由TEOS氧化膜来形成第2氧化膜时相较之下,可形成绝缘性更高的基台用氧化膜。
有关本发明的目的、特征、方式、以及优点,可依据以下详细说明及附图更加明了。
[附图说明]
图1是表示使用本发明的第1实施形式的基底的半导体加速度传感器的主要部位构成的俯视图。
图2是表示图1中的A-A剖面的剖视图。
图3至图5是表示图2中所示的结构的制造工序的剖视图。
图6是表示将本发明的第2实施形式的基底使用在图1的半导体加速度传感器时的图1的A-A剖视图。
[具体实施方式]
1.第1实施形式
如图1及图2所示,使用本发明的第1实施形式的基底的半导体加速度传感器,其具备有:作为传感器基底的基底1;形成于该基底1上,具加速度检测功能的传感器部3。
传感器部3如图1所示,具备有:作为可动电极功能使用的质量体21;复数个固定电极23;复数个梁25。质量体21、固定电极23、以及梁25相当于本发明的薄膜体,是在导电材料例如多晶硅中,掺杂了杂质例如磷的掺杂多晶硅而形成。
质量体21是与基底1隔着既定间隔而配置,且具有沿着与应检测的加速度方向B垂直的方向C而延伸的复数个可动电极部21a。梁25则与质量体21形成为一体,且具有于基底1上使质量体21产生复原力,并使其可朝方向B移动的悬架功能。各个梁25具备有:从基底1上突出的支撑部25a;与该支撑部25a相结合的结合部25b;在该结合部25b与质量体21的方向B的端缘处之间所设置的弹簧部25c。藉由此弹簧部25c做弹性地弯曲变形,可使沿着结合部25b与质量体21之间的方向B的距离加以扩大或缩小。
各固定电极23朝方向B互相隔着既定间隔,而沿着方向C设置。此外,固定电极23具备有:从基底1隔着既定间隔而配置的作为浮动部的固定电极部23a;对该固定电极部23a加以支撑的支撑部23b。
以此形式构成的各固定电极23的固定电极部23a与质量体21的可动电极部21a,在方向B隔着既定间隔交互配置,以构成电容器。
此外,藉由可动电极部21a的移动,根据其所产生的该电容器的容量变化,对加速度进行检测。
基底1如图1及图2所示,具备有:由硅所形成的基底本体31;于基底本体31上所形成的作为第1绝缘膜的基台用氧化膜33;于氧化膜33上选择性地形成的复数个配线41、43、45;将配线41、43、45的表面及硅氧化膜的表面选择性地覆盖的作为第2绝缘膜的氮化膜47。
氧化膜33具备有:由形成于基底本体31上的热SiO2膜所构成的第1氧化膜48;由形成于第1氧化膜48上的原硅酸四乙酯TEOS(tetraethyl orthosilicate)氧化膜所构成的第2氧化膜49。
在此,由于是将热SiO2膜以及TEOS氧化膜加以层积而形成氧化膜33,因此与仅以热SiO2膜来形成氧化膜33的情况相较之下,在热收缩时,可减低氧化膜33与形成于其上的氮化膜47或是形成于该氮化膜47上的后述的牺牲(sacrifice)膜51之间所产生的应力差。此乃由于热收缩时,热SiO2膜与TEOS氧化膜相互波及的应力会互相朝反方向进行,故可将两者之间的应力互相抵消。
此外,尚有一特性即:由于热SiO2膜是由基底本体31中的硅,与从其外部所供给的氧产生反应而形成,故当膜层厚度薄时,虽能以高速形成,但随着其膜层厚度的增大,而使反应效率降低,且于每单位时间所能形成的膜层厚度会变小。并且热SiO2膜较TEOS氧化膜具更高的绝缘性。
氧化膜33的膜层厚度被设定成较厚,例如20000至25000。而两氧化膜48、49的膜层厚度比,可任意设定。若重视降低应力差以及成膜效率的提升的话,例如可将第1氧化膜48的膜层厚度设定为10000,而将第2氧化膜49的膜层厚度设定为10000至15000。此外,若重视氧化膜33的绝缘性的提升的话,例如可将第1氧化膜48的膜层厚度设定为17000,而将第2氧化膜49的膜层厚度设定为8000。
配线41具备有:在与基底1上的质量体21相对向的领域中,以露出于基底1的状态而配置的露出部41a;配置于支撑部25a的下方,且与支撑部25a作电性连接的接点部41b。配线43、45将来自固定电极23的信号取出,通过该接点部43a、45a而连接至各固定电极23。以此所构成的配线41、43、45被埋入形成于氧化膜33的第2氧化膜49表面的沟槽33a内。
对应于此,在氮化膜47处,设置有开窗部47a以及孔部47b、47c。通过开窗部47a,配线41的露出部41a露出至基底1上的同时,接点部41a与支撑部25a作电性连接。通过孔部47b、47c,配线43、45的接点部43a、45a与固定电极23作电性连接。
对应于此种半导体加速度传感器的构成,在本实施形式中,藉由以下的制造方法,可制造出半导体加速度传感器。
首先,如图3所示,在基底本体1之上,藉由使基底本体1中的硅热氧化,而形成由热SiO2膜所构成的第1氧化膜48。接着,在第1氧化膜48之上,将TEOS氧化膜堆积而形成第2氧化膜49。此TEOS氧化膜,是藉由使用TEOS气体的CVD而形成。
接着,于此第2氧化膜49的表面形成沟槽33a,而在此沟槽33a内侧形成有配线41、43、45。然后,在该配线41、43、45的表面上以及露出的第2氧化膜47的表面上形成有氮化膜47,将该氮化膜47部分地去除,而在氮化膜47形成有开窗部47a及孔部47b、47c。其结果,在A-A位置处可得到如图4所示的结构。
接蓍,在如此所构成的基底1上,如图5所示,例如由硅氧化膜而形成牺牲膜51。然后,将应形成支撑部25a、23b的牺牲膜51的部分选择性地去除,以形成固定孔部(anchor hole)51a,在所残留的牺牲膜51上以及通过固定孔部51a所露出的基底1上,藉由导电材料例如掺杂多晶硅而形成薄膜层53。
接着,将薄膜层53选择性地去除并图案化,再藉由该薄膜层53所残留的部分,来形成质量体21、梁25、以及固定电极23。此时,其所残留的部分当中的固定孔部51a之内所嵌入的部分成为支撑部25a、23b,而位于牺牲膜51上的部分则成为质量体21、弹簧部25c、结合部25b、以及固定电极部23a。然后藉由蚀刻处理将牺牲膜51除去,则可得如图1及图2中所示的结构。
如以上的构成,依据本实施形式,在热收缩时,第1及第2两氧化膜相互波及的应力会互相朝反方向进行,而使两者之间的应力互相抵消,故可降低基台用的氧化膜33与形成于其上的氧化膜47、或是形成于该氮化膜47之上的牺牲膜51之间所产生的应力差,其结果,可防止裂缝的产生。
此外,由于是将基底本体31中的硅热氧化而形成第1氧化膜48,以及在其上将TEOS氧化膜堆积而形成第2氧化膜49,故在厚膜即氧化膜33的形成工序中,和仅以第1氧化膜48来形成氧化膜33的结构相较,可缩短成膜所需的时间。
2.第2实施形式
本发明的第2实施形式的基底1与前述第1实施形式的基底1,其实质上的相异点仅在于,氧化膜33的构成以及制造方法不同。因此,本发明的第2实施形式的基底1与前述第1实施形式的基底1,其互相对应的部分,将标以相同的元件符号,并省略该部分的说明。
本发明的第2实施形式的基底1,是如图6所示,氧化膜33具备有:由形成于基底本体31上的热SiO2膜所构成的第1氧化膜61;由第1氧化膜61上堆积形成的高温氧化膜所构成的第2氧化膜63。第1氧化膜61的制法与前述的第2氧化膜48的制法相同。而第2氧化膜49的制法,例如在减压、850℃之下,藉由使用氢化硅(硅烷)是气体的CVD,将高温氧化膜堆积而形成。
在本发明的第2实施形式中,氧化膜33的膜层厚度被设定成较厚,例如设定为25000。而两氧化膜61、63的膜层厚度比,可任意设定。例如,将第1氧化膜61的膜层厚度与第2氧化膜63的膜层厚度之比,设定为7比3。
此外,形成两氧化膜61、63的热SiO2膜与高温氧化膜,其乃具有热收缩时使互相朝反方向的应力相波及,以抵消互相之间应力的关系。
藉此,在本发明的第2实施形式中,大致与前述第1实施形式同样地,可实现应力差的降低以及氧化膜33的成膜工序的工期缩短。
此外,第2绝缘膜63是由较TEOS氧化膜具更佳的绝缘性的高温氧化膜所形成,故可形成绝缘性更高的氧化膜33。
以上虽就本发明加以详细说明,但前述的说明是在所有的方式中的例示,本发明并非仅限于此。尚未例示的无数个变形例,只要不脱离本发明的范围即可思及得知。

Claims (6)

1.一种薄膜结构体,具备有:
以硅为主成份而形成的基底本体;
藉由使所述基底本体所包含的所述硅热氧化而形成于所述基底本体上的第1氧化膜;
在所述第1氧化膜上,堆积TEOS氧化膜而形成的第2氧化膜;
在所述第2氧化膜的上方,与所述第2氧化膜隔着间隔而形成的薄膜体;以及
在所述第2氧化膜上形成的支撑所述薄膜体的支撑部。
2.一种薄膜结构体,具备有:
以硅为主成份而形成的基底本体;
藉由使所述基底本体所包含的所述硅热氧化而形成于所述基底本体上的第1氧化膜;
在所述第1氧化膜上,堆积高温氧化膜而形成的第2氧化膜;
在所述第2氧化膜的上方,与所述第2氧化膜隔着间隔而形成的薄膜体;以及
在所述第2氧化膜上形成的支撑所述薄膜体的支撑部。
3.根据权利要求1或2所述的薄膜结构体,其特征在于,所述薄膜体是通过将在所述第2氧化膜上所形成的牺牲膜去除,与所述第2氧化膜隔着既定间隔而配置成的薄膜体。
4.根据权利要求3的薄膜结构体,其特征在于,所述基底本体、所述第1氧化膜及所述第2氧化膜是构成加速度传感器中所具备的传感器基底;
所述薄膜体则构成所述加速度传感器中所具备的具加速度检测功能的传感器部的至少一部分。
5.一种薄膜结构体的制造方法,包括:
在以硅为主成份而形成的基底本体上,藉由使所述基底本体中的所述硅热氧化,而形成第1氧化膜的工序;
在所述第1氧化膜上,堆积TEOS氧化膜而形成第2氧化膜的工序;
在所述第2氧化膜的上方,与所述第2氧化膜隔着间隔而形成薄膜体;以及
在所述第2氧化膜上形成支撑所述薄膜体的支撑部。
6.一种薄膜结构体的制造方法,包括:
在以硅为主成份而形成的基底本体上,藉由使所述基底本体中的所述硅热氧化,而形成第1氧化膜的工序;
在所述第1氧化膜上,堆积高温氧化膜而形成第2氧化膜的工序;
在所述第2氧化膜的上方,与所述第2氧化膜隔着间隔而形成薄膜体;以及
在所述第2氧化膜上形成支撑所述薄膜体的支撑部。
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