CN117017308B - Slow wave neural signal amplifying circuit - Google Patents
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Abstract
The present application relates to a slow wave neural signal amplification circuit, wherein the slow wave neural signal amplification circuit includes: the filtering unit comprises a capacitor and a pseudo resistor; one end of the capacitor is used as a signal input end, the other end of the capacitor is connected with the first end of the pseudo resistor and the input end of the amplifying unit, and the capacitor couples an input signal to the amplifying unit; the second end of the pseudo resistor is connected with a common mode voltage, and the first end of the pseudo resistor is connected with the input end of the amplifying unit to provide bias voltage for the amplifying unit; and setting the impedance value of the pseudo resistor to enable the filter cutoff frequency of the filter unit to reach a target value, obtaining a filter signal, and amplifying the filter signal. According to the method and the device, the problem that the impedance of the pseudo resistor connected across the input end and the output end in the traditional brain-computer interface signal acquisition circuit is unstable is solved, and the high-pass cut-off frequency is greatly reduced by adopting an input bias method, so that the acquisition of slow wave nerve signals is facilitated.
Description
Technical Field
The application relates to the technical field of integrated circuits, in particular to a slow wave neural signal amplifying circuit.
Background
Brain science research has long been an important field of research in bioscience. In recent years, many researches have been focused on brain signal analysis methods to understand brain activities and restore brain working mechanisms. With the prosperous development of various subjects and fields such as neuroscience, biological materials, sensors, big data, artificial intelligence and the like, brain-computer interface technology has entered a rapid development era. The brain-computer interface technology establishes a novel approach for communication, information transmission and control between the brain and the outside. The brain-computer interface technology directly connects the brain with external equipment, does not depend on muscles or other transmission nerves, and establishes an interaction bridge between nerve tissues and entity equipment, thereby realizing the functions of controlling, monitoring, editing, modifying and the like of brain electrical signals.
In the signal acquisition process in the traditional brain-computer interface technology, a pseudo resistor connected across an input end and an output end is adopted to provide high-pass cut-off frequency for a circuit, but an amplifying unit in the circuit amplifies signals, so that voltage difference between two ends of the pseudo resistor connected across the input end and the output end is large, and impedance of the pseudo resistor is reduced in the acquisition process; meanwhile, the impedance of the pseudo resistor is determined according to the terminal voltage of two ends and is very sensitive, so that the pseudo resistor with lower impedance connected across the input end and the output end is used in the signal acquisition circuit, and is not beneficial to acquiring the slow wave nerve signals.
Aiming at the problems that the signal acquisition circuit in the related art uses a pseudo resistor with lower impedance connected across an input end and an output end, which is not beneficial to acquiring the slow wave nerve signals, no effective solution is proposed at present.
Disclosure of Invention
In this embodiment, a slow-wave neural signal amplifying circuit is provided to solve the problem that in the related art, a pseudo resistor connected across an input end and an output end is used in a signal acquisition circuit, which is not beneficial to acquiring a slow-wave neural signal.
In a first aspect, in this embodiment, there is provided a slow wave neural signal amplifying circuit, the signal amplifying circuit including a filter unit and an amplifying unit, the filter unit including a capacitor and a pseudo resistor;
one end of the capacitor is used as a signal input end, the other end of the capacitor is connected with the first end of the pseudo resistor, the other end of the capacitor is also connected with the input end of the amplifying unit, the capacitor couples an input signal to the amplifying unit, and the output end of the amplifying unit is used as a signal output end;
the second end of the pseudo resistor is connected with a common mode voltage, the first end of the pseudo resistor is connected with the input end of the amplifying unit, and the pseudo resistor provides bias voltage for the amplifying unit; the voltage values of the first end and the second end of the pseudo resistor are the same;
and setting the impedance value of the pseudo resistor to enable the filter cutoff frequency of the filter unit to reach a target value, obtaining a filter signal, and amplifying the filter signal through the amplifying unit.
In some of these embodiments, the amplifying unit comprises an amplifier and a collector; the amplifier is connected with the collector;
one end of the amplifying unit is connected with the other end of the capacitor, and the other end of the amplifying unit is used as a signal output end;
the input end of the amplifier is connected with the other end of the capacitor, and the output end of the collector is used as a signal output end; the amplifying unit amplifies the difference value of the input signals through an amplifier, and extracts common mode potential through the collector to form common mode feedback.
In some of these embodiments, the signal amplification circuit further comprises a feedback unit;
one end of the feedback unit is connected with the output end of the amplifying unit, and the other end of the feedback unit is connected with the input end of the amplifying unit;
the feedback unit feeds back the output voltage of the amplifying unit to the input end of the amplifying unit.
In some of these embodiments, the signal amplification circuit further comprises: an impedance boosting unit;
one end of the impedance lifting unit is connected with the output end of the amplifying unit, and the output end of the impedance lifting unit is connected with the input end of the capacitor;
the impedance boosting unit is used for boosting the input impedance of the slow wave neural signal amplifying circuit through a positive feedback network.
In some of these embodiments, the signal amplification circuit further comprises: an analog-to-digital conversion unit;
the input end of the analog-to-digital conversion unit is connected with the output end of the amplifying unit;
the input end of the analog-to-digital conversion unit receives the analog signal output by the amplifying unit and converts the analog signal into a digital signal.
In some embodiments, the filtering unit includes a plurality of dummy resistors, and third ends of the plurality of dummy resistors are connected to each other.
In some of these embodiments, the amplifying unit is a fully differential amplifier.
In some embodiments, the signal amplifying circuit further includes a control unit, where the control unit is connected to the filtering unit, and the control unit is configured to reset the pseudo resistor.
In a second aspect, in the present embodiment, there is provided a slow-wave nerve signal processing device including a signal collection electrode and the slow-wave nerve signal amplification circuit as described in the first aspect, the signal collection electrode being connected to the slow-wave nerve signal amplification circuit.
Compared with the related art, the slow-wave nerve signal amplifying circuit provided in the embodiment has the advantages that two ends of the pseudo resistor are respectively connected to the input end of the amplifier circuit, so that the fluctuation of signals at the two ends of the pseudo resistor is smaller, the impedance of the pseudo resistor is more stable, the slow-wave nerve signals are filtered and amplified according to the stable pseudo resistor impedance and the amplifying unit, the bandwidth for collecting the slow-wave nerve signals is improved, the slow-wave nerve signals are collected, and the problem that the impedance of the pseudo resistor in a traditional signal collecting device is lower is solved.
The details of one or more embodiments of the application are set forth in the accompanying drawings and the description below to provide a more thorough understanding of the other features, objects, and advantages of the application.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiments of the application and together with the description serve to explain the application and do not constitute an undue limitation to the application. In the drawings:
fig. 1 is a schematic diagram of a slow wave neural signal amplifying circuit of the present embodiment;
fig. 2 is a schematic diagram of another slow wave neural signal amplifying circuit of the present embodiment;
fig. 3 is a schematic diagram of another slow wave neural signal amplifying circuit of the present embodiment;
fig. 4 is a schematic diagram of another slow wave neural signal amplifying circuit of the present embodiment;
fig. 5 is a schematic diagram of another slow wave neural signal amplifying circuit of the present embodiment;
fig. 6 is a schematic diagram of another slow wave neural signal amplifying circuit of the present embodiment;
fig. 7 is a circuit diagram of an amplifying unit of the present embodiment;
FIG. 8 is a flow chart of a slow wave neural signal acquisition method of the present embodiment;
FIG. 9 is a schematic diagram of a slow wave neural signal amplifying circuit of the present embodiment;
fig. 10 is a circuit diagram of the slow wave neural signal amplifying circuit of the present embodiment;
fig. 11 is a schematic structural diagram of the pseudo resistance of the present embodiment.
Reference numerals: 1. a filtering unit; 2. an amplifying unit; 11. a capacitor; 12. a dummy resistor; 21. an amplifier; 22. a collector; 3. a feedback unit; 4. an impedance boosting unit; 51. a first filtering unit; 511. a first capacitor; 512. a first dummy resistor; 52. a second filtering unit; 521. a second capacitor; 522. a second dummy resistor; 53. a first feedback unit; 54. a second feedback unit; 55. a first impedance boosting unit; 56. a second impedance boosting unit; 5. an analog-to-digital conversion unit; 6. a control unit; 91. an input capacitance; 92. common mode bias; 94. a fully differential amplifier; 95. a feedback capacitor; 96. an impedance boosting loop.
Detailed Description
For a clearer understanding of the objects, technical solutions and advantages of the present application, the present application is described and illustrated below with reference to the accompanying drawings and examples.
Unless defined otherwise, technical or scientific terms used herein shall have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terms "a," "an," "the," "these," and the like in this application are not intended to be limiting in number, but rather are singular or plural. The terms "comprising," "including," "having," and any variations thereof, as used in the present application, are intended to cover a non-exclusive inclusion; for example, a process, method, and system, article, or apparatus that comprises a list of steps or modules (units) is not limited to the list of steps or modules (units), but may include other steps or modules (units) not listed or inherent to such process, method, article, or apparatus. The terms "connected," "coupled," and the like in this application are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. Reference to "a plurality" in this application means two or more. "and/or" describes an association relationship of an association object, meaning that there may be three relationships, e.g., "a and/or B" may mean: a exists alone, A and B exist together, and B exists alone. Typically, the character "/" indicates that the associated object is an "or" relationship. The terms "first," "second," "third," and the like, as referred to in this application, merely distinguish similar objects and do not represent a particular ordering of objects.
A pseudo resistor is used in the conventional signal acquisition circuit to provide a high-pass cut-off frequency, but the pseudo resistor of the conventional signal acquisition circuit is usually connected across an input end and an output end; at this time, after the signal passes through the amplifier, the amplifier amplifies the signal, for example, the amplification factor of the amplifier is one hundred times, so that the voltage difference between two ends of the pseudo resistor connected across the input end and the output end can be one hundred times.
Therefore, the pseudo resistor is connected across the input positive end and the input negative end, and the problem of the reduction of the pseudo resistor impedance caused by the voltage difference of the two ends of the pseudo resistor in the traditional signal acquisition circuit is solved. Because the acquired signals are signals which are not amplified, the fluctuation of the signals at the two ends of the pseudo resistor is small, the impedance of the obtained pseudo resistor is more stable, the impedance of the pseudo resistor is not greatly changed due to the overlarge fluctuation of the signals at the two ends of the pseudo resistor, and the constant high-pass cut-off frequency in the circuit can be further obtained, meanwhile, the high-pass cut-off frequency is not changed along with the fluctuation of the input signals, and the high-pass cut-off frequency provides the circuit with extremely low high-pass cut-off frequency, so that the lossless acquisition of the slow-wave nerve signals is facilitated.
In this embodiment, a slow wave nerve signal amplifying circuit is provided, fig. 1 is a schematic diagram of the slow wave nerve signal amplifying circuit of this embodiment, and as shown in fig. 1, the slow wave nerve signal amplifying circuit includes a filter unit 1 and an amplifying unit 2, the filter unit 1 includes a capacitor 11 and a pseudo resistor 12; one end of a capacitor 11 is used as a signal input end, the other end of the capacitor 11 is connected with the first end of a pseudo resistor 12, the other end of the capacitor 11 is also connected with the input end of an amplifying unit 2, the capacitor 11 couples an input signal to the amplifying unit 2, and the output end of the amplifying unit 2 is used as a signal output end; the second end of the pseudo resistor 12 is connected with a common mode voltage, the first end of the pseudo resistor 12 is connected with the input end of the amplifying unit 2, and the pseudo resistor 12 provides bias voltage for the amplifying unit 2; the voltage values of the first end and the second end of the pseudo resistor 12 are the same, the filtering unit 1 comprises a plurality of pseudo resistors 12, and third ends of the plurality of pseudo resistors 12 are connected with each other; by setting the impedance value of the dummy resistor 12 so that the filter cutoff frequency of the filter unit 1 reaches the target value, a filter signal is obtained, and the filter signal is amplified by the amplifying unit 2.
Specifically, the slow wave nerve signal amplifying circuit comprises a filtering unit 1 and an amplifying unit 2, wherein a signal input end is connected with one end of a capacitor 11 in the filtering unit 1, the other end of the capacitor 11 is connected with a first end of a pseudo resistor 12 in the filtering unit 1, and the other end of the capacitor 11 is also connected with an input end of the amplifying unit 2; the first end of the pseudo resistor 12 is also connected with the amplifying unit 2, the second end of the pseudo resistor 12 is connected with a common mode voltage, the common mode voltage provides voltage for one end of the pseudo resistor 12, and meanwhile, the voltage values of the first end and the second end of the pseudo resistor 12 are the same; third terminals of the plurality of dummy resistors 12 included in the filtered signal are connected to each other; after the collected slow-wave nerve signals are input to the nerve amplifying circuit, the input signals pass through the filter unit 1 formed by the capacitor 11 and the pseudo resistor 12, and the impedance value of the pseudo resistor 12 is set, so that the filter cut-off frequency of the filter unit 1 reaches a target value, the high-pass frequency angle of the filter unit 1 is greatly reduced, the bandwidth of the collected input signals is improved, the filter signals are obtained, and the nondestructive collection performance of the input signals is improved; meanwhile, the capacitor 11 couples an input signal to the amplifying unit 2 so as to amplify the input signal, so that the problem of using a pseudo resistor 12 with lower impedance connected across an input end and an output end is solved, the input of the amplifying unit 2 is biased through an input bias pseudo resistor 12 structure, the impedance stability of the pseudo resistor 12 is improved, meanwhile, the voltage difference between two ends of the pseudo resistor 12 is smaller, the voltage change between two ends of the pseudo resistor 12 is smaller, the high-pass frequency angle is reduced greatly, the bandwidth of the collected slow wave nerve signals is improved, and the lossless collection of the slow wave nerve signals is guaranteed.
In some of these embodiments, another slow wave neural signal amplifying circuit is provided, and fig. 2 is a schematic diagram of another slow wave neural signal amplifying circuit of the present embodiment. As shown in fig. 2, the amplifying unit 2 includes an amplifier 21 and a collector 22; the amplifier 21 is connected with the collector 22; one end of the amplifying unit 2 is connected with the other end of the capacitor 11, and the other end of the amplifying unit 2 is used as a signal output end; the input end of the amplifier 21 is connected with the other end of the capacitor 11, and the output end of the collector 22 is used as a signal output end; the amplifying unit 2 amplifies the difference of the input signals by the amplifier 21 and extracts the common mode potential by the collector 22 to form common mode feedback.
Specifically, the slow wave nerve signal amplifying circuit comprises a filtering unit 1 and an amplifying unit 2, wherein the filtering unit 1 comprises a capacitor 11 and a pseudo resistor 12, and the amplifying unit 2 comprises an amplifier 21 and a collector 22; one end of a capacitor 11 is used as a signal input end, the other end of the capacitor 11 is connected with the first end of a pseudo resistor 12, the other end of the capacitor 11 is also connected with the input end of an amplifying unit 2, the capacitor 11 couples an input signal to the amplifying unit 2, and the output end of the amplifying unit 2 is used as a signal output end; the second end of the pseudo resistor 12 is connected with a common mode voltage, the first end of the pseudo resistor 12 is connected with the input end of the amplifying unit 2, and the pseudo resistor 12 provides bias voltage for the amplifying unit 2; the voltage values of the first end and the second end of the pseudo resistor 12 are the same, the filtering unit 1 comprises a plurality of pseudo resistors 12, and third ends of the plurality of pseudo resistors 12 are connected with each other; the capacitor 11 is connected with a first end of the pseudo resistor 12 to form the filter unit 1; the impedance value of the pseudo resistor 12 is set so that the filtering cut-off frequency of the filtering unit 1 reaches a target value, and the high-pass frequency angle of the filtering unit 1 is greatly reduced; the amplifying unit 2 amplifies the difference value of the input signal through the amplifier 21, and extracts the common mode potential through the collector 22 to form common mode feedback, the amplifying unit 2 effectively reduces flicker noise, meanwhile, the common mode signal is collected by the pseudo resistor 12 and is directly fed back to the load branch, a common mode feedback loop is simplified, and unnecessary power consumption is further reduced. Meanwhile, by using the common mode bias method of the input end, the voltage fluctuation at the two ends of the pseudo resistor 12 is only the amplitude, namely the microvolts, of the input differential signal, so that the pseudo resistor 12 is ensured to keep high-impedance operation, and meanwhile, the extremely low high-pass cut-off frequency is realized, so that the pseudo resistor 12 always works in a cut-off area, and the nondestructive acquisition of the slow wave nerve signal is ensured.
In some of these embodiments, another slow wave neural signal amplifying circuit is provided, and fig. 3 is a schematic diagram of another slow wave neural signal amplifying circuit of the present embodiment. As shown in fig. 3, the signal amplifying circuit further includes a feedback unit 3; one end of the feedback unit 3 is connected with the output end of the amplifying unit 2, and the other end of the feedback unit 3 is connected with the input end of the amplifying unit 2; the feedback unit 3 feeds back the output voltage of the amplifying unit 2 to the input of the amplifying unit 2.
Specifically, the slow wave nerve signal amplifying circuit comprises a filtering unit 1, an amplifying unit 2 and a feedback unit 3, wherein the filtering unit 1 comprises a capacitor 11 and a pseudo resistor 12, and the amplifying unit 2 comprises an amplifier 21 and a collector 22; one end of a capacitor 11 is used as a signal input end, the other end of the capacitor 11 is connected with the first end of a pseudo resistor 12, the other end of the capacitor 11 is also connected with the input end of an amplifying unit 2, the capacitor 11 couples an input signal to the amplifying unit 2, and the output end of the amplifying unit 2 is used as a signal output end; the second end of the pseudo resistor 12 is connected with a common mode voltage, the first end of the pseudo resistor 12 is connected with the input end of the amplifying unit 2, and the pseudo resistor 12 provides bias voltage for the amplifying unit 2; the voltage values of the first end and the second end of the pseudo resistor 12 are the same, the filtering unit 1 comprises a plurality of pseudo resistors 12, and third ends of the plurality of pseudo resistors 12 are connected with each other; the capacitor 11 is connected with a first end of the pseudo resistor 12 to form the filter unit 1; meanwhile, the output voltage of the amplifying unit 2 is fed back to the input end of the amplifying unit 2 through the feedback unit 3, so that the characteristics of the amplifying unit 2 are changed, and the overall performance of the circuit is affected, wherein the negative feedback is to subtract a part of the output from the input through a negative feedback network, so that the gain of the amplifier 21 is reduced. Positive feedback is the addition of a portion of the output to the input through a positive feedback network, thereby increasing the gain of the amplifier 21. By using the common mode bias method of the input end, the voltage fluctuation at the two ends of the pseudo resistor 12 is only the amplitude of the input differential signal, so that the pseudo resistor 12 is ensured to keep high-impedance operation, and meanwhile, the extremely low high-pass cut-off frequency is realized, so that the pseudo resistor 12 always works in a cut-off area, and the nondestructive acquisition of the slow-wave nerve signal is ensured.
In some of these embodiments, another slow wave neural signal amplifying circuit is provided, and fig. 4 is a schematic diagram of another slow wave neural signal amplifying circuit of the present embodiment. As shown in fig. 4, the signal amplifying circuit further includes: an impedance boosting unit 4; one end of the impedance lifting unit 4 is connected with the output end of the amplifying unit 2, and the output end of the impedance lifting unit 4 is connected with the input end of the capacitor 11; the impedance boosting unit 4 boosts the input impedance of the slow-wave neural signal amplifying circuit through a positive feedback network.
Specifically, the slow wave nerve signal amplifying circuit comprises a filtering unit 1, an amplifying unit 2, a feedback unit 3, an impedance lifting unit 4, the filtering unit 1 comprises a capacitor 11 and a pseudo resistor 12, and the amplifying unit 2 comprises an amplifier 21 and a collector 22; one end of a capacitor 11 is used as a signal input end, the other end of the capacitor 11 is connected with the first end of a pseudo resistor 12, the other end of the capacitor 11 is also connected with the input end of an amplifying unit 2, the capacitor 11 couples an input signal to the amplifying unit 2, and the output end of the amplifying unit 2 is used as a signal output end; the second end of the pseudo resistor 12 is connected with a common mode voltage, the first end of the pseudo resistor 12 is connected with the input end of the amplifying unit 2, and the pseudo resistor 12 provides bias voltage for the amplifying unit 2; the voltage values of the first end and the second end of the pseudo resistor 12 are the same, the filtering unit 1 comprises a plurality of pseudo resistors 12, and third ends of the plurality of pseudo resistors 12 are connected with each other; the capacitor 11 is connected with a first end of the pseudo resistor 12 to form the filter unit 1; one end of the impedance boosting unit 4 is connected with the output end of the amplifying unit 2, and the output end of the impedance boosting unit 4 is connected with the input end of the capacitor 11. By using the common mode bias method of the input end, the voltage fluctuation at the two ends of the pseudo resistor 12 is only the amplitude of the input differential signal, so that the pseudo resistor 12 is ensured to keep high-impedance operation, and meanwhile, the extremely low high-pass cut-off frequency is realized, so that the pseudo resistor 12 always works in a cut-off area, and the nondestructive acquisition of the slow-wave nerve signal is ensured. Meanwhile, the impedance lifting unit 4 improves the input impedance of the slow wave nerve signal amplifying circuit through a positive feedback network, and is beneficial to further collecting slow wave nerve signals.
In some of these embodiments, another slow wave neural signal amplifying circuit is provided, and fig. 5 is a schematic diagram of another slow wave neural signal amplifying circuit of the present embodiment. As shown in fig. 5, the slow wave neural signal amplifying circuit includes a filtering unit 1, an amplifying unit 2, a feedback unit 3, and an impedance boosting unit 4; wherein the filter unit 1 comprises a capacitor 11 and a pseudo resistor 12; the amplifying unit 2 includes an amplifier 21 and a collector 22; illustratively, there are two filtering units 1, one amplifying unit 2, two feedback units 3 and two impedance boosting units 4, respectively; respectively is that; a first filtering unit 51, a second filtering unit 52, a first feedback unit 53, a second feedback unit 54, a first impedance boosting unit 55, and a second boosting unit; the first capacitor 511 in the first filtering unit 51 is used as a positive input end of a signal, and the other end of the first capacitor 511 is connected with the first end of the first pseudo resistor 512 and is also connected with the positive input end of the amplifying unit; the second end of the first pseudo resistor 512 is connected with a common mode voltage, and the first end of the first pseudo resistor 512 is also connected with the positive input end of the amplifying unit; the input end of the first feedback unit 53 is connected with the positive output end of the amplifying unit 2, and the output end of the first feedback unit 53 is connected with the positive input end of the amplifying unit; the input end of the first impedance boosting unit 55 is connected with the negative output end of the amplifying unit 2, and the output end of the first impedance boosting unit 55 is connected with the positive input end of the signal, namely the first capacitor 511; the second capacitor 521 in the second filtering unit 52 is used as a negative input end of the signal, and the other end of the first capacitor 511 is connected with the first end of the second pseudo resistor 522 and is also connected with the negative input end of the amplifying unit; the second end of the first pseudo resistor 512 is connected with a common mode voltage, and the first end of the first pseudo resistor 512 is also connected with the negative input end of the amplifying unit; the input end of the second feedback unit 54 is connected with the negative output end of the amplifying unit 2, and the output end of the second feedback unit 54 is connected with the negative input end of the amplifying unit; the input end of the second impedance boosting unit 56 is connected with the positive output end of the amplifying unit 2, and the output end of the second impedance boosting unit 56 is connected with the negative input end of the signal, namely the first capacitor 511; the pseudo resistor increases the bias voltage for the amplifying unit 2; third terminals of the first and second dummy resistors 512 and 522 are connected to each other. By setting the impedance values of the first dummy resistor 512 and the second dummy resistor 522, the filtering cut-off frequency of the filtering unit 1 reaches the target value, the high-pass frequency angle of the filtering unit 1 is greatly reduced, the bandwidth of the acquired input signal is improved, the filtered signal is obtained, and the nondestructive acquisition performance of the input signal is improved.
In some of these embodiments, another slow wave neural signal amplifying circuit is provided, and fig. 6 is a schematic diagram of another slow wave neural signal amplifying circuit of the present embodiment. As shown in fig. 6, the signal amplifying circuit further includes: an analog-to-digital conversion unit 5; the input end of the analog-to-digital conversion unit 5 is connected with the output end of the amplifying unit 2; the input end of the analog-to-digital conversion unit 5 receives the analog signal output by the amplifying unit 2 and converts the analog signal into a digital signal.
Specifically, the signal amplifying circuit comprises a filtering unit 1, an amplifying unit 2, a feedback unit 3, an impedance lifting unit 4 and an analog-to-digital conversion unit 5; the filtering unit 1 comprises a capacitor 11 and a pseudo resistor 12, and the amplifying unit 2 comprises an amplifier 21 and a collector 22; the input end of the analog-to-digital conversion unit 5 is connected with the output end of the amplifying unit 2, and the analog-to-digital conversion unit 5 receives the amplified analog slow wave nerve signal which is output by the amplifying unit 2 and is processed by the filtering unit 1 and the amplifying unit 2, and converts the received analog signal into a digital signal, so that the slow wave nerve signal can be processed by a computer.
In some of these embodiments, fig. 7 is a circuit diagram of the amplifying unit of the present embodiment. As shown in fig. 7, the amplifying unit is a fully differential amplifier. The circuit of the amplifying unit comprises an input bias Ibias, a direct-current voltage source VDD, a homodromous input end Vp, a reverse input end Vn, a positive input end Vinp, a negative input end Vinn, a positive output end Voutp, a negative output end Voutn and a ground GND; the fully differential amplifier adopts a fully differential folding type common-source common-gate structure input by PMOS, and extracts common-mode potential by using a pair of Pseudo resistors (Pseudo resistors) and directly feeds the common-mode potential back to a load branch current source to form common-mode feedback, so that flicker noise is effectively reduced; meanwhile, a pseudo resistor is adopted to collect common-mode signals and directly feed back the common-mode signals to the load branch, so that a common-mode feedback loop is simplified at least, and unnecessary power consumption is reduced. Specifically, the pseudo resistor is the collector in the foregoing embodiment. When the input signal changes, the output of the differential amplifying circuit also changes, which will result in a change in the load branch current. This change in current will be fed back to the input stage through the pseudo-resistor, thereby changing the output voltage of the input stage. The resistance value of the pseudo resistor is irrelevant to the input voltage, so that the feedback mode can reduce the sensitivity of the circuit to the power supply voltage and temperature variation and improve the stability and performance of the circuit. In some of these embodiments, the dummy resistor is a field effect transistor.
In some of these embodiments, the signal amplifying circuit further includes a control unit, which is connected to the filtering unit, and is configured to reset the pseudo resistor.
Specifically, the slow wave nerve signal amplifying circuit comprises a filtering unit, an amplifying unit, a feedback unit, an impedance lifting unit, an analog-to-digital conversion unit and a control unit; the control unit is connected with the filtering unit and is used for resetting the pseudo resistor in the initial stage of the operation of the amplifying unit.
In this embodiment, a slow wave neural signal processing apparatus is also provided. The slow wave nerve signal processing device comprises a signal acquisition electrode and a slow wave nerve signal amplifying circuit as shown in fig. 5, wherein the signal acquisition electrode is connected with the slow wave nerve signal amplifying circuit.
The present embodiment is described and illustrated below by way of specific examples.
Fig. 8 is a flowchart of a slow wave neural signal acquisition method of the present embodiment. As shown in fig. 8, the slow wave neural signal acquisition method includes the following steps:
step S810, acquiring a nerve signal potential.
Specifically, the brain-computer interface device is worn or implanted by the test object, the signal acquisition electrode in the brain-computer interface device acquires brain-wave nerve signal points of the test object, and the nerve signal points are transmitted to the slow-wave nerve signal acquisition amplifier, namely the slow-wave nerve signal circuit in the embodiment; wherein the frequency of the slow wave in the brain wave is below 8Hz, specifically, the slow wave comprises a theta wave of 4-7Hz and a delta wave of below 4Hz, so that a lower high-pass cut-off frequency is required when acquiring the slow wave nerve signal.
Step S820, the neural signal is processed.
Specifically, fig. 9 is a schematic diagram of the slow wave neural signal amplifying circuit of the present embodiment. As shown in fig. 9, the slow wave neural signal amplifying circuit includes an input capacitor 91, a common mode bias 92, a pseudo resistor 12, a fully differential amplifier 94, a feedback capacitor 95 and an impedance boosting circuit 96; the input capacitor 91 and the dummy resistor 12 are the capacitor of the filtering unit and the dummy resistor 12 in the foregoing embodiment, the feedback capacitor 95 is the feedback unit in the foregoing embodiment, the impedance boosting circuit 96 is the impedance boosting unit in the foregoing embodiment, and the fully differential amplifier 94 is the amplifying unit in the foregoing embodiment.
When a neural signal is input to the slow-wave neural signal amplifying circuit, the neural signal is divided by the input impedance of the electrode and the amplifier, and then the signal is coupled through an input capacitor 91 of CCIA (capacitive-coupled instrumentation-and-amplifier), at this time, the input bias dummy resistor 12 and the input capacitor 91 form a High pass frequency corner (HPC) together, and at the same time, the dc operating point of the amplifier is given by the external common mode potential Vcm. CCIA forms a closed loop structure from capacitive coupling, and illustratively, the ratio of the input capacitance 91 to the feedback capacitance 95 is 100:1, which is converted into a ratio of the resistances, i.e., the ratio of the input resistance to the feedback resistance is 100:1, and then the signal gain formula is: [20×log (input resistance/feedback resistance) ], the signal gain thereof was found to be 40dB. The core amplifying module of CCIA adopts a fully differential folded cascode structure with PMOS input, and uses a pair of pseudo resistors 12 to extract common mode potential and directly feed back the common mode potential to the load branch current source to form common mode feedback. The cascode amplifier, namely the cascode amplifier, adopts a P input structure, so that flicker noise is effectively reduced. Meanwhile, the pseudo resistor 12 is adopted to collect the common mode signal and directly feed back the common mode signal to the load branch, so that the common mode feedback loop is simplified at the most, and unnecessary power consumption is reduced. CCIA uses an impedance boosting circuit 86 (Impedance Boosting Loop) to effectively boost the input impedance.
The input bias pseudo-resistor structure comprises an input bias pseudo-resistor structure, a common-mode voltage and a common-mode voltage, wherein the two pseudo-resistors in the input bias pseudo-resistor structure are connected to the input side of the fully differential amplifier and biased through the common-mode voltage, and the transfer function from the input to the output is as follows:
obtaining a high-pass cut-off frequency:
wherein A is closed-loop magnification, A 0 Open loop gain for the operational amplifier.
Wherein, C is the feedback capacitance, R is the impedance, s is the complex number.
Whereas the transfer function of a conventional pseudo-resistive crossover structure is:
obtaining a high-pass cut-off frequency:
wherein A is closed-loop magnification, A 0 Open loop gain for the operational amplifier.
Wherein, C is the feedback capacitance, R is the impedance, s is the complex number.
Therefore, the ratio of the high-pass cutoff frequency of the input bias pseudo-resistor structure to the high-pass cutoff frequency of the traditional structure is as follows:
from the above, it can be obtained: the high-pass frequency angle of the input bias pseudo-resistance structure is lower than that of the traditional structure by A 0 Multiple of, wherein A 0 The operational amplifier has open loop gain, so that an input bias pseudo-resistor structure is adopted, an extremely low high-pass frequency angle can be obtained, the pseudo-resistor is ensured to keep high-impedance operation, and the lossless acquisition of slow-wave nerve signals is facilitated.
Illustratively, fig. 10 is a circuit diagram of the slow wave neural signal amplifying circuit of the present embodiment. As shown in fig. 10, in which the part outlined by the dotted line represents the dummy resistor 12, the slow wave neural signal amplifying circuit includes a fully differential operational amplifier Gm, a positive input terminal Vinp, a negative input terminal Vinn, a positive output terminal Voutp, a negative output terminal Voutn, and an input capacitor C 1 Feedback capacitor C 2 Impedance boosting loop C IBL Common mode voltage Vcm, DC voltage source VDD and reset switch S 1 The method comprises the steps of carrying out a first treatment on the surface of the Referring to fig. 11, fig. 11 is a schematic structural diagram of a dummy resistor 12 in this embodiment, the dummy resistor 12 is formed by two PMOS in a back-to-back manner, drain terminals of the two PMOS are connected together, and respective source terminals are placed behind a capacitor of a filter unit and are connected to positive and negative terminals of a differential input pair of an amplifying unit. The gate terminals of the dummy resistors 12 are connected and controlled by an external common mode voltage, and the body terminals of the dummy resistors 12 are connected and biased by the supply voltage of the amplifying unit. In the starting stage of the operation of the amplifier of the circuit, the common mode voltage is firstly transferred to the source end of the pseudo resistor by opening the reset switch S1 connected to the source end of the pseudo resistor, so that the voltage difference between the source end and the drain end of the pseudo resistor 12 is 0, the leakage current of the pseudo resistor is ensured to be close to 0, and the impedance of the pseudo resistor 12 is further kept to be above a preset ohm, namely G ohm. Illustratively, the reset time lasts for 100 microseconds, and then the reset switch S1 is turned off, and since the drain terminal of the pseudo resistor 12 is continuously biased by the common mode voltage Vcm, and the voltage fluctuation of the source terminal is controlled to be in the microvolts, the amplitude is extremely small, so that the source terminal voltage of the pseudo resistor 12 can be kept around Vcm, and then the pseudo resistor 12 is ensured to keep high-impedance operation, and meanwhile, an extremely low high-pass cut-off frequency is realized, and nondestructive acquisition of slow-wave nerve signals is ensured.
As shown in the circuits of fig. 10 and 11, the pseudo resistor adopts a structure connected across the positive and negative input terminals, and because the received neural signal is a signal which is not amplified, the fluctuation of the signal at the two ends of the pseudo resistor is very small, the impedance of the pseudo resistor brought by the signal is more stable, the impedance of the pseudo resistor is not changed greatly along with the oversized fluctuation, and the constant high-pass cutoff frequency is further maintained, and the high-pass cutoff frequency is not changed along with the fluctuation of the size of the input signal; simultaneously, an extremely low high-pass cutoff frequency is provided, and the method is suitable for collecting slow wave nerve signals.
Meanwhile, a process error exists in the process of manufacturing the chip, the process error can cause input or output direct current deviation of the chip, the direct current deviation can further cause voltage difference increase at two ends of the pseudo resistor, and further cause smaller impedance of the pseudo resistor; the signals at the two ends of the pseudo resistor in the circuit are input signals, not input and output signals, so that the attenuation of the pseudo resistor impedance caused by process errors in the process of manufacturing chips is resisted, and a constant low high-pass cutoff frequency is obtained. The circuit in fig. 10 includes two pseudo resistors, one ends of the pseudo resistors are respectively connected to Vcm, the other ends of the pseudo resistors are respectively connected to the positive electrode and the negative electrode of the input end of the amplifier, the pseudo short points are virtual short points, the voltage of the virtual short points is equivalent to the voltage of the input end, therefore, the signal flowing through the pseudo resistors is an input signal, based on the jump of the weak input signal on Vcm, the assumption is that the value of Vcm is half of direct current voltage, then the up-down fluctuation signal of the nerve signal is a microvolts level, namely, a nerve signal of tens of microvolts, and therefore, the fluctuation of the voltage at two ends of the pseudo resistor is small at the moment, and the impedance is stable; if a dummy resistor is connected across the input and output terminals, the impedance of the dummy resistor is small.
The pseudo resistor is a MOS tube, the initial impedance of the pseudo resistor is determined by different connection methods, working points (a saturation region, a subthreshold region, a cut-off region) and the like, the pseudo resistor is required to work in the cut-off region, and the impedance of the pseudo resistor is small when the pseudo resistor is prevented from being conducted; the pseudo resistor is required to be kept to work in a cut-off area all the time, namely, the voltage change of three ends of the pseudo resistor is required; wherein, the voltage of the grid end Vcm is kept unchanged, and the voltage of the source end is locked at Vcm according to the voltage of Vcm locked at the drain end; when the operational amplifier starts to work, the pseudo resistor automatically adjusts the working state according to the high resistance or low resistance, and then each point is provided with a direct current bias point; vcm provides direct current bias for the input end of the operational amplifier, and meanwhile, the pseudo resistor is matched with the input capacitor of the amplifier to form a high-pass cut-off frequency point of the amplifier, and direct current signals are filtered; in the signal acquisition process, the direct current deviation can saturate the signal of the amplifier, so that the accurate acquisition of the brain electrical signal can be realized by adopting an AC-AC coupled amplifier; vin is a dc signal that needs to be filtered and a dummy resistor provides a dc bias for the amplifier. Meanwhile, when the fully differential amplifier starts to work, a control signal, namely a reset signal, is arranged to control the voltage of the direct current bias points at the two ends of the pseudo resistor to be reset to be the same as Vcm; after the reset is successful, the pseudo resistance is stable, so that the impedance of the pseudo resistance cannot be changed, and the influence on the pseudo resistance caused by a microvolts-level small signal flowing through the two ends of the pseudo resistance is very small. The two transistors of the pseudo resistor are connected with the anode and the cathode of the operational amplifier, namely, the reset point is a point at which the transistors are respectively connected with the anode and the cathode, the anode and the cathode are respectively connected with the source ends of the transistors, and the drain ends of the two transistors are connected with each other; because the two transistors have the same size and the same voltage at two ends, the middle node is automatically biased to the drain (source) voltage, which is equivalent to weak voltage drop of the pseudo resistor, but insufficient for conducting the transistors, the impedance of the transistors is in the impedance of the cut-off region, and the size of the impedance is according to the model, the size and the bias mode of the transistors; by using the bias mode of the bias pseudo-resistance structure, more stable and higher impedance can be obtained, and the lossless acquisition of the slow wave nerve signals is facilitated.
In step S830, data conversion is performed on the amplified neural signal.
Specifically, the nerve signals are amplified by the electrode and the capacitive coupling instrument operational amplifier to the required amplitude and then transmitted to the analog-to-digital converter for data conversion.
It should be noted that, specific examples in this embodiment may refer to examples described in the foregoing embodiments and alternative implementations, and are not described in detail in this embodiment.
It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to be limiting. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present application, are within the scope of the present application in light of the embodiments provided herein.
It is evident that the drawings are only examples or embodiments of the present application, from which the present application can also be adapted to other similar situations by a person skilled in the art without the inventive effort. In addition, it should be appreciated that while the development effort might be complex and lengthy, it would nevertheless be a routine undertaking of design, fabrication, or manufacture for those of ordinary skill having the benefit of this disclosure, and thus should not be construed as an admission of insufficient detail.
The term "embodiment" in this application means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive. It will be clear or implicitly understood by those of ordinary skill in the art that the embodiments described in this application can be combined with other embodiments without conflict.
The above examples only represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the patent. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application shall be subject to the appended claims.
Claims (9)
1. The slow wave nerve signal amplifying circuit is characterized by comprising a filtering unit and an amplifying unit, wherein the filtering unit comprises a capacitor and a pseudo resistor;
one end of the capacitor is used as a signal input end, the other end of the capacitor is connected with the first end of the pseudo resistor, the other end of the capacitor is also connected with the input end of the amplifying unit, the capacitor couples an input signal to the amplifying unit, and the output end of the amplifying unit is used as a signal output end;
the second end of the pseudo resistor is connected with a common mode voltage, the first end of the pseudo resistor is connected with the input end of the amplifying unit, and the pseudo resistor provides bias voltage for the amplifying unit; the voltage values of the first end and the second end of the pseudo resistor are the same;
setting the impedance value of the pseudo resistor to enable the filter cutoff frequency of the filter unit to reach a target value, obtaining a filter signal, and amplifying the filter signal through the amplifying unit;
the filter unit comprises two pseudo resistors, wherein the pseudo resistors are two PMOS (P-channel metal oxide semiconductor), the drain ends of the two PMOS are connected together, the drain ends of the pseudo resistors are continuously biased by a common mode voltage, and the source ends of the pseudo resistors are placed behind the capacitor of the filter unit and are connected to the positive end and the negative end of the differential input pair of the amplifying unit respectively; the gate ends of the pseudo resistors are connected and controlled by an external common mode voltage; the body ends of the two pseudo resistors are connected and are biased by the power supply voltage of the amplifying unit;
the signal amplifying circuit further comprises a control unit, wherein the control unit is connected with the filtering unit and is used for resetting the pseudo resistor; in the starting stage of the operation of the amplifier of the circuit, a common mode voltage is firstly transferred to the source end of the pseudo resistor by opening a reset switch connected to the source end of the pseudo resistor, so that the voltage difference between the source end and the drain end of the pseudo resistor is zero;
the core amplifying module adopts a fully-differential folding type common-source common-gate structure input by PMOS, and extracts common-mode potential by using a pair of pseudo resistors and directly feeds back the common-mode potential to a load branch current source to form common-mode feedback; the amplifier corresponding to the cascode structure adopts a P input structure.
2. The slow wave nerve signal amplification circuit according to claim 1, wherein the amplification unit includes an amplifier and a collector; the amplifier is connected with the collector;
one end of the amplifying unit is connected with the other end of the capacitor, and the other end of the amplifying unit is used as a signal output end;
the input end of the amplifier is connected with the other end of the capacitor, and the output end of the collector is used as a signal output end; the amplifying unit amplifies the difference value of the input signals through an amplifier, and extracts common mode potential through the collector to form common mode feedback.
3. The slow wave neural signal amplification circuit of claim 1, further comprising a feedback unit;
one end of the feedback unit is connected with the output end of the amplifying unit, and the other end of the feedback unit is connected with the input end of the amplifying unit;
the feedback unit feeds back the output voltage of the amplifying unit to the input end of the amplifying unit.
4. The slow wave neural signal amplification circuit of claim 2, further comprising: an impedance boosting unit;
one end of the impedance lifting unit is connected with the output end of the amplifying unit, and the output end of the impedance lifting unit is connected with the input end of the capacitor;
the impedance boosting unit is used for boosting the input impedance of the slow wave neural signal amplifying circuit through a positive feedback network.
5. The slow wave neural signal amplification circuit of claim 1, further comprising: an analog-to-digital conversion unit;
the input end of the analog-to-digital conversion unit is connected with the output end of the amplifying unit;
the input end of the analog-to-digital conversion unit receives the analog signal output by the amplifying unit and converts the analog signal into a digital signal.
6. The slow wave neural signal amplifying circuit according to claim 1, wherein the filtering unit includes a plurality of dummy resistors, and third ends of the plurality of dummy resistors are connected to each other.
7. The slow wave neural signal amplification circuit of claim 1, wherein the amplification unit is a fully differential amplifier.
8. The slow wave neural signal amplification circuit of claim 1, wherein the pseudo-resistor is a field effect transistor.
9. A slow wave nerve signal processing device, characterized in that the slow wave nerve signal processing device comprises a signal acquisition electrode and the slow wave nerve signal amplification circuit according to any one of claims 1 to 8, the signal acquisition electrode and the slow wave nerve signal amplification circuit being connected.
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