CN116805859B - Operational amplifier offset voltage regulation circuit and method - Google Patents
Operational amplifier offset voltage regulation circuit and method Download PDFInfo
- Publication number
- CN116805859B CN116805859B CN202311083458.3A CN202311083458A CN116805859B CN 116805859 B CN116805859 B CN 116805859B CN 202311083458 A CN202311083458 A CN 202311083458A CN 116805859 B CN116805859 B CN 116805859B
- Authority
- CN
- China
- Prior art keywords
- current source
- adjustable current
- switch
- operational amplifier
- offset voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 31
- 238000009966 trimming Methods 0.000 claims abstract description 89
- 238000012360 testing method Methods 0.000 claims abstract description 16
- 230000001105 regulatory effect Effects 0.000 claims abstract description 9
- 230000001276 controlling effect Effects 0.000 claims description 6
- 238000012937 correction Methods 0.000 abstract description 4
- 238000005259 measurement Methods 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 230000007613 environmental effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- FFBHFFJDDLITSX-UHFFFAOYSA-N benzyl N-[2-hydroxy-4-(3-oxomorpholin-4-yl)phenyl]carbamate Chemical compound OC1=C(NC(=O)OCC2=CC=CC=C2)C=CC(=C1)N1CCOCC1=O FFBHFFJDDLITSX-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
- H03F1/301—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in MOSFET amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/447—Indexing scheme relating to amplifiers the amplifier being protected to temperature influence
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45051—Two or more differential amplifiers cascade coupled
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45056—One or both transistors of the cascode stage of a differential amplifier being composed of more than one transistor
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
Abstract
The invention discloses an operational amplifier offset voltage regulating circuit and a method, wherein two adjustable current sources with different temperature characteristics are arranged, pre-trimming and testing are carried out under two different temperature conditions, and a trimming control word capable of correcting offset voltage to be close to 0 under the two temperature conditions is obtained through operation. The technical scheme can effectively realize the correction of the offset voltage temperature drift coefficient, reduce the influence of temperature change on the offset voltage of the operational amplifier, improve the precision of the amplifier, and further improve the accuracy of the measurement result of the electronic system.
Description
Technical Field
The invention belongs to the technical field of electronic circuits, and particularly relates to an operational amplifier offset voltage regulating circuit and a regulating method.
Background
The operational amplifier is a common component in an electronic circuit, and has a phenomenon that offset voltage drifts along with temperature (hereinafter referred to as temperature drift) in the working process, and the phenomenon can influence the precision characteristics of an electronic system under different environmental temperature conditions, so that the accuracy of a measurement result is influenced.
Fig. 1 shows a general operational amplifier circuit structure, which includes an input pair tube and tail current, a load circuit and a common source amplifying circuit, and when there is an input offset voltage, the current flowing through the input pair tubes PM1 and PM2 and the current flowing through the input pair tubes NM1 and NM2 are no longer equal in the current path inside the circuit. The existing offset voltage regulating method is to connect an adjustable current source A and two switches S0 and S1 in parallel between an input pair of tubes and a tail current and a load circuit, and additionally provide a current path for the operational amplifier to compensate, so that the current flowing through NM1 and NM2 is equal. When there is a mismatch between PM1 and PM2, a positive offset voltage is generated in the operational amplifier, and when the operational amplifier is operating normally, the current flowing through PM1 is always larger than the current flowing through PM2, and then the current flowing through NM1 and NM2 are not equal, and at this time, switch S0 is opened, and a current is provided through adjustable current source a to cancel the current difference flowing through NM1 and NM 2. Therefore, offset voltage caused by mismatch between PM1 and PM2 can be offset, and adjustment and control of offset voltage are realized.
However, it should be noted that the existing offset voltage regulation is performed at a certain temperature, and the offset voltage at the temperature point can be adjusted to be close to 0, but because of the characteristics of the device and the temperature drift characteristics of the tail current source I0 and the adjustable current source a, when the temperature changes, the offset voltage will deviate greatly, which will affect the precision characteristics of the electronic system under different environmental temperature conditions, and needs to be improved.
Disclosure of Invention
The invention aims to provide an operational amplifier offset voltage regulating circuit and method, which can effectively realize the correction of offset voltage temperature drift coefficients, reduce the influence of temperature change on the operational amplifier offset voltage, improve the accuracy of an amplifier and further improve the accuracy of a measurement result of an electronic system.
In order to achieve the above object, the solution of the present invention is:
the operational amplifier comprises a PMOS input pair tube and tail current, and specifically comprises a first PMOS tube, a second PMOS tube and a first tail current source, wherein a grid electrode of the first PMOS tube is connected with a forward input end INP, and a grid electrode of the second PMOS tube is connected with an inverted input end INN; the source electrode of the first PMOS tube and the source electrode of the second PMOS tube are both connected to the output end of the first tail current source, and the input end of the first tail current source is connected with a power supply; the device comprises a first adjustable current source, a second adjustable current source and first-fourth switches, wherein one end of the first adjustable current source and one end of the second adjustable current source are connected to a power supply, the other end of the first adjustable current source is respectively connected with one end of the first switch and one end of the second switch, and the other end of the first switch and the other end of the second switch are respectively connected with a drain electrode of a first PMOS tube and a drain electrode of a second PMOS tube; the other end of the second adjustable current source is respectively connected with one end of the third switch and one end of the fourth switch, and the other end of the third switch and the other end of the fourth switch are respectively connected with the drain electrode of the first PMOS tube and the drain electrode of the second PMOS tube; the first and second adjustable current sources have different temperature characteristics.
The regulation method of the offset voltage regulation circuit of the operational amplifier comprises the following steps:
step A1, at temperature T 1 Under the condition of testing the offset voltage V of the operational amplifier when the first adjustable current source and the second adjustable current source are not in operation 10 Offset voltage V of operational amplifier in MSB pre-trimming mode of first adjustable current source 11 And offset voltage V of operational amplifier in MSB pre-trimming mode of second adjustable current source 12 ；
Step A2, at temperature T 2 Under the condition of testing the offset voltage V of the operational amplifier when the first adjustable current source and the second adjustable current source are not in operation 20 Offset voltage V of operational amplifier in MSB pre-trimming mode of first adjustable current source 21 And offset voltage V of operational amplifier in MSB pre-trimming mode of second adjustable current source 22 The method comprises the steps of carrying out a first treatment on the surface of the Wherein T is 1 ≠T 2 ；
Step A3, calculating the following formula
LSB A1 =（V 11 -V 10 ）/Q, LSB B1 =（V 12 -V 10 ）/Q
LSB A2 =（V 21 -V 20 ）/Q, LSB B2 =（V 22 -V 20 ）/Q
Wherein LSB is A1 At a temperature T 1 Minimum trimming bit trimming range and LSB (least significant bit) of first adjustable current source under condition B1 At a temperature T 1 Minimum trimming bit trimming range and LSB of second adjustable current source under condition A2 At a temperature T 2 Minimum trimming bit trimming range and LSB (least significant bit) of first adjustable current source under condition B2 At a temperature T 2 The minimum trimming bit trimming range of the second adjustable current source under the condition; q is a fixed value;
then the following equations are combined to solve the control word:
M*LSB A1 +N* LSB B1 = V 10
M*LSB A2 +N* LSB B2 = V 20
wherein M is a trimming control word of the first adjustable current source, and N is a trimming control word of the second adjustable current source.
The above temperature T 1 Setting the temperature to be 0 ℃ and the temperature T 2 Set at 70 ℃.
In the step A1, the offset voltage V of the operational amplifier is tested when the first and second adjustable current sources are not operating 10 When the first switch is turned on, the second switch is turned off;
in the step A2, the offset voltage V of the operational amplifier is tested when the first and second adjustable current sources are not in operation 20 When the first switch is turned on, the second switch is turned off;
in the step A1 and the step A2, when the offset voltage of the operational amplifier in the MSB pre-trimming mode of the first adjustable current source is tested, the first switch is controlled to be closed, the second switch, the third switch and the fourth switch are controlled to be opened, and the first adjustable current source is enabled to work in the MSB pre-trimming mode;
in the step A1 and the step A2, when the offset voltage of the operational amplifier in the MSB pre-trimming mode of the second adjustable current source is tested, the third switch is controlled to be closed, the first switch, the second switch and the fourth switch are controlled to be opened, and the second adjustable current source is enabled to work in the MSB pre-trimming mode.
The operational amplifier comprises an NMOS input pair tube and tail current, and specifically comprises a first NMOS tube, a second NMOS tube and a second tail current source, wherein a grid electrode of the first NMOS tube is connected with an inverting input end INN, and a grid electrode of the second NMOS tube is connected with a forward input end INP; the source electrode of the first NMOS tube and the source electrode of the second NMOS tube are connected to the input end of the second tail current source, and the output end of the second tail current source is grounded; the device comprises a third adjustable current source, a fourth adjustable current source and fifth-eighth switches, wherein one end of the third adjustable current source and one end of the fourth adjustable current source are grounded, the other end of the third adjustable current source is respectively connected with one end of the fifth switch and one end of the sixth switch, and the other end of the fifth switch and the other end of the sixth switch are respectively connected with the drain electrode of the first NMOS tube and the drain electrode of the second NMOS tube; the other end of the fourth adjustable current source is respectively connected with one end of the seventh switch and one end of the eighth switch, and the other end of the seventh switch and the other end of the eighth switch are respectively connected with the drain electrode of the first NMOS tube and the drain electrode of the second NMOS tube; the third and fourth adjustable current sources have different temperature characteristics.
The regulation method of the offset voltage regulation circuit of the operational amplifier comprises the following steps:
step B1, at temperature T 3 Under the condition of testing the offset voltage V of the operational amplifier when the third adjustable current source and the fourth adjustable current source are not in operation 30 Offset voltage V of operational amplifier in MSB pre-trimming mode of third adjustable current source 31 And offset voltage V of operational amplifier in MSB pre-trimming mode of fourth adjustable current source 32 ；
Step B2, at temperature T 4 Under the condition of testing the offset voltage V of the operational amplifier when the third adjustable current source and the fourth adjustable current source are not in operation 40 Offset voltage V of operational amplifier in MSB pre-trimming mode of third adjustable current source 41 And offset voltage V of operational amplifier in MSB pre-trimming mode of fourth adjustable current source 42 The method comprises the steps of carrying out a first treatment on the surface of the Wherein T is 3 ≠T 4 ；
Step B3, calculating the following formula
LSB A3 =（V 31 -V 30 ）/Q, LSB( B3) =（V 32 -V 30 ）/Q
LSB A4 =（V 41 -V 40 ）/Q, LSB( B4 )=（V 42 -V 40 ）/Q
Wherein LSB is A3 At a temperature T 3 Minimum trimming bit trimming range and LSB of third adjustable current source under condition B3 At a temperature T 3 Minimum trimming bit trimming range and LSB of fourth adjustable current source under condition A4 At a temperature T 4 Of a third adjustable current source under conditionsMinimum trimming bit trimming range, LSB B4 At a temperature T 4 The minimum trimming bit trimming range of the fourth adjustable current source under the condition; q is a fixed value;
then the following equations are combined to solve the control word:
M*LSB A3 +N* LSB B3 = V 30
M*LSB A4 +N* LSB B4 = V 40
wherein M is a trimming control word of the third adjustable current source, and N is a trimming control word of the fourth adjustable current source.
The above temperature T 3 Setting the temperature to be 0 ℃ and the temperature T 4 Set at 70 ℃.
In the step B1, the offset voltage V of the operational amplifier is tested when the third and fourth adjustable current sources are not operated 30 Simultaneously controlling the fifth to eighth switches to be turned off;
in the step B2, the offset voltage V of the operational amplifier is tested when the third and fourth adjustable current sources are not in operation 40 Simultaneously controlling the fifth to eighth switches to be turned off;
in the step B1 and the step B2, when the offset voltage of the operational amplifier in the MSB pre-trimming mode of the third adjustable current source is tested, the fifth switch is controlled to be closed, the sixth switch, the seventh switch and the eighth switch are controlled to be opened, and the third adjustable current source is enabled to work in the MSB pre-trimming mode;
in the step B1 and the step B2, when the offset voltage of the operational amplifier in the MSB pre-trimming mode of the fourth adjustable current source is tested, the seventh switch is controlled to be turned on, the fifth switch, the sixth switch and the eighth switch are controlled to be turned off, and the fourth adjustable current source is enabled to work in the MSB pre-trimming mode.
After the scheme is adopted, the adjustable current sources with different temperature characteristics are arranged, the pre-trimming and testing are carried out under two different temperature conditions, and trimming control words which can correct the offset voltage to be close to 0 under the two temperature conditions can be obtained through operation, so that the correction of the offset voltage temperature drift coefficient is realized, the influence of temperature change on the offset voltage of the operational amplifier is reduced, the precision of the operational amplifier is improved, and the accuracy of the measurement result of the electronic system is improved.
Drawings
FIG. 1 is a schematic diagram of a prior art offset voltage regulation circuit;
FIG. 2 is a schematic diagram of an offset voltage control circuit applied to PMOS input pair tubes;
FIG. 3 is a flow chart of the offset voltage regulation method provided by the invention;
FIG. 4 is a graph showing the comparison of the effects of the embodiment of FIG. 2 with the conventional trimming method;
fig. 5 is a schematic diagram of an offset voltage adjusting circuit applied to an NMOS input pair transistor according to the present invention.
Detailed Description
The technical scheme and beneficial effects of the present invention will be described in detail below with reference to the accompanying drawings.
As shown in fig. 2, the invention provides an operational amplifier offset voltage regulating circuit, wherein the operational amplifier comprises a PMOS input pair tube, a tail current, a load circuit and a common source amplifying circuit which are sequentially connected, wherein the input pair tube is composed of two PMOS tubes PM1 and PM2, the sources of the PM1 and PM2 are both connected to the output end of a current source I0, and the input end of the current source I0 is connected with a power supply; the drains of PM1 and PM2 are respectively connected to a load circuit; this is a common structure of the operational amplifier and will not be described in detail.
The improvement points of the invention are that: the power supply further comprises an adjustable current source A, an adjustable current source B and 4 switches S0, S1, S2 and S3, wherein one end of the adjustable current source A, B is connected to a power supply, the other end of the adjustable current source A is respectively connected with one ends of the switches S0 and S1, and the other ends of the switches S0 and S1 are respectively connected with drains of PM1 and PM2 in input pair tubes; the other end of the adjustable current source B is respectively connected with one ends of the switches S2 and S3, and the other ends of the switches S2 and S3 are respectively connected with drains of PM1 and PM2 in the input pair tubes. According to the invention, the adjustable current source A and the adjustable current source B with different temperature characteristics are used for pre-trimming and testing under two different temperature conditions, and trimming control words which can correct offset voltage to be close to 0 under the two temperature conditions can be obtained through operation, so that the correction of offset voltage temperature drift coefficients is realized.
The invention also provides a regulating and controlling method for the offset voltage of the operational amplifier, which is matched with the method shown in figure 3, and comprises the following steps:
(1) Temperature T of the process 1 And (3) testing the following offset voltage: the switches S0-S3 are disconnected, at the moment, none of the adjustable current sources A, B participate in the work, and at the temperature T 1 Under the condition of testing the offset voltage of the operational amplifier, the offset voltage is recorded as V 10 The method comprises the steps of carrying out a first treatment on the surface of the Temperature T 1 Can be set according to actual conditions, in the present embodiment, the temperature T can be set 1 Is 0 ℃;
(2) Still at temperature T 1 Under the condition that the control switch S0 is closed, the switches S1 to S3 are opened, and the adjustable current source A is controlled to enter an MSB pre-trimming mode, the offset voltage of the operational amplifier under the condition is tested and is recorded as V 11 The method comprises the steps of carrying out a first treatment on the surface of the Then keeping the temperature T1 unchanged, controlling the switch S2 to be closed, opening the switches S0, S1 and S3, entering an MSB pre-trimming mode of the adjustable current source B, and testing the offset voltage of the operational amplifier again, namely V 12 ；
(3) Temperature T of the process 2 And (3) testing the following offset voltage: changing the temperature condition, under the condition of the temperature T2, firstly testing the offset voltage of the operational amplifier under the condition that all the switches S0 to S3 are opened, and recording the offset voltage as V20; temperature T 2 Can be set according to actual conditions, in the present embodiment, the temperature T can be set 2 Is 70 ℃;
(4) Maintaining temperature T 2 The condition is unchanged, and (2) the switch S0 is controlled to be closed, the switches S1 to S3 are opened, the operation amplifier enters an MSB pre-trimming mode of the adjustable current source A, and the offset voltage of the operation amplifier at the moment is tested and recorded as V 21 The method comprises the steps of carrying out a first treatment on the surface of the Then likewise at temperature T 2 Under the condition that the control switch S2 is closed, the switches S0, S1 and S3 are opened, the MSB pre-trimming mode of the adjustable current source B is entered, the offset voltage of the operational amplifier is tested and recorded as V 22 ；
(5) Based on the parameters, calculating a trimming control word M of the adjustable current source A and a trimming control word N of the adjustable current source B according to the following method;
temperature T 1 The LSB of the lower adjustable current source A is marked as LSB A1 Temperature T 1 The LSB of the lower adjustable current source B is marked as LSB B1 ；
Temperature T 2 The LSB of the lower adjustable current source A is marked as LSB A2 Temperature T 2 The LSB of the lower adjustable current source B is marked as LSB B2 ；
The method comprises the following steps:
LSB A1 =（V 11 -V 10 ）/Q, LSB B1 =（V 12 -V 10 ）/Q
LSB A2 =（V 21 -V 20 ）/Q, LSB B2 =（V 22 -V 20 ）/Q
wherein Q is a fixed value and can be set according to actual conditions; if the adjustable current source A is at the temperature T 1 、T 2 The maximum trimming bit trimmable ranges under are MSBs respectively A1 、MSB A2 Then there is MSB A1 =Q*LSB A1 ，MSB A2 =Q*LSB A2 The method comprises the steps of carrying out a first treatment on the surface of the If the adjustable current source B is at the temperature T 1 、T 2 The maximum trimming bit trimmable ranges under are MSBs respectively B1 、MSB B2 Then there is MSB B1 =Q*LSB B1 ，MSB B2 =Q*LSB B2 ；
The control word is found by the following equations in parallel:
M*LSB A1 +N* LSB B1 = V 10
M*LSB A2 +N* LSB B2 = V 20
for the same operational amplifier, fig. 4 shows the comparison effect of the prior regulation mode and the present invention, so that the present invention can control the temperature drift phenomenon caused by the offset voltage well.
The MSB pre-trimming mode of the adjustable current source refers to a mode of adjusting the adjustable current source to a mode of maximizing a trimming range of one bit in the control word.
It should be noted that, the embodiment of the invention provides an offset voltage regulation circuit applied to an operational amplifier with a PMOS tube forming an input pair tube, and the same can be obtained, for the operational amplifier with an NMOS tube forming an input pair tube, the regulation circuit can also be provided with two adjustable current sources and two pairs of switches, and can be matched with fig. 5, wherein the input end of a tail current source is connected with the NMOS input pair tube, the output end of the tail current source is grounded, one ends of the two adjustable current sources are grounded, the other ends are respectively correspondingly connected with one ends of a pair of switches, and the other ends of the two switches in the same pair of switches are respectively connected with the drains of the two NMOS tubes. By adopting the regulation method, the regulation control words of the two adjustable current sources can be obtained.
The above embodiments are only for illustrating the technical idea of the present invention, and the protection scope of the present invention is not limited thereto, and any modification made on the basis of the technical scheme according to the technical idea of the present invention falls within the protection scope of the present invention.
Claims (6)
1. The operational amplifier comprises a PMOS input pair tube and tail current, and specifically comprises a first PMOS tube, a second PMOS tube and a first tail current source, wherein a grid electrode of the first PMOS tube is connected with a forward input end INP, and a grid electrode of the second PMOS tube is connected with an inverting input end INN; the source electrode of the first PMOS tube and the source electrode of the second PMOS tube are both connected to the output end of the first tail current source, and the input end of the first tail current source is connected with a power supply; the operational amplifier offset voltage regulating circuit comprises a first adjustable current source, a second adjustable current source and first-fourth switches, wherein one end of the first adjustable current source and one end of the second adjustable current source are connected to a power supply, the other end of the first adjustable current source is respectively connected with one end of the first switch and one end of the second switch, and the other end of the first switch and the other end of the second switch are respectively connected with a drain electrode of a first PMOS tube and a drain electrode of the second PMOS tube; the other end of the second adjustable current source is respectively connected with one end of the third switch and one end of the fourth switch, and the other end of the third switch and the other end of the fourth switch are respectively connected with the drain electrode of the first PMOS tube and the drain electrode of the second PMOS tube; the temperature characteristics of the first adjustable current source and the second adjustable current source are different;
the method is characterized by comprising the following steps of:
step A1, at temperature T 1 Under the condition of testing the offset voltage V of the operational amplifier when the first adjustable current source and the second adjustable current source are not in operation 10 Offset voltage V of operational amplifier in MSB pre-trimming mode of first adjustable current source 11 And offset voltage V of operational amplifier in MSB pre-trimming mode of second adjustable current source 12 ；
Step A2, at temperature T 2 Under the condition of testing the offset voltage V of the operational amplifier when the first adjustable current source and the second adjustable current source are not in operation 20 Offset voltage V of operational amplifier in MSB pre-trimming mode of first adjustable current source 21 And offset voltage V of operational amplifier in MSB pre-trimming mode of second adjustable current source 22 The method comprises the steps of carrying out a first treatment on the surface of the Wherein T is 1 ≠T 2 ；
Step A3, calculating the following formula
LSB A1 =（V 11 -V 10 ）/Q, LSB B1 =（V 12 -V 10 ）/Q
LSB A2 =（V 21 -V 20 ）/Q, LSB B2 =（V 22 -V 20 ）/Q
Wherein LSB is A1 At a temperature T 1 Minimum trimming bit trimming range and LSB (least significant bit) of first adjustable current source under condition B1 At a temperature T 1 Minimum trimming bit trimming range and LSB of second adjustable current source under condition A2 At a temperature T 2 Minimum trimming bit trimming range and LSB (least significant bit) of first adjustable current source under condition B2 At a temperature T 2 The minimum trimming bit trimming range of the second adjustable current source under the condition; q is a fixed value;
then the following equations are combined to solve the control word:
M*LSB A1 +N* LSB B1 = V 10
M*LSB A2 +N* LSB B2 = V 20
wherein M is a trimming control word of the first adjustable current source, and N is a trimming control word of the second adjustable current source.
2. The method of regulation and control of claim 1, wherein: said temperature T 1 Setting the temperature to be 0 ℃ and the temperature T 2 Set at 70 ℃.
3. The method of regulation and control of claim 1, wherein: in the step A1, the offset voltage V of the operational amplifier is tested when the first and second adjustable current sources are not in operation 10 When the first switch is turned on, the second switch is turned off;
in the step A2, the offset voltage V of the operational amplifier is tested when the first and second adjustable current sources are not in operation 20 When the first switch is turned on, the second switch is turned off;
in the step A1 and the step A2, when the offset voltage of the operational amplifier in the MSB pre-trimming mode of the first adjustable current source is tested, the first switch is controlled to be closed, the second switch, the third switch and the fourth switch are controlled to be opened, and the first adjustable current source is enabled to work in the MSB pre-trimming mode;
in the step A1 and the step A2, when the offset voltage of the operational amplifier in the MSB pre-trimming mode of the second adjustable current source is tested, the third switch is controlled to be closed, the first switch, the second switch and the fourth switch are controlled to be opened, and the second adjustable current source is enabled to work in the MSB pre-trimming mode.
4. The operational amplifier comprises NMOS input pair tubes and tail current, and specifically comprises a first NMOS tube, a second NMOS tube and a second tail current source, wherein a grid electrode of the first NMOS tube is connected with an inverting input end INN, and a grid electrode of the second NMOS tube is connected with a forward input end INP; the source electrode of the first NMOS tube and the source electrode of the second NMOS tube are connected to the input end of the second tail current source, and the output end of the second tail current source is grounded; the operational amplifier offset voltage regulating circuit comprises a third adjustable current source, a fourth adjustable current source and fifth-eighth switches, wherein one end of the third adjustable current source and one end of the fourth adjustable current source are grounded, the other end of the third adjustable current source is respectively connected with one end of the fifth switch and one end of the sixth switch, and the other end of the fifth switch and the other end of the sixth switch are respectively connected with the drain electrode of the first NMOS tube and the drain electrode of the second NMOS tube; the other end of the fourth adjustable current source is respectively connected with one end of the seventh switch and one end of the eighth switch, and the other end of the seventh switch and the other end of the eighth switch are respectively connected with the drain electrode of the first NMOS tube and the drain electrode of the second NMOS tube; the third adjustable current source and the fourth adjustable current source have different temperature characteristics;
the method is characterized by comprising the following steps of:
step B1, at temperature T 3 Under the condition of testing the offset voltage V of the operational amplifier when the third adjustable current source and the fourth adjustable current source are not in operation 30 Offset voltage V of operational amplifier in MSB pre-trimming mode of third adjustable current source 31 And offset voltage V of operational amplifier in MSB pre-trimming mode of fourth adjustable current source 32 ；
Step B2, at temperature T 4 Under the condition of testing the offset voltage V of the operational amplifier when the third adjustable current source and the fourth adjustable current source are not in operation 40 Offset voltage V of operational amplifier in MSB pre-trimming mode of third adjustable current source 41 And offset voltage V of operational amplifier in MSB pre-trimming mode of fourth adjustable current source 42 The method comprises the steps of carrying out a first treatment on the surface of the Wherein T is 3 ≠T 4 ；
Step B3, calculating the following formula
LSB A3 =（V 31 -V 30 ）/Q, LSB B3 =（V 32 -V 30 ）/Q
LSB A4 =（V 41 -V 40 ）/Q, LSB B4 =（V 42 -V 40 ）/Q
Wherein LSB is A3 At a temperature T 3 Minimum trimming bit trimming range and LSB of third adjustable current source under condition B3 At a temperature T 3 Minimum trimming bit trimming range and LSB of fourth adjustable current source under condition A4 At a temperature T 4 Minimum trimming bit trimming range and LSB of third adjustable current source under condition B4 At a temperature T 4 The minimum trimming bit trimming range of the fourth adjustable current source under the condition; q is a fixed value;
then the following equations are combined to solve the control word:
M*LSB A3 +N* LSB B3 = V 30
M*LSB A4 +N* LSB B4 = V 40
wherein M is a trimming control word of the third adjustable current source, and N is a trimming control word of the fourth adjustable current source.
5. The method of regulation and control of claim 4, wherein: said temperature T 3 Setting the temperature to be 0 ℃ and the temperature T 4 Set at 70 ℃.
6. The method of regulation and control of claim 4, wherein: in the step B1, the offset voltage V of the operational amplifier is tested when the third and fourth adjustable current sources are not in operation 30 Simultaneously controlling the fifth to eighth switches to be turned off;
in the step B2, the offset voltage V of the operational amplifier is tested when the third and fourth adjustable current sources are not in operation 40 Simultaneously controlling the fifth to eighth switches to be turned off;
in the step B1 and the step B2, when the offset voltage of the operational amplifier in the MSB pre-trimming mode of the third adjustable current source is tested, the fifth switch is controlled to be closed, the sixth switch, the seventh switch and the eighth switch are controlled to be opened, and the third adjustable current source is enabled to work in the MSB pre-trimming mode;
in the step B1 and the step B2, when the offset voltage of the operational amplifier in the MSB pre-trimming mode of the fourth adjustable current source is tested, the seventh switch is controlled to be turned on, the fifth switch, the sixth switch and the eighth switch are controlled to be turned off, and the fourth adjustable current source is enabled to work in the MSB pre-trimming mode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311083458.3A CN116805859B (en) | 2023-08-28 | 2023-08-28 | Operational amplifier offset voltage regulation circuit and method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311083458.3A CN116805859B (en) | 2023-08-28 | 2023-08-28 | Operational amplifier offset voltage regulation circuit and method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN116805859A CN116805859A (en) | 2023-09-26 |
| CN116805859B true CN116805859B (en) | 2023-11-07 |
Family
ID=88079734
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202311083458.3A Active CN116805859B (en) | 2023-08-28 | 2023-08-28 | Operational amplifier offset voltage regulation circuit and method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116805859B (en) |
Citations (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6788143B1 (en) * | 2002-04-29 | 2004-09-07 | National Semiconductor Corporation | Cascode stage for an operational amplifier |
| CN203630655U (en) * | 2013-12-12 | 2014-06-04 | 杭州士兰微电子股份有限公司 | Wheatstone bridge device |
| CN104460805A (en) * | 2014-12-17 | 2015-03-25 | 内蒙古科技大学 | Reference current source with low temperature coefficient and low power supply voltage coefficient |
| CN105487587A (en) * | 2015-12-21 | 2016-04-13 | 成都华微电子科技有限公司 | Calibration circuit of high-precision digital temperature sensor |
| JP2019096970A (en) * | 2017-11-20 | 2019-06-20 | ローム株式会社 | Operational amplifier, semiconductor device |
| CN110597345A (en) * | 2019-09-27 | 2019-12-20 | 宜确半导体（苏州）有限公司 | Bandgap reference circuit and method of operating the same |
| CN111049486A (en) * | 2018-10-11 | 2020-04-21 | 半导体元件工业有限责任公司 | Offset voltage trimming for operational amplifiers |
| CN111669130A (en) * | 2019-12-03 | 2020-09-15 | 西安电子科技大学 | Automatic eliminating circuit for input offset voltage of operational amplifier |
| CN212486464U (en) * | 2020-07-24 | 2021-02-05 | 宜矽源半导体南京有限公司 | Input end offset voltage adjustable operational amplifier |
| CN212588311U (en) * | 2020-04-23 | 2021-02-23 | 深圳芯森微电子有限公司 | Configurable low-frequency high-pass filter |
| CN115118231A (en) * | 2022-07-22 | 2022-09-27 | 深圳前海维晟智能技术有限公司 | Method, device and circuit for trimming offset voltage of operational amplifier |
| CN115811371A (en) * | 2022-12-08 | 2023-03-17 | 厦门亿芯源半导体科技有限公司 | Threshold programmable loss of signal detection circuit with temperature and process compensation |
| CN115833761A (en) * | 2022-11-23 | 2023-03-21 | 深圳市乾鸿微电子有限公司 | Method for adjusting and calibrating offset voltage of operational amplifier by adjustable current source |
| CN116470890A (en) * | 2023-05-06 | 2023-07-21 | 湖南毂梁微电子有限公司 | Hysteresis comparison circuit and electronic equipment |
| CN219536034U (en) * | 2022-11-15 | 2023-08-15 | 贵州振华风光半导体股份有限公司 | Digital trimming circuit and operational amplifier |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7911244B2 (en) * | 2007-11-30 | 2011-03-22 | Sony Corporation | Differential drive circuit and communication device |
-
2023
- 2023-08-28 CN CN202311083458.3A patent/CN116805859B/en active Active
Patent Citations (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6788143B1 (en) * | 2002-04-29 | 2004-09-07 | National Semiconductor Corporation | Cascode stage for an operational amplifier |
| CN203630655U (en) * | 2013-12-12 | 2014-06-04 | 杭州士兰微电子股份有限公司 | Wheatstone bridge device |
| CN104460805A (en) * | 2014-12-17 | 2015-03-25 | 内蒙古科技大学 | Reference current source with low temperature coefficient and low power supply voltage coefficient |
| CN105487587A (en) * | 2015-12-21 | 2016-04-13 | 成都华微电子科技有限公司 | Calibration circuit of high-precision digital temperature sensor |
| JP2019096970A (en) * | 2017-11-20 | 2019-06-20 | ローム株式会社 | Operational amplifier, semiconductor device |
| CN111049486A (en) * | 2018-10-11 | 2020-04-21 | 半导体元件工业有限责任公司 | Offset voltage trimming for operational amplifiers |
| CN110597345A (en) * | 2019-09-27 | 2019-12-20 | 宜确半导体（苏州）有限公司 | Bandgap reference circuit and method of operating the same |
| CN111669130A (en) * | 2019-12-03 | 2020-09-15 | 西安电子科技大学 | Automatic eliminating circuit for input offset voltage of operational amplifier |
| CN212588311U (en) * | 2020-04-23 | 2021-02-23 | 深圳芯森微电子有限公司 | Configurable low-frequency high-pass filter |
| CN212486464U (en) * | 2020-07-24 | 2021-02-05 | 宜矽源半导体南京有限公司 | Input end offset voltage adjustable operational amplifier |
| CN115118231A (en) * | 2022-07-22 | 2022-09-27 | 深圳前海维晟智能技术有限公司 | Method, device and circuit for trimming offset voltage of operational amplifier |
| CN219536034U (en) * | 2022-11-15 | 2023-08-15 | 贵州振华风光半导体股份有限公司 | Digital trimming circuit and operational amplifier |
| CN115833761A (en) * | 2022-11-23 | 2023-03-21 | 深圳市乾鸿微电子有限公司 | Method for adjusting and calibrating offset voltage of operational amplifier by adjustable current source |
| CN115811371A (en) * | 2022-12-08 | 2023-03-17 | 厦门亿芯源半导体科技有限公司 | Threshold programmable loss of signal detection circuit with temperature and process compensation |
| CN116470890A (en) * | 2023-05-06 | 2023-07-21 | 湖南毂梁微电子有限公司 | Hysteresis comparison circuit and electronic equipment |
Also Published As
| Publication number | Publication date |
|---|---|
| CN116805859A (en) | 2023-09-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5838199A (en) | Multi-stage high-performance amplifier | |
| JP4725441B2 (en) | Differential amplifier | |
| US20070024368A1 (en) | Differential amplifiers with enhanced gain and dynamic range | |
| JP4188931B2 (en) | Operational amplifier and offset voltage canceling method for operational amplifier | |
| US20050275453A1 (en) | Current-mode instrumentation amplifier gain error correction circuitry | |
| TW201208257A (en) | Offset calibration and precision hysteresis for a rail-rail comparator with large dynamic range | |
| CN110168894B (en) | Voltage regulating circuit | |
| CN112886931A (en) | Digital weighted current source circuit for eliminating offset error of operational amplifier | |
| US9941852B1 (en) | Operation amplifiers with offset cancellation | |
| CN112039444B (en) | Gain amplifier for improving variation range of positive temperature coefficient | |
| CN101881984B (en) | Reference signal generator and method and system thereof | |
| CN116700418A (en) | Accurate adjustable circuit of clamp voltage | |
| US6472932B2 (en) | Transconductor and filter circuit | |
| US20200050231A1 (en) | Reference current source and semiconductor device | |
| CN116805859B (en) | Operational amplifier offset voltage regulation circuit and method | |
| US7068090B2 (en) | Amplifier circuit | |
| WO2001084705A1 (en) | System and method for optimal biasing of a telescopic cascode operational transconductance amplifier (ota) | |
| US8179194B2 (en) | System and method for a reference generator | |
| CN210609074U (en) | Rail-to-rail operational amplifier capable of correcting offset voltage | |
| CN115729304B (en) | LDO high temperature leakage eliminating circuit | |
| CN115857601A (en) | High-performance band-gap reference circuit | |
| US20120133539A1 (en) | Comparator Circuit | |
| KR20050066046A (en) | Temperature compensated complementary metal oxide semiconductor exponential function generator circuit | |
| JP2008017336A (en) | Amplifier | |
| CN220473900U (en) | Linear voltage-stabilizing power driving circuit with double current outputs |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |