CN112997147A - 实施于存储器中的向量寄存器 - Google Patents

实施于存储器中的向量寄存器 Download PDF

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CN112997147A
CN112997147A CN201980073577.6A CN201980073577A CN112997147A CN 112997147 A CN112997147 A CN 112997147A CN 201980073577 A CN201980073577 A CN 201980073577A CN 112997147 A CN112997147 A CN 112997147A
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T·P·芬克拜纳
T·D·拉森
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Micron Technology Inc
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    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
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    • G06COMPUTING; CALCULATING OR COUNTING
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Abstract

本发明提供与在存储器中实施向量寄存器相关的***和方法。用于在存储器中实施向量寄存器的存储器***可包含存储器单元阵列,其中所述阵列中的多个行充当由指令集架构定义的多个向量寄存器。用于在存储器中实施向量寄存器的所述存储器***还可包含被配置成进行以下操作的处理资源:响应于接收到对特定向量寄存器执行特定向量操作的命令,存取所述阵列的充当所述特定寄存器的特定行以执行所述向量操作。

Description

实施于存储器中的向量寄存器
技术领域
本公开大体上涉及存储器,且更具体地说,涉及与实施于存储器中的向量寄存器相关联的设备和方法。
背景技术
存储器装置通常提供为计算机或其它电子装置中的内部半导体集成电路。存在许多不同类型的存储器,包含易失性和非易失性存储器。易失性存储器可需要电力来维持其数据,且包含随机存取存储器(RAM)、动态随机存取存储器(DRAM)和同步动态随机存取存储器(SDRAM)等等。非易失性存储器可通过当未被供电时保持所存储的数据而提供持久的数据,且可包含NAND快闪存储器、NOR快闪存储器、只读存储器(ROM)、电可擦除可编程ROM(EEPROM)、可擦除可编程ROM(EPROM)及电阻可变存储器,例如相变随机存取存储器(PCRAM)、电阻性随机存取存储器(RRAM)及磁阻随机存取存储器(MRAM)等等。
还利用存储器作为易失性和非易失性数据存储装置以用于广泛范围的电子应用。非易失性存储器可用于例如个人计算机、便携式内存条(memory stick)、数码相机、蜂窝电话、便携式音乐播放器例如MP3播放器、影片播放器和其它电子装置。存储器单元可布置成阵列,其中阵列在存储器装置中使用。
各种计算***包含耦合到存储器(例如,存储器***)的数个处理资源,所述存储器与执行一组指令(例如,程序、应用程序等)相关联地被访问。数种处理资源可存取存储于存储器中的数据。
附图说明
图1是根据本公开的数个实施例的包含存储器***并且能够映射实施于存储器单元阵列中的寄存器的计算***的框图。
图2是根据本公开的数个实施例的能够映射实施于存储器单元阵列中的寄存器的存储器组的框图。
图3是根据本公开的数个实施例的映射寄存器到向量寄存器的映射的框图。
具体实施方式
本公开包含与映射实施于存储器单元阵列中的寄存器相关的设备和方法。实例***可包含存储器单元阵列,其中所述阵列中的多个行充当如由指令集架构定义的多个向量寄存器。实例***还可包含处理资源,其被配置成响应于接收到对特定向量寄存器执行特定向量操作的命令,存取所述阵列的充当特定寄存器的特定行以执行向量操作。
计算***可包含与主机和/或例如中央处理单元(CPU)的处理资源对应的寄存器。寄存器存储数据以与从存储器检索数据的情况相比以较小持续时间满足对数据的请求。举例来说,与用以从存储器存取数据的时间相比,处理资源可在较小持续时间内存取存储于处理资源本地的寄存器中的数据。从存储器装置存取数据可包含通过总线传送数据,这与从寄存器检索数据相比可增加用以检索数据的持续时间,其中所述总线将存取数据的处理资源耦合到存储器装置。与从例如动态随机存取存储器(DRAM)阵列的存储器资源检索数据相比,可更快速地从寄存器检索数据。因而,实施处理资源本地的寄存器可为有利的。
实施处理资源本地的寄存器可包含将数据从存储器阵列移动到寄存器。与利用存储器阵列本身作为寄存器相比,将数据从所述阵列移动到寄存器可花费更长时间。实施处理资源本地的寄存器也可增加制造处理资源的成本。
在数个实例中,阵列的行可充当相应寄存器,这可提供例如减小阵列外部寄存器制造成本的益处和/或可通过减少与在阵列和外部寄存器之间移动数据相关联的时间来改进***操作。举例来说,存储器装置的阵列中的特定存储器单元行可用作相应向量寄存器。每一行可映射到特定向量寄存器。所述映射可在具有或不具有映射寄存器的情况下执行。
存储器装置本地的处理资源或存储器装置外部的处理资源可利用向量寄存器存取数据。举例来说,存储器装置本地的处理资源可为存储器中处理(PIM)处理资源、组控制器和/或应用程序处理器。
在本文中所描述的实例中,存储器资源外部的处理资源和存储器资源本地的处理资源可共享同一指令集。举例来说,外部处理资源和内部处理资源可共享指令集架构(ISA)。共享ISA为外部处理资源提供将外部处理资源本身可执行的指令提供给内部处理资源的能力。使用映射寄存器实施阵列中的向量寄存器有助于共享指令集的使用,条件是外部处理资源和/或内部处理资源两者均可使用有限映射寄存器集执行对寄存器引用而不会增加实施存储器***中的寄存器的成本。
在一些实例中,可在不使用映射寄存器的情况下实施向量寄存器。向量寄存器和阵列的行之间的映射可硬译码到存储器装置中。硬译码映射可将向量寄存器映射到行而不提供将向量寄存器重新指配给不同行的能力。
在本公开的以下详细描述中,参考形成本公开的一部分的附图,并且在附图中通过图示的方式示出可以如何实践本公开的多个实施例。足够详细地描述这些实施例以使得所属领域的一般技术人员能够实践本公开的实施例,且应理解,可利用其它实施例且可在不脱离本公开的范围的情况下进行工艺、电气和/或结构改变。如本文所使用,指定符“N”指示如此指定的多个特定特征可以包含在本公开的若干实施例中。
如本文中所使用,“若干”某物可指此类事物中的一或多个。举例来说,数个存储器装置可指一或多个存储器装置。“多个”某物意指两个或更多个。另外,如本文中所使用的例如“N”的指定符,尤其相对于图式中的附图标记,指示如此指定的若干特定特征可与本公开的若干实施例一起包含。
本文中的图遵循编号定则,其中第一的一或多个数字对应于图号,且剩余的数字标识图式中的元件或组件。可通过使用类似数字来标识不同图之间的类似元件或组件。如应了解,可添加、交换和/或去除本文中的各种实施例中展示的元件,从而提供本公开的多个额外实施例。另外,图中所提供的元件的比例和相对比例既定说明本公开的各种实施例,并且不会以限制性意义来使用。
图1是根据本公开的数个实施例的包含存储器***116并且能够映射实施于存储器单元阵列中的寄存器的计算***100的框图。计算***100包含主机103和存储器***116。主机103包含处理资源102,以及其它可能装置,例如寄存器(未示出)。存储器***116包含映射寄存器106、处理资源108和存储器阵列110,以及其它可能的装置。
如本文中所使用,“设备”可以指但不限于多种结构或结构组合,例如电路或电路***、裸片或一或多个裸片、一或多个装置,或一或多个***。举例来说,***100、处理资源102、映射寄存器106、处理资源108、存储器阵列110和/或存储器***116可单独地被称作“设备”。
存储器***116包含数个存储器装置,示出了其中的一个。存储器装置可包括数个物理存储器“芯片”或裸片,其可各自包含数个存储器单元阵列(例如,组)和与存取阵列(例如,从阵列读取数据和将数据写入到阵列)相关联的对应支持电路***(例如,地址电路***、I/O电路***、控制电路***、读取/写入电路***等)。作为实例,存储器装置可包含数个DRAM装置、SRAM装置、PCRAM装置、RRAM装置、FeRAM、相变存储器、3DXP和/或快闪存储器装置。存储器装置也可包括单一物理存储器“芯片”或裸片,其可包含数个存储器单元阵列(例如,组)和与存取阵列(例如,从阵列读取数据和将数据写入到阵列)相关联的对应支持电路***(例如,地址电路***、I/O电路***、控制电路***、读取/写入电路***等)。在数个实施例中,存储器***116可充当用于计算***的主存储器。
在此实例中,计算***100包含经由总线105耦合到存储器***116的主机103。计算***100可为手提式计算机、个人计算机、数码相机、数字记录和重放装置、移动电话、PDA、存储卡读卡器、接口集线器、传感器、具物联网(IoT)功能的装置,以及其它***,且处理资源102可为能够经由处理资源108存取阵列的数个处理资源(例如,一或多个处理器)。主机103可负责执行操作***(OS)和/或可(例如,从存储器***116和/或处理资源108)加载到其上的各种应用程序。
处理资源108还可包含状态机、定序器和/或某一其它类型的控制电路***,其可以耦合到印刷电路板的专用集成电路(ASIC)的形式实施。处理资源108可为控制器,例如组控制器。在一些实例中,组控制器可使用映射寄存器106对存储于阵列110中的数据执行向量操作。向量操作可从主机103接收和/或可从阵列110检索。组控制器可执行多种类型的操作,包含向量操作、读取操作和写入操作,以及其它类型的操作。
在一些情况下,主机103和/或处理资源108可为应用程序处理器。应用程序处理器可与存储器***116处于同一存储器裸片上。
在一些实例中,存储器装置116可为能够执行处理的PIM装置。作为由处理资源102执行的处理的补充或代替,PIM装置可执行处理。举例来说,存储器装置116可包含如图2所示的阵列110的感测电路***中的处理资源。PIM装置可在无需将数据移动出阵列110和/或感测电路***的情况下执行处理功能。
如本文中所使用,向量操作包含使用多个值执行的操作。举例来说,向量加法操作可使用多个数据值并行地执行多个加法操作。举例来说,向量加法操作可包含第一加法操作和第二加法操作。可使用第一数据值和第二数据值执行第一加法操作,同时可使用第三数据值和第四数据值执行第二加法操作。向量操作不受限于加法操作和/或减法操作,而是可包含逻辑操作,包含加法操作、减法操作、乘法操作、除法操作和/或逆操作,以及其它类型的逻辑操作。逻辑操作还可包含逐位操作,包含合取(conjunction)操作(例如,AND操作)和/或分离(disjunction)操作(例如,OR操作),以及其它逐位操作。
如本文中所使用,值(例如,数据值)可包含一或多个位的分组。多个值可组合成向量。举例来说,数据向量可包含513个值,其中利用32位定义所述513个值中的每一个。在一些实例中,值向量可为多个值到单一向量分组。
读取和写入操作可用以操控存储于阵列110中的数据。举例来说,读取操作可将数据从阵列110传送到处理资源102和/或108。写入操作可存储处理资源102和/或108接收到的数据,其中所述数据存储于阵列110中。
处理资源108可利用存储于存储器阵列110中的数据在向量寄存器中执行逻辑操作和/或向量操作。举例来说,处理资源102可通过总线105将指令提供给处理资源108。所述指令可标识将通过引用存储向量数据的一或多个向量寄存器执行的逻辑操作。向量寄存器可包括阵列110的多个存储器单元。
映射寄存器106可将存储器单元映射到向量寄存器的标识(ID),使得对向量寄存器的引用可解算到阵列110的存储器单元。在一些实例中,逻辑操作可引用存储数据的向量寄存器。举例来说,逻辑操作可为加法操作,其使用第一寄存器标识符和第二寄存器标识符引用第一向量寄存器和第二向量寄存器。可利用映射寄存器106m、第一寄存器标识符和/或第二寄存器标识符解算对寄存器的引用。举例来说,第一寄存器可通过第一寄存器标识符与第一映射寄存器相关联,且第二寄存器可通过第二寄存器标识符与第二映射寄存器相关联。
第一映射寄存器可存储阵列110的第一存储器地址,所述第一存储器地址标识存储器单元的存储第一向量值的第一行。存储器单元行可包含共同耦合到存储器阵列110的存取线的多个存储器单元。第二映射寄存器可存储阵列110的第二存储器地址,所述第二存储器地址标识存储器单元的存储第二向量值的第二行。
处理资源108可利用从映射寄存器106检索的第一存储器地址和第二存储器地址检索第一值和第二值。处理资源108可利用第一值和第二值执行加法操作。
在一些实例中,处理资源102可提供将存储于存储器***116的向量寄存器中的向量数据。向量数据可经由可包括例如采用适当协议的物理接口(例如总线(例如,总线105))的接口在主机103和存储器***116之间进行传送。此类协议可为自定义的或专用的。总线105可采用标准化协议,例如***组件互连高速(PCIe)、Gen-Z、CCIX等。作为实例,总线105可包括用于相应地址、命令和数据信号的组合地址、命令和数据总线或单独总线。
与存储于和处理资源102对应的寄存器中的位数量相比,映射寄存器106可存储较少位数。映射寄存器106可存储与阵列110对应的存储器地址。在一些实例中,存储于映射寄存器106中的存储器地址可标识单个存储器单元或多个存储器单元。举例来说,映射寄存器106可利用16位存储存储器地址。不过,映射寄存器106可利用更多或更少位存储存储器地址。
映射寄存器106可与向量寄存器ID相关联。举例来说,第一映射寄存器可存储存储器地址并且可与向量寄存器ID相关联。映射寄存器106可将向量寄存器ID乃至向量寄存器映射到阵列110的存储器单元。向量寄存器到存储器单元的映射提供对作为向量寄存器的存储器单元的存取,且不会带来单独地实施存储器单元和向量寄存器的附加费用。
在一些实例中,映射寄存器106可包括单个映射寄存器或多个映射寄存器。在利用单个映射寄存器的个例中,映射寄存器可存储存储器单元的地址,所述存储器单元存储向量数据。处理资源108可从映射寄存器提取第一存储器地址。处理资源108可从具有第一存储器地址的第一存储器单元群组提取向量数据。处理资源108接着可利用向量数据执行向量操作。
处理资源108可被配置成执行逻辑操作和/或向量操作。处理资源可被配置成例如利用处理资源108实施的核心能力的扩展执行向量操作。
图2是根据本公开的数个实施例的能够映射实施于存储器单元阵列中的寄存器的存储器组220的框图。存储器组220包含处理资源208、映射寄存器206和存储器阵列210。映射寄存器206、处理资源208和存储器阵列210类似于图1中的映射寄存器106、处理资源108和存储器阵列110。
在此实例中,存储器阵列210是一个晶体管一个电容器(1T1C)存储器单元270-0、……、270-M、271-0、……、271-M、272-0、……、272-M、273-0、……、273-M、……、27N-0、……、27N-M(例如,被称为存储器单元270)的DRAM阵列,所述存储器单元各自包括存取装置224(例如,晶体管)和存储元件226(例如,电容器)。
在数个实施例中,存储器单元270是破坏性读取存储器单元(例如,读取存储于单元中的数据会破坏数据,使得最初存储于单元中的数据在读取之后被刷新)。存储器单元270也可为非破坏性读取存储器单元(例如,读取存储于单元中的数据不会破坏数据)。因而,存储器单元270可为易失性或非易失性存储器单元。
存储器单元270布置于通过存取线228-0(行0)、228-1(行1)、228-2(行2)、228-3(行3)、……、228-N(行N)(例如,统称为存取线228)耦合的行和感测线(例如,数字线)222-0(D)、222-1(D_)、222-M(D)、222-M+1(D_)(例如,统称为感测线222)耦合的列中。在数个实施例中,阵列210可包含耦合到单独电路***的地址空间。
存取线在本文中可以被称为字线或选择线。感测线在本文中可以被称为数字线或数据线。
在此实例中,单元的每一列与例如互补感测线222-0(D)和222-1(D_)的互补感测线对相关联。图2中所说明的结构可用于提供多个互补感测线222、存取线228和/或存储器单元270。虽然图2中仅说明存储器单元270的四个列,但实施例不限于此。举例来说,特定阵列可具有数个单元列和/或感测线(例如,4,096、8,192、16,384等)。在图2中,存储器单元270-0到27N-0耦合到感测线222-0。虽然存储器单元27N-0示出个位上的变量N,但应理解,存储器单元27N-0可为大于270-0的任何数目。特定单元晶体管224的栅极耦合到来自存取线228-0到228-N(例如,统称为存取线228)中的与其对应的存取线,第一源极/漏极区耦合到其对应的感测线222-0,且特定单元晶体管的第二源极/漏极区耦合到其对应的电容器(例如,电容器226)。虽然在图2中未说明,但感测线222-1和222-M+1也可具有耦合到其上的存储器单元。
在数个实例中,耦合到感测线222-0的存储器单元270可存储位。所述位可表示值和/或数个值的逻辑表示。举例来说,第一值可由可沿着存取线228-0存储于存储器单元270-0、存储器单元270-1和存储器单元270-2中的三个位向量表示。在数个实例中,位向量可由比图2中的论述那些位更多或更少的位表示。其它实例位向量可由4位向量、8位向量、16位向量和/或32位向量以及其它位向量尺寸表示。在数个实例中,相较于沿着感测线222竖直存储,值的每一位向量表示可沿着存取线228水平地存储。
在一些情况下,可并行激活耦合到存取线228-0和数个感测线(例如,感测线222-0到感测线222-M+1)的存储器单元。此外,也可并行激活存储器单元270-0、存储器单元270-1、存储器单元270-2、存储器单元270-3。在数个实例中,可与并行激活数个存储器单元并行地激活独立地定址的存取线228和/或感测线222。
存储器阵列210也可包括感测组件230-1到230-M,其通常可被称为感测组件230。感测组件230也可被称作感测电路***。图2还示出耦合到存储器阵列210的感测组件230。感测组件230-0耦合到与存储器单元的特定列对应的互补感测线D、D_,且感测组件230-M耦合到互补感测线。感测组件230可操作以确定存储于所选单元(例如,存储器单元270)中的状态(例如,逻辑数据值)。实施例不限于给定感测放大器架构或类型。举例来说,根据本文中所描述的数个实施例,感测电路***可包含电流模式感测放大器和/或单端感测放大器(例如,耦合到一个感测线的感测放大器)。感测电路***还可包含计算组件。举例来说,感测电路***230可包含感测放大器和计算组件以使得感测组件230中的每一个可充当处理资源的1位处理元件。
感测组件230-0的感测放大器可包括第一锁存器,且感测组件230-0的计算组件可包括第二锁存器。第一锁存器和第二锁存器可用以执行包含向量操作的逻辑操作。处理资源可为控制器且感测组件230可充当对向量寄存器执行向量操作的处理资源。
在数个实例中,处理资源208可从例如向量寄存器等寄存器接收存取数据的命令。所述命令可从主机本地和/或组220外部的处理资源接收。所述命令可指示处理资源208起始数个逻辑操作的执行。将执行的特定逻辑操作可存储于存储器阵列中和/或可由主机提供。
处理资源208可标识与向量寄存器对应的映射寄存器。在一些实例中,处理资源208可利用向量寄存器的ID来标识映射寄存器。举例来说,映射寄存器206中的每一个可与不同向量寄存器ID相关联。处理资源208可存储将向量寄存器ID映射到映射寄存器206的表。在一些实例中,向量寄存器ID和映射寄存器206之间的映射可存储于阵列210中。
在其它实例中,处理资源208可基于默认设置标识映射寄存器。举例来说,每当接收到命令,处理资源208可标识相同映射寄存器。默认映射寄存器可存储与存储用作向量操作中的操作数的向量数据的多个存储器单元对应的存储器地址。
处理资源208可从映射寄存器检索存储器地址,其中所述地址从阵列标识存储器单元行且其中所述存储器单元行耦合到多个感测线和存取线(例如,选择线)。举例来说,处理资源208可检索与存储器单元270-0到270-M对应的存储器地址。存储器地址可通过例如提供基本存储器地址和偏移量来标识存储器地址范围。存储器地址也可例如通过标识与存储器单元270-1到270-M耦合的行0和/或存取线228-0来标识存储器地址行。如本文中所使用,行的使用不意在标识物理取向,而是标识组织取向,使得行和/或存储器单元行标识与特定存取线耦合的存储器单元。
处理资源208接着可使用存储器地址从存储器单元阵列检索数据。举例来说,处理资源可使用从映射寄存器206检索的存储器地址从存储器单元270-0到270-M检索向量数据。
利用映射寄存器206将给定寄存器映射到存储器阵列210的存储器单元提供利用存储器单元作为例如向量寄存器的寄存器的能力。所述映射允许存储器阵列210实施多个寄存器。所述映射通过映射到额外地址或更少地址,另外提供按需要产生和删除寄存器的能力。不过在一些实例中,可通过ISA固定寄存器的数量。
映射到存储器单元另外提供在不会在利用存储器阵列210实施的向量寄存器之间物理上移动数据的情况下移动数据的能力。举例来说,如果向量数据存储于在存储器阵列210的第一行(例如,行0)中实施的第一寄存器中并且如果利用向量数据执行向量操作的结果存储于存储器阵列210的第二行(例如,行1)中,那么可通过将存储于映射寄存器中的与第一行对应的第一存储器地址替换为与第二行对应的第二存储器地址,将向量操作的执行结果从第一向量寄存器移动到第二向量寄存器。也就是说,所述结果不必从一个存储器单元群组移动到不同的存储器单元群组以将所述结果从一个向量寄存器移动到不同的向量寄存器。向量操作的结果可一次性地存储于存储器单元群组中,且可通过将与存储器单元群组对应的地址存储于映射寄存器中来操控所述地址以“移动”所述结果。
映射寄存器206提供存储器单元到向量寄存器的映射。在图3中提供实例映射。
响应于执行向量操作,处理资源208可例如通过接收存储向量数据的下一向量寄存器的ID来执行另外的向量操作。主机可提供额外向量命令和/或可标识阵列210中存储向量命令的位置。
在一些实例中,处理资源208可存取向量数据以执行非向量操作。举例来说,作为读取操作和/或写入操作的部分,可存取向量数据。
图3是根据本公开的数个实施例的映射寄存器到向量寄存器的映射的框图。图3包含存储器阵列310。图3还包含向量寄存器ID 332-1、……和332-32(被称为向量寄存器ID332),以及映射寄存器306-1、……、306-32(被称为映射寄存器306)。举例来说,可从逻辑操作,直接从组外部的处理资源,和/或从阵列310获得向量寄存器ID。在一些实例中,向量寄存器ID可包含由ISA定义的向量地址。
在一些实例中,在向量寄存器ID 332和映射寄存器306之间可存在一对一相关性。举例来说,向量寄存器ID 332-1可映射到映射寄存器306-1,向量寄存器ID 332-2可映射到映射寄存器306-2,向量寄存器ID 332-3可映射到映射寄存器306-3,……,向量寄存器ID332-30可映射到映射寄存器306-30,向量寄存器ID 332-31可映射到映射寄存器306-31,且向量寄存器ID 332-32可映射到映射寄存器306-32。在图3中提供的实例描述三十二个向量寄存器和三十二个向量寄存器ID。然而,向量寄存器和/或向量寄存器ID不应限于三十二个,而是可包含更多或更少向量寄存器和/或向量寄存器ID。
在其它实例中,多个向量寄存器ID可映射到单个映射寄存器或向量寄存器ID可能不映射到映射寄存器306中的一个。向量寄存器ID到映射寄存器的映射可提供使ISA适用于实施于存储器阵列310中的向量寄存器的特定实施方案的能力。
映射寄存器306可存储与存储器单元行中的一个对应的地址。举例来说,映射寄存器306-1可存储行334-2的地址,映射寄存器306-2可存储行334-1的地址,映射寄存器306-3可存储行334-4的地址,……,映射寄存器306-30可存储行334-3的地址,映射寄存器306-31可存储行334-5的地址,且映射寄存器306-32可存储行334-6的地址。
在一些实例中,组本地的处理资源可接收存储器装置的存储器单元阵列的多个地址。存储器地址可标识存储向量数据的存储器单元。向量数据可能先前已存储于具有所述存储器地址的存储器单元中。
处理资源可存储存储器装置的多个映射寄存器中的多个地址。处理资源接着可从所述多个映射寄存器检索存储器地址,其中所述存储器地址对应于与标识存储器阵列310的行334-2的多个感测线和存取线耦合的第一多个存储器单元。
处理资源也可从阵列310检索向量指令和/或可从主机接收向量指令。处理资源可执行向量指令。在一些实例中,使用存储于阵列的第一多个存储器单元中的数据执行向量指令。
在一些实例中,可使用从向量指令本身提取的数据执行向量指令。向量指令可包含作为指令的部分的数据。在其它实例中,向量指令可包含对向量寄存器的引用。向量指令还可包含对向量寄存器的引用并且可包含作为向量指令的部分的数据。
在一些情况下,向量指令可为移动操作和/或可包含执行移动操作以执行向量指令。移动操作可将存储于向量寄存器1中的数据移动到向量寄存器2。向量寄存器1可具有向量寄存器标识符332-2且向量寄存器2可具有向量寄存器标识符332-1。将数据从向量寄存器1移动到向量寄存器2可包含将存储于映射寄存器306-1中的地址移动/复制到映射寄存器306-2。
此实例说明通过在存储器阵列310的行334中实施向量寄存器获得的节约。如果在不利用存储器阵列的情况下实施向量寄存器,那么310将数据从一个寄存器移动到不同寄存器将包含移动数据向量,可例如包含移动16,384位数据。然而,利用存储器阵列310的行实施向量寄存器,移动操作可包含将地址从映射寄存器移动到不同映射寄存器。在映射寄存器之间移动地址可包含移动16位,条件是可以16位表达存储器地址。
在一些实例中,组本地的处理资源可接收向量数据。处理资源可将向量数据存储于存储器阵列310中并且可将对应地址存储于映射寄存器306中以建立映射寄存器306和存储器阵列的行334之间的映射。
虽然已在本文中说明并描述了具体实施例,但所属领域的一般技术人员应了解,经计算以实现相同结果的布置可取代所展示的具体实施例。本公开意图覆盖本公开的各种实施例的修改或变化。应理解,以说明方式而非限制方式进行了以上描述。对于所属领域的技术人员而言在审阅以上描述之后上述实施例的组合以及本文中未具体描述的其它实施例将是显而易见的。本公开的各种实施例的范围包含其中使用以上结构和方法的其它应用。因此,本公开的各种实施例的范围应该参考所附权利要求书以及此权利要求书所授予的等效物的完整范围来确定。
在前述具体实施方式中,出于简化本公开的目的而将各种特征一起分组在单个实施例中。本公开的此方法不应被理解为反映本公开的所公开实施例必须比在每项权利要求中明确叙述那样使用更多特征的意图。实际上,如所附权利要求书所反映,本公开标的物在于单个所公开的实施例的不到全部的特征。因此,所附权利要求书特此并入于具体实施方式中,其中每项权利要求就其自身而言作为单独实施例。

Claims (20)

1.一种设备,其包括:
存储器单元阵列,其中所述阵列中的多个行充当由指令集架构定义的多个向量寄存器;和
处理资源,其被配置成响应于接收到对特定向量寄存器执行特定向量操作的命令,存取所述阵列的充当所述特定寄存器的特定行以执行所述向量操作。
2.根据权利要求1所述的设备,其中所述多个行中的每一行包括共同耦合到所述阵列的相应多个存取线中的一个的存储器单元群组。
3.根据权利要求1所述的设备,其中所述处理资源被进一步配置成在不将数据传送到与所述处理资源耦合的主机的情况下进行以下操作:
利用从所述特定行存取的数据执行所述多个操作;和
致使所述多个操作的所述执行的结果存储于所述多个行中。
4.根据权利要求1到3中任一权利要求所述的设备,其中所述处理资源被进一步配置成利用映射寄存器将所述特定向量寄存器映射到所述特定行,其中所述映射寄存器存储所述特定行的地址。
5.根据权利要求1到3中任一权利要求所述的设备,其中所述处理资源被进一步配置成利用与所述特定向量寄存器对应的向量寄存器标识ID存取所述特定行。
6.根据权利要求5所述的设备,其中所述向量寄存器ID是由所述指令集架构定义。
7.一种用于存取向量寄存器的方法,其包括:
在存储器装置处,接收存储器单元阵列的多个存储器地址;
将所述多个存储器地址存储于所述存储器装置的多个映射寄存器中;
在所述存储器装置处,接收与向量寄存器对应的由指令集架构定义的向量标识ID;
从具有所述向量ID的映射寄存器检索存储器地址,其中所述存储器地址与共同耦合到所述阵列的存取线的第一存储器单元群组对应;
使用所述存储器地址从所述第一存储器单元群组存取向量数据;和
使用所述向量数据执行向量操作,其中所述向量操作是由所述存储器装置的处理资源执行。
8.根据权利要求7所述的方法,其中所述映射寄存器存储与包括共同耦合到所述阵列的所述存取线的所述第一存储器单元群组的特定行对应的存储器地址。
9.根据权利要求8所述的方法,其另外包括在所述处理资源处,接收对更新所述向量寄存器的请求,其中所述请求包含所述阵列的新存储器地址。
10.根据权利要求9所述的方法,其中所述新存储器地址标识指定为所述向量寄存器的不同行。
11.根据权利要求10所述的方法,其另外包括将所述新存储器地址存储于所述映射寄存器中以将所述向量寄存器映射到所述不同行,其中在不将存储于所述特定行中的数据移动到所述不同行的情况下更新所述向量寄存器。
12.根据权利要求7到11中任一权利要求所述的方法,其中所述多个存储器地址是从主机接收。
13.根据权利要求7到11中任一权利要求所述的方法,其中使用存储于所述第一存储器单元群组中的所述向量数据和存储于所述阵列的第二存储器单元群组中的向量数据执行所述向量操作,其中所述第二存储器单元群组是不同向量寄存器。
14.一种***,其包括:
主机;和
存储器装置,其包括:
存储器单元阵列;
映射寄存器,其将由指令集架构定义的向量寄存器标识ID映射到所述阵列的行;
处理资源,其被配置成通过以下操作来执行从所述主机接收的向量操作:
使用向量寄存器ID存取所述映射寄存器,以确定特定向量寄存器目前映射到所述阵列中的哪个行;和
存取所述阵列中的所述特定向量寄存器目前映射到的所述行。
15.根据权利要求14所述的***,其中所述处理资源被进一步配置成从所述主机接收与所述向量操作对应的向量命令,其中所述向量操作包含所述特定向量寄存器。
16.根据权利要求14所述的***,其中所述处理资源被进一步配置成使用所述映射寄存器解算对所述特定向量寄存器的引用。
17.根据权利要求14所述的***,其中所述向量操作可执行以执行用于将存储于不同向量寄存器中的数据移动到所述特定向量寄存器的移动操作。
18.根据权利要求14所述的***,其中所述向量操作可执行以执行用于将存储于所述特定向量寄存器中的数据移动到不同向量寄存器的移动操作。
19.根据权利要求18所述的***,其中所述处理资源被进一步配置成将存储于所述映射寄存器中的存储器地址移动到不同映射寄存器,其中所述映射寄存器对应于所述特定向量寄存器且所述不同映射寄存器对应于所述不同向量寄存器。
20.根据权利要求14到19中任一权利要求所述的***,其中所述存储器装置是DRAM装置,且其中所述主机包括处理器。
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