CN111341743B - 电子部件 - Google Patents

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Publication number
CN111341743B
CN111341743B CN201911272176.1A CN201911272176A CN111341743B CN 111341743 B CN111341743 B CN 111341743B CN 201911272176 A CN201911272176 A CN 201911272176A CN 111341743 B CN111341743 B CN 111341743B
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layer
electrode
electronic component
thickness
bump
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CN111341743A (zh
Inventor
山田隆太
丰田泰之
藤屋正晴
竹下彻
岛田昌明
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Murata Manufacturing Co Ltd
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Murata Manufacturing Co Ltd
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    • H03H9/05—Holders; Supports
    • H03H9/058—Holders; Supports for surface acoustic wave devices
    • H03H9/059—Holders; Supports for surface acoustic wave devices consisting of mounting pads or bumps
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    • H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/08—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of resonators or networks using surface acoustic waves
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Abstract

本发明提供一种低损耗且不易产生Au层与Au凸块的接合强度的下降的电子部件。一种电子部件(1)，其中，在布线电极(9)上设置有焊盘电极(12)，在焊盘电极(12)上设置有Au凸块(4)，布线电极(9)的最上层为第一Ti层(8)，焊盘电极(12)的最上层为Au层(11)，在俯视下至少与Au凸块(4)重叠的部分中的第一Ti层(8)的厚度大于在俯视下不与Au凸块(4)重叠的部分中的至少一部分的Ti层的厚度。

Description

电子部件
技术领域
本发明涉及具有在布线电极上层叠有焊盘电极以及Au凸块的构造的电子部件。
背景技术
下述的专利文献1公开了在布线电极上层叠有焊盘电极以及Au凸块的构造。在此，布线电极的最上层由Ti构成。设置在布线电极上的焊盘电极从下起依次具有Ti层、Pt层以及Au层。在Au层上接合有Au凸块。
在先技术文献
专利文献
专利文献1：日本特开2002-100951号公报
在专利文献1记载的电子部件中，若位于布线电极的最上层的Ti层厚，则布线电极的电阻值变高。因此，存在损耗变大这样的问题。另一方面，本申请的发明人们发现，若布线电极的最上层的Ti层薄，则在Au层上析出Ti的量变多。因此，有时Au层与Au凸块的接合强度变低。
发明内容
发明要解决的课题
本发明的目的在于，提供一种低损耗且不易产生Au层与Au凸块的接合强度的下降的电子部件。
用于解决课题的技术方案
本发明涉及的电子部件具备：布线电极；焊盘电极，设置在所述布线电极上；以及Au凸块，设置在所述焊盘电极上，所述布线电极的最上层为第一Ti层，所述焊盘电极的最上层为Au层，在俯视下至少与Au凸块重叠的部分中的所述第一Ti层的厚度大于在俯视下不与所述Au凸块重叠的部分中的至少一部分的所述第一Ti层的厚度。
发明效果
根据本发明，能够提供一种低损耗且Au层与Au凸块的接合强度充分高的电子部件。
附图说明
图1是用于说明本发明的第一实施方式涉及的电子部件的主要部分的主视剖视图。
图2是用于说明本发明的第一实施方式的电子部件的主视剖视图。
图3是示出第一Ti层的厚度为0nm而未设置第一Ti层的比较例的弹性波装置中的电极层叠构造的EDX照片。
图4的(a)是第一Ti层的厚度为50nm的实施例的电子部件中的电极层叠构造的EDX照片，图4的(b)是仅析出了Ti时的EDX照片。
图5的(a)是第一Ti层的厚度为200nm的实施例的电子部件中的电极层叠构造的EDX照片，图5的(b)是仅析出了Ti时的EDX照片。
图6的(a)是第一Ti层的厚度为300nm的实施例的电子部件中的电极层叠构造的EDX照片，图6的(b)是仅析出了Ti时的EDX照片。
图7是用于说明第一实施方式的电子部件的变形例的主视剖视图。
图8是用于说明第一实施方式的电子部件的另一个变形例的主视剖视图。
图9是用于说明第一实施方式的电子部件的又一个变形例的主视剖视图。
图10是用于说明本发明的电子部件中的电极层叠构造的制造方法的主视剖视图。
图11是用于说明本发明的电子部件中的电极层叠构造的制造方法的主视剖视图，是示出形成了抗蚀剂的状态的图。
图12是示出在形成本发明的电子部件中的电极层叠构造的工序中经过了通过蚀刻削去Au层的工序和通过蚀刻除去第一Ti层的一部分的工序之后的状态的主视剖视图。
图13是示出经图12所示的工序而得到的电子部件的电极构造的主视剖视图。
图14是用于说明第二实施方式涉及的电子部件的电极层叠构造的主视剖视图。
图15是用于说明第三实施方式涉及的电子部件的电极层叠构造的主视剖视图。
图16是关于第二实施方式的实施例1的电极层叠构造的STEM照片。
图17是关于第三实施方式的实施例2的电极层叠构造的STEM照片。
图18是用于说明第四实施方式涉及的电子部件的主要部分的主视剖视图。
附图标记说明
1：电子部件，2：基板，3：功能电极，4：Au凸块，5：第三Ti层，6：Al层，7：AlCu层，8：第一Ti层，8A：Ti层，9：布线电极，10：第二Ti层，11：Au层，11A：Au层，12：焊盘电极，21：电子部件，31：电子部件，32：第四Ti层，33：Pt层，41：保护膜，42：抗蚀剂层，51、61：电子部件。
具体实施方式
以下，参照附图对本发明的具体的实施方式进行说明，由此明确本发明。
另外，需要指出，在本说明书记载的各实施方式是例示性的，能够在不同的实施方式间进行结构的部分置换或组合。
图1是用于说明本发明的第一实施方式的电子部件的主要部分的主视剖视图，图2是用于说明该电子部件的主视剖视图。如图2所示，电子部件1具有基板2。在基板2上设置有功能电极3。功能电极3是用于使电子部件1作为电子部件而发挥功能的电极。上述基板2以及功能电极3的组合没有特别限定，例如，能够将压电基板用作基板2，并将IDT电极用作功能电极3。在该情况下，能够作为电子部件1而构成弹性波装置。不过，在本发明中，基板2以及功能电极3没有特别限定。
在电子部件1中，为了面安装到印刷电路基板等，设置有Au凸块4。更具体地，在基板2上设置有布线电极9。虽然在图2中，布线电极9与功能电极3分离，但是在未图示的部分与功能电极3电连接。在布线电极9上设置有焊盘电极12。在焊盘电极12上接合有Au凸块4。
在俯视下，布线电极9比焊盘电极12大，布线电极9具有位于焊盘电极12的外侧的部分。
布线电极9的最上层为第一Ti层8。在本实施方式中，布线电极9具有第三Ti层5、Al层6、AlCu层7以及第一Ti层8。AlCu层7的材料是以Al为主体的AlCu合金。该合金的组成比没有特别限定，在本实施方式中，使用了相对于100重量％的Al包含10重量％的Cu的AlCu合金。
此外，在本实施方式中，焊盘电极12具有第二Ti层10和层叠在第二Ti层10上的Au层11。Au层11由Au构成，因此在接合了Au凸块4的情况下，两者的接合强度充分高。
通过Al层6以及AlCu层7，导电性提高。第一Ti层8为了抑制Al从AlCu层7、Al层6向焊盘电极12侧扩散而设置。
不过，若第一Ti层8的厚度厚，则损耗变大。因此，在第一Ti层8中，使不与Au凸块4重叠的部分的至少一部分的厚度比与Au凸块4重叠的部分中的第一Ti层8的厚度薄。更具体地，在第一Ti层8中，在上表面设置有台阶A。该台阶A没有特别限定，在本实施方式中，设置为与焊盘电极12的外周缘相连。使位于该台阶A的外侧，即，焊盘电极12的外侧的第一Ti层8部分的厚度薄。由此，可谋求抑制电阻损耗的增大。
另一方面，本申请的发明人们发现，若位于布线电极9的最上层的第一Ti层8的厚度薄，则在焊盘电极12的上表面，即，Au层11的上表面析出许多的Ti。相反，发现若第一Ti层8的厚度厚，则焊盘电极12的上表面，即，Au层11的上表面处的Ti的析出变少。基于以下的实验例对此进行说明。
使用LiNbO3基板作为基板2，通过真空蒸镀法对以下的布线电极9以及焊盘电极12进行成膜，得到了电极层叠构造。在该情况下，在成膜后，在275℃的温度进行一小时左右的热处理。
(实验例1)
布线电极9：
第三Ti层5的膜厚：100nm
Al层6的膜厚：1200nm
AlCu层7的膜厚：1000nm
第一Ti层8的台阶A的内侧的膜厚：0nm、50nm、200nm或300nm
台阶A的外侧的第一Ti层8的膜厚：0nm、30nm、180nm或280nm
焊盘电极12：
第二Ti层10的膜厚：150nm
Au层11的膜厚：250nm
像上述的那样，将第一Ti层8的台阶A的内侧的膜厚设为0nm、50nm、200nm或300nm。在该情况下，所谓0nm，意味着未设置第一Ti层8。因此，台阶A的内侧的膜厚为0nm的构造为比较例。
图3是该比较例的电极层叠构造的EDX照片。图4的(a)、图5的(a)、以及图6的(a)分别是第一Ti层8的台阶A的内侧的部分的膜厚为50nm、200nm或300nm的情况下的电极层叠构造的EDX照片。此外，图4的(b)、图5的(b)以及图6的(b)是仅析出了Ti时的EDX照片。
EDX照片以彩色进行拍摄，但是在图3～图6中，以单色照片示出。因为在成膜后施加热，所以第一Ti层8以及第二Ti层10中的Ti析出到焊盘电极12的Au层11的上表面。特别是，像用箭头示出的那样，可知在第一Ti层8的膜厚为50nm的情况下，Au层11上的Ti析出量多。另一方面，如图5的(b)以及图6的(b)所示，可知随着第一Ti层8的膜厚变厚，Ti的析出量变少。像这样，若第一Ti层8的厚度变厚，则在Au层11上析出的Ti量变少，其理由并不清楚。本申请的发明人们在实验上发现，如果将第一Ti层8的厚度增厚，则如图6的(b)所示，在Au层11上析出的Ti量飞跃性地变少。
因而，通过在第一Ti层8的至少与Au凸块4重叠的部分中使第一Ti层8的厚度相对变厚，从而能够减少在Au层11上析出的Ti的量。因此，能够提高Au凸块4与Au层11的接合强度。
因此，1)通过设置第一Ti层8的厚度相对薄的部分，从而能够谋求低损耗化，且2)像上述的那样，通过在与Au凸块4重叠的部分中使第一Ti层8的厚度相对变厚，从而能够提高Au凸块4与Au层11的接合强度。
虽然在本实施例中对布线电极9使用了Al层6和AlCu层7，但是如图7所示，也可以代替Al层6和AlCu层7而分别使用第一AlCu层(Cu浓度为1％)、第二AlCu层(Cu浓度为10％)。此外，如图8所示，也可以使用第一AlCu层(Cu浓度为10％)、第二AlCu层(Cu浓度为10％)。
进而，如图9所示，第一AlCu层和第二AlCu层分别可以是，越是从基板2远离，Cu浓度变得越高。
在本发明中，优选地，使第一Ti层8的厚度大于第二Ti层10的厚度。在该情况下，所谓第一Ti层8的厚度，成为在第一Ti层8中至少与Au凸块4重叠的部分的厚度，更优选地，成为与Au层11重叠的部分的厚度。在第一Ti层8的厚度小于第二Ti层10的厚度时，Ti向Au层11上的析出量会变大，但是在第一Ti层8的厚度大于第二Ti层10的厚度时，能够减少Ti向Au层11上的析出量。
另外，在台阶A的外侧，第一Ti层8的厚度变薄。该厚度相对薄的部分不与Au层11重叠。因此，该厚度相对薄的部分的存在，并不会阻碍向Au层11的上表面的Ti析出量的减少。
此外，在图3的比较例中，存在颇多最上部的Au层11的一部分贯通Ti层并到达AlCu层7的部分。即，可认为，Au层11的Au到达下方的AlCu层7并进行了AuAl合金化。
相对于此，在图4～图6中，可知Au层11的Au并未到达下方的AlCu层7。即，通过设置有第一Ti层8，从而通过第一Ti层8提高了Au的扩散防止效果。因此，可知能够抑制Au层11的合金化。认为这是由于，在第一Ti层8上层叠有第二Ti层10。即，可认为，因为在第一Ti层8上直接层叠有第二Ti层10，所以形成晶体状态的界面，抑制了Au向第一Ti层8以及第二Ti层10内的扩散。
除此以外，因为在第一Ti层8上直接层叠有第二Ti层10，所以可抑制由于***种类不同的金属而造成的表面粗糙。因此，还可提高焊盘电极12的上表面，即，Au层11的上表面的表面平滑性。因而，Au凸块4与Au层11的接合强度也变得充分大。
本发明的电子部件中的电极层叠构造的制造方法没有特别限定，参照图10～图13对一个例子进行说明。
如图10所示，在LiNbO3基板上依次成膜了第三Ti层5、AlCu层7以及Ti层8A。在此，在Ti层8A并未设置台阶A。
接着，在布线电极9上层叠第二Ti层10以及Au层11A，形成了焊盘电极12。另外，通过真空蒸镀法进行了成膜。在该情况下，在室温～350℃的温度伴随了时间为0～5小时左右的热处理。各层的膜厚设为如下。
第三Ti层5：100nm
AlCu层7的膜厚：2600nm
Ti层8A的膜厚：450nm
第二Ti层10的膜厚：150nm
Au层11A的膜厚：150nm
接着，如图10所示，用保护膜41被覆了上述电极层叠构造。作为该保护膜41，设置了膜厚为70nm的SiN膜。然后，如图11所示，设置了抗蚀剂层42。然后，通过蚀刻除去了未被抗蚀剂层42覆盖的部分的保护膜41。在该蚀刻时，实施蚀刻，使得Au层11A的表面被蚀刻，Au层11A的厚度变薄。这样，形成了图12所示的Au层11。在图12中用单点划线B示出了被削去的Au层部分。Au层11的膜厚变得比150nm薄。
此外，与用于形成上述Au层11的蚀刻同样地，对露出在Ti层8A的上表面的部分也进行蚀刻，设置了图12所示的台阶。用单点划线C示出通过蚀刻除去的部分。设置该台阶，形成了第一Ti层8。这样，得到了图13所示的电子部件51。
对Ti层8A进行蚀刻而使得具有上述台阶的工序可以与用于形成上述Au层11的蚀刻工序同时进行，也可以进一步赋予抗蚀剂并通过另外的工序进行。
上述制造方法是本发明的电子部件中的电极层叠构造的制造方法的一个例子，并不限定于该制造方法。
图14是用于说明第二实施方式涉及的电子部件的电极层叠构造的主视剖视图，图15是用于说明第三实施方式涉及的电子部件的电极层叠构造的主视剖视图。
如图14所示，在第二实施方式的电子部件21中，在由LiNbO3构成的基板2上层叠有布线电极9以及焊盘电极12。布线电极9在最上部具有第一Ti层8。焊盘电极12在最下层具有第二Ti层10。在焊盘电极12中，在第二Ti层10上层叠有Au层11。
在布线电极9中，在第三Ti层5上依次层叠有AlCu层7以及第一Ti层8。因此，未层叠第一实施方式中的Al层6。除了上述的方面以外，电子部件21的电极层叠构造与第一实施方式的电子部件1中的电极层叠构造相同。在此，也在第一Ti层8设置有台阶A。因此，在第一Ti层8的焊盘电极12的外侧，使第一Ti层8的厚度薄。
Au凸块4接合在焊盘电极12上。
在图15所示的第三实施方式的电子部件31中，在布线电极9中，从基板2侧起按顺序依次层叠有第三Ti层5、AlCu层7、第四Ti层32、Pt层33以及第一Ti层8。关于其它结构，电子部件31与电子部件21相同。在此，第四Ti层32设置为Pt层33与AlCu层7之间的扩散防止层。
在第二实施方式、第三实施方式的电子部件21、31中，也在第一Ti层8设置有台阶。因此，在焊盘电极12的外侧，第一Ti层8的厚度变薄，因此能够谋求低损耗化。此外，在与Au凸块4重叠的部分中，使第一Ti层8的厚度相对厚。因此，与第一实施方式的情况同样地，能够减少Ti的Au层11的表面中的析出量。由此，能够提高Au凸块4与Au层11的接合强度。
而且，在第二实施方式以及第三实施方式中的任一个中，均在第一Ti层8上直接层叠有第二Ti层10，因此能够有效地抑制Au向第二Ti层10以及第一Ti层8内的扩散。因此，能够提高Au层11与Au凸块4的接合强度。
不过，在第二实施方式的电子部件21中，与第三实施方式的电子部件31相比，能够更有效地提高Au凸块4与Au层11的接合强度。这是由于第二实施方式的电子部件21不具有Pt层33。基于具体的实验例对此进行说明。
图16是关于第二实施方式的实施例1的电极层叠构造的STEM照片。图17是关于第三实施方式的实施例2的电极层叠构造的STEM照片。实施例1以及实施例2的层叠构造的膜厚设为如下。
(实施例1)
布线电极9：
第三Ti层5的膜厚：10nm
AlCu层7的膜厚：2600nm
第一Ti层8的台阶A的内侧的膜厚：450nm
台阶A的外侧的第一Ti层8的膜厚：430nm
焊盘电极12：
第二Ti层10的膜厚：150nm
Au层11的膜厚：150nm
(实施例2)
布线电极9：
第三Ti层5的膜厚：10nm
AlCu层7的膜厚：2600nm
第一Ti层8的台阶A的内侧的膜厚：150nm
台阶A的外侧的第一Ti层8的膜厚：120nm
Pt层33的膜厚：100nm
第四Ti层32的膜厚：300nm
焊盘电极12：
第二Ti层10的膜厚：150nm
Au层11的膜厚：150nm
因此，在实施例2中，第一Ti层8与第四Ti层32的膜厚的合计为450nm，与实施例1的第一Ti层8的膜厚450nm相等。
在图16中，Au层11的表面比较平滑，相对于此，在图17中，可知Au层11的表面相当粗糙。
基于JIS-R1683测定了上述实施例1以及实施例2中的表面粗糙度。其结果是，在实施例1中，表面粗糙度Ra值为8.1nm，相对于此，在实施例2中，表面粗糙度Ra值为20.4nm。
因此，像上述的那样，可知，更优选在第一Ti层8中不设置Pt层33那样的种类不同的金属层。由此，Au层的表面平滑性提高，Au凸块4与Au层11的接合强度更加提高。除此以外，还反而有效地抑制了布线电极9中的Al和焊盘电极12中的Au的扩散。由此，也能够提高Au层11与Au凸块4的接合强度。
图18是示出第四实施方式涉及的电子部件的主要部分的主视剖视图。在电子部件61中，对第一Ti层8赋予了锥形。除了该第一Ti层的构造以外，电子部件61与电子部件1相同。
如图18所示，对第一Ti层8赋予了锥形，使得随着从布线电极9侧朝向焊盘电极12侧而变细。赋予了该锥形的部分是焊盘电极12的外侧的第一Ti层8部分。因此，通过赋予锥形，从而在俯视下，与Au凸块4重叠的部分中的第一Ti层8的厚度大于焊盘电极12的外侧的第一Ti层8的厚度。因此，在第四实施方式的电子部件61中，也是低损耗，且不易产生Au层11与Au凸块4的接合强度的下降。

Claims (9)

1.一种电子部件，具备：
布线电极；
焊盘电极，设置在所述布线电极上；以及
Au凸块，设置在所述焊盘电极上，
所述布线电极的最上层为第一Ti层，
所述焊盘电极的最上层为Au层，
在俯视下至少与Au凸块重叠的部分中的所述第一Ti层的厚度大于在俯视下不与所述Au凸块重叠的部分中的至少一部分的所述第一Ti层的厚度，
所述布线电极具有Al层以及AlCu层中的至少一者，
所述焊盘电极具有第二Ti层，所述第二Ti层层叠在所述布线电极的所述第一Ti层上。
2.根据权利要求1所述的电子部件，其中，
在俯视下，所述布线电极比所述焊盘电极大，在俯视下与所述Au凸块重叠的部分中的所述第一Ti层的厚度大于位于所述焊盘电极的外侧的所述第一Ti层的至少一部分的厚度。
3.根据权利要求2所述的电子部件，其中，
在俯视下与所述Au凸块重叠的部分中的所述第一Ti层的厚度大于所述焊盘电极的外侧的所述第一Ti层的厚度。
4.根据权利要求3所述的电子部件，其中，
对所述第一Ti层，在所述焊盘电极的外侧赋予锥形，使得随着从所述布线电极侧到所述焊盘电极侧而变细，使与所述Au凸块重叠的部分中的所述第一Ti层的厚度大于所述焊盘电极的外侧的所述第一Ti层的厚度。
5.根据权利要求1～4中的任一项所述的电子部件，其中，
在所述第一Ti层设置有台阶，在俯视下，与所述台阶的内侧的厚度相比，使所述台阶的外侧的厚度薄。
6.根据权利要求1～4中的任一项所述的电子部件，其中，
所述第二Ti层直接层叠在所述第一Ti层上。
7.根据权利要求1～4中的任一项所述的电子部件，其中，
所述布线电极的所述第一Ti层的厚度比所述焊盘电极的所述第二Ti层的厚度薄。
8.根据权利要求1～4中的任一项所述的电子部件，其中，
所述布线电极的所述第一Ti层的厚度比所述焊盘电极的所述第二Ti层的厚度厚。
9.根据权利要求1～4中的任一项所述的电子部件，其中，
还具备：
基板；以及
功能电极，设置在所述基板，
所述布线电极设置在所述基板，并与所述功能电极电连接。
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