CN110890881A - 半导体装置 - Google Patents

半导体装置 Download PDF

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CN110890881A
CN110890881A CN201910837996.4A CN201910837996A CN110890881A CN 110890881 A CN110890881 A CN 110890881A CN 201910837996 A CN201910837996 A CN 201910837996A CN 110890881 A CN110890881 A CN 110890881A
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gate electrode
semiconductor device
voltage
control signal
potential side
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CN110890881B (zh
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江口佳佑
井上贵公
米山玲
鱼田紫织
村上晴彦
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Abstract

提供可对施加于半导体元件两端的电压的时间变化率(dv/dt)进行调整,进行导通时的控制性和导通损耗的调整的半导体装置。本发明涉及的半导体装置具备:第一开关区域,其具有第一栅极电极,沟道电流与通过输入至第一栅极电极的控制信号而供给的电荷量对应地受到控制;第二开关区域,其具有第二栅极电极,沟道电流与通过输入至第二栅极电极的控制信号而供给的电荷量对应地受到控制,与第一开关区域并联连接;以及控制部,其向第一、第二栅极电极输出用于使第一、第二开关区域导通的控制信号,控制部在输出第一、第二控制信号而经过了第一规定期间后使第二控制信号的输出停止,在使第二控制信号的输出停止而经过了第二规定期间后输出所述第二控制信号。

Description

半导体装置
技术领域
本发明涉及半导体装置。
背景技术
在搭载有具有栅极电极的半导体元件即IGBT(Insulated Gate BipolarTransistor)、MOSFET(Metal Oxide Semiconductor Feld Effect Transistor)的半导体装置中,谋求如下技术,即,对从断开状态切换为接通状态时即所谓的导通时的施加于半导体元件两端的电压的时间变化率(dv/dt)进行抑制。
在专利文献1中记载了一种半导体装置,其通过将在导通时供给至第一栅极电极的驱动信号的导通的定时(timing)和供给至第二栅极电极的驱动信号的导通的定时错开规定的时间,从而对导通时的输出电压的时间变化率(dv/dt)进行抑制而提高控制性。
专利文献1:国际公开第2014/038064号
但是,在专利文献1所记载的半导体装置中,没有充分考虑在导通时所产生的损耗即导通损耗。导通损耗与施加于半导体元件两端的电压的时间变化率(dv/dt)具有相关性,如果使施加于半导体元件两端的电压变化变慢,即,使时间变化率(dv/dt)减小,则控制性提高,但导通损耗变大。
即,对于导通时的施加于半导体元件两端的电压的时间变化率(dv/dt)而言,如果过大则控制性降低,如果过小则导通损耗增加,因此需要进行调整。
发明内容
本发明就是为了解决上述那样的问题而提出的,其目的在于提供如下半导体装置,即,通过能够对施加于半导体元件两端的电压的时间变化率(dv/dt)进行调整,从而能够实现导通时的控制性和导通损耗的调整。
本发明涉及的半导体装置具备:第一开关区域,其具有第一栅极电极,沟道电流与通过输入至第一栅极电极的控制信号而供给的电荷量对应地受到控制;第二开关区域,其具有第二栅极电极,沟道电流与通过输入至第二栅极电极的控制信号而供给的电荷量对应地受到控制,该第二开关区域与第一开关区域并联连接;以及控制部,其向第一栅极电极输出用于使第一开关区域导通的第一控制信号,向第二栅极电极输出用于使第二开关区域导通的第二控制信号,控制部在输出第一控制信号和第二控制信号而经过了第一规定期间后,使第二控制信号的输出停止,在使第二控制信号的输出停止而经过了第二规定期间后,输出第二控制信号。
发明的效果
根据本发明涉及的半导体装置,提供一种半导体装置,其能够通过由控制部输出的控制信号而进行导通时的施加于半导体元件两端的电压的时间变化率(dv/dt)的调整,因此能够实现导通时的控制性和导通损耗的调整。
附图说明
图1是表示本发明的实施方式1涉及的半导体装置的结构的俯视图。
图2是表示本发明的实施方式1涉及的半导体装置的结构的剖视图。
图3是表示本发明的实施方式1涉及的半导体装置的去除了控制基板的情况下的结构的俯视图。
图4是表示在本发明的实施方式1涉及的半导体装置搭载的半导体元件的驱动配线的结构的俯视图。
图5是本发明的实施方式1涉及的半导体装置的等价电路图。
图6是表示本发明的实施方式1涉及的半导体装置的动作的时序图。
图7是表示本发明的实施方式1涉及的半导体装置的变形例的等价电路图。
图8是表示本发明的实施方式2涉及的半导体装置的结构的俯视图。
图9是表示本发明的实施方式2涉及的半导体装置的去除了控制基板的情况下的结构的俯视图。
图10是表示在本发明的实施方式3涉及的半导体装置搭载的半导体元件的驱动配线的结构的俯视图。
标号的说明
1 绝缘层
2 散热板
3 电路图案
4 焊料
5 开关元件
6 发射极电极
7a 第一栅极信号输入部
7b 第二栅极信号输入部
8a 第一栅极电极
8b 第二栅极电极
9a 第一金属配线
9b 第二金属配线
10a 第一开关区域
10b 第二开关区域
11 接触孔
12 续流元件
13 壳体树脂
14 基准电位信号端子
15 第一驱动信号端子
16 第二驱动信号端子
17 低电位侧主电极
18 高电位侧主电极
19 导线
20 粘接材料
21 控制基板
22 信号输入端子
23 基准电位输入端子
24 驱动电位输入端子
25 控制部
90 信号产生装置
91 电源
100 半导体装置
200 半导体装置
221 控制基板
225 控制部
250 电压检测电路
260 高电位侧信号端子
300 半导体装置
305 开关元件
308a 第一栅极电极
308b 第二栅极电极
310a 第一开关区域
310b 第二开关区域
具体实施方式
实施方式1.
对本发明的实施方式1涉及的半导体装置100的结构进行说明。图1是表示本发明的实施方式1涉及的半导体装置的结构的俯视图。另外,图2是表示本发明的实施方式1涉及的半导体装置的结构的剖视图。图1是表示从上方观察半导体装置100的情况下的结构的俯视图,图2是图1所记载的A-A线处的剖视图。此外,在图1及图2中是省略了填充于半导体装置100的内部的封装材料、根据需要而设置于半导体装置100的上表面的盖等若干部件而示出的。
在图1中,半导体装置100具有在俯视观察时为矩形状的壳体树脂13,在壳体树脂13的内侧具有控制基板21。控制基板21具有控制部25、多个输入侧端子和输出侧端子。控制基板21具有控制部25和多个独立的导电图案(未图示)。控制部25的输入侧通过导电图案与多个输入侧端子连接,控制部25的输出侧经由导电图案与输出侧端子连接。
多个输入侧端子为信号输入端子22、基准电位输入端子23、驱动电位输入端子24。信号输入端子22、基准电位输入端子23、驱动电位输入端子24构成为各自能够与半导体装置100的外部连接。从设置于外部的信号产生装置90输出的信号被输入至信号输入端子22,电源91连接于基准电位输入端子23及驱动电位输入端子24。电源91成为用于向开关元件的栅极电极供给电荷的供给源。
输出侧端子为基准电位信号端子14、第一驱动信号端子15和第二驱动信号端子16。如后面所述,基准电位信号端子14与开关元件的发射极电极连接,第一驱动信号端子15与开关元件的第一栅极电极连接,第二驱动信号端子16与开关元件的第二栅极电极连接。
输出侧的导电图案与基准电位信号端子14、第一驱动信号端子15及第二驱动信号端子16各自经由形成于控制基板21的孔(未图示)而连接。孔的侧面具有导电性,孔电连接于导电图案20。基准电位信号端子14及第一驱动信号端子15被压入于孔,通过机械接触而电连接。此外,也可以不使孔的侧面具有导电性,不进行机械接触,而是通过焊接等进行电连接。
另外,半导体装置100具有将树脂壳体13贯穿而将树脂壳体13的内侧和外侧电连接的低电位侧主电极17和高电位侧主电极18。
接下来,使用图2对半导体装置100的结构进行说明。半导体装置100具有绝缘层1,在绝缘层1的一个主面具有散热板2,在另一个主面具有电路图案3。绝缘层1例如可以是氮化铝等导热率高的陶瓷基板。
经由焊料4将开关元件5的背面电极及续流元件12的背面电极连接于电路图案3。这里,本实施方式1中的开关元件5例如由通过两个栅极信号驱动的类型的IGBT构成,续流元件12例如由二极管构成。开关元件5的背面电极为集电极(collector)电极(electrode),续流元件12的背面电极为阴极电极。
半导体装置100的侧面由壳体树脂13构成,壳体树脂13和绝缘层1通过粘接材料20而粘接。
在壳体树脂13安装有基准电位信号端子14、第一驱动信号端子15及第二驱动信号端子16、低电位侧主电极17及高电位侧主电极18,基准电位信号端子14、第一驱动信号端子15及第二驱动信号端子16、低电位侧主电极17及高电位侧主电极18通过导线19与开关元件5、续流元件12、及电路图案13等电连接。基准电位信号端子14、第一驱动信号端子15、及第二驱动信号端子16将设置于控制基板21的孔贯穿,与形成于控制基板21的导电图案20电连接。
图3是表示本发明的实施方式1涉及的半导体装置100的去除了控制基板21的情况下的结构的俯视图。如图3所示,在壳体树脂13固定有基准电位信号端子14、第一驱动信号端子15、第二驱动信号端子16、低电位侧主电极17及高电位侧主电极18。
开关元件5在表面具有发射极电极6、第一栅极信号输入部7a、及第二栅极信号输入部7b。发射极电极6通过导线19与基准电位信号端子14连接,第一栅极信号输入部7a通过导线19与第一驱动信号端子15连接,第二栅极信号输入部7b通过导线19与第二驱动信号端子16连接。
开关元件5的发射极电极6通过导线19与续流元件12的表面电极即阳极电极及低电位侧主电极17连接。另一方面,电路图案3通过导线19与高电位侧主电极18连接。
接下来,对开关元件5的栅极电极的配线例进行说明。图4是表示在本发明的实施方式1涉及的半导体装置搭载的半导体元件的驱动配线的结构的俯视图。开关元件5在表面电极侧具有第一金属配线9a及第二金属配线9b。第一金属配线9a及第二金属配线9b例如配置于开关元件5的末端部周边。第一金属配线9a与第一栅极信号输入部7a电连接,第二金属配线9b与第二栅极信号输入部7b电连接。第一金属配线9a及第二金属配线9b通过绝缘膜(未图示)而电绝缘。
第一栅极电极8a连接于第一金属配线9a,第二栅极电极8b连接于第二金属配线9b。第一金属配线9a和第一栅极电极8a的连接、及第二金属配线9b和第二栅极电极8b的连接是经由接触孔11进行的。通过该结构,在开关元件5内,第一栅极电极8a和第二栅极电极8b彼此电绝缘。第一栅极电极8a与第一驱动信号端子15连接,第二栅极电极8b与第二驱动信号端子16连接。
第一开关区域10a是具有第一栅极电极8a,沟道电流与通过输入至第一栅极电极8a的控制信号而供给的电荷量对应地受到控制的开关区域,第二开关区域10b是具有第二栅极电极8b,沟道电流与通过输入至第二栅极电极8b的控制信号而供给的电荷量对应地受到控制的开关区域。这里,沟道电流是指通过供给至第一栅极电极8a及第二栅极电极8b的电荷而在形成于第一开关区域10a及第二开关区域10b各自的沟道流动的电流。
由于第一开关区域10a及第二开关区域10b形成在一个开关元件5内,在第一开关区域10a和第二开关区域10b之间共有发射极电极6及集电极电极,因此第一开关区域10a和第二开关区域10b在开关元件5内并联连接。
如上所述构成半导体装置100。
接下来,对本发明的实施方式1涉及的半导体装置100的动作进行说明。图5是本发明的实施方式1涉及的半导体装置的等价电路图。如图5所示,开关元件5由并联连接了第一开关区域10a和第二开关区域10b的等价电路表示。
如果从设置于半导体装置100外部的信号产生装置90输出的信号经由信号输入端子22输入至控制部25,则控制部25经由第一驱动信号端子15输出第一控制信号,经由第二驱动信号端子16输出第二控制信号。
第一控制信号被输入至第一开关区域10a的第一栅极电极8a,第二控制信号被输入至第二开关区域10b的第二栅极电极8b。如果第一控制信号输入至第一栅极电极8a,则电荷供给至第一栅极电极8a,第一栅极电极8a的电压上升。相同地,如果第二控制信号输入至第二栅极电极8b,则电荷供给至第二栅极电极8b,第二栅极电极8b的电压上升。如果第一栅极电极8a及第二栅极电极8b的电压成为与连接于基准电位输入端子23和驱动电位输入端子24之间的电源91的电压相等的电压,则第一栅极电极8a及第二栅极电极8b的电压不会上升,几乎没有从控制部25向第一栅极电极8a及第二栅极电极的电荷的供给。此外,第一栅极电极8a的电压是指开关元件的发射极电极和第一栅极电极8a之间的电压,第二栅极电极8b的电压是指开关元件的发射极电极和第二栅极电极8b的电压之间的电压。如图5所示,由于开关元件的发射极电极连接于基准电位信号端子14及低电位侧主电极17,因此,例如也可以将基准电位信号端子14或低电位侧主电极17作为基准电位,对上述基准电位和第一栅极电极8a的电压或第二栅极电极8b的电压进行测定。
根据以上结构,能够与由控制部25输出的第一控制信号及第二控制信号对应地,独立地对第一栅极电极8a及第二栅极电极8b各自供给电荷。即,能够分别独立地对开关元件5导通时的第一栅极电极8a及第二栅极电极8b的电压上升进行控制。
图6是表示本发明的实施方式1涉及的半导体装置的动作的时序图。半导体装置100的低电位侧主电极17及高电位侧主电极18与外部的装置连接,对低电位侧主电极17和高电位侧主电极18之间施加电压。图6(a)为第一控制信号的输入状态,图6(b)为第二控制信号的输入状态,图6(c)为第一栅极电极8a的电压,图6(d)为第二栅极电极8b的电压,图6(e)为流过开关元件5的电流及开关元件5的发射极电极与集电极电极之间即开关元件5两端的电压。流过开关元件5的电流例如可以为流过低电位侧主电极17的电流,开关元件5两端的电压通常称为Vce电压等,表示发射极-集电极间的电位差。另外,图中虚线所示的(1)~(4)表示时刻,(1)为半导体装置100导通开始的时刻,(2)为中断第二控制信号的输出的时刻,(3)为半导体装置100导通完成即转变为导通状态的时刻,(4)为再次开始第二控制信号的输出的时刻,(5)为开始截止的时刻。
在时刻(1),如果从信号产生装置90输出的信号输入至控制部25,则控制部25同时地输出第一控制信号和第二控制信号。通过第一控制信号的输出而开始向第一栅极电极8a的电荷供给,通过第二控制信号的输出而开始向第二栅极电极8b的电荷供给。
控制部25在输出第一控制信号及第二控制信号而经过了时刻(1)至时刻(2)为止的期间即第一规定期间t1后停止第二控制信号的输出,中断向第二栅极电极8b的电荷供给。第一规定期间t1的上限为向第一栅极电极8a的电荷供给完成为止,即第一栅极电极8a的电压变为恒定为止,例如,可以为几百ns左右。此外,在开关元件5的栅极电容大的情况下、在高温状态下进行动作的情况下,也可以将第一规定期间t1设定为更长的期间。第一规定期间t1也可以通过对控制部25的电路结构进行变更而变更。
控制部25在经过了时刻(2)至时刻(4)为止的期间即第二规定期间t2后再次输出第二控制信号,重新开始第二栅极电极8b的电荷供给。第二规定期间t2例如可以设定于几ns~2μs之间,通过设定为在导通完成后通过第二控制信号再次对第二栅极电极8b供给电荷,从而能够更容易地对导通时的施加于开关元件5两端的电压的时间变化率(dv/dt)进行调整。此外,导通完成是指图6(e)中的时刻(3),可以定义为开关元件5的两端的电压变得小于导通开始时的开关元件5的两端的电压的10%时。
在时刻(5),如果从信号产生装置90向控制部25输入的信号停止,则控制部25停止第一控制信号及第二控制信号。停止第二控制信号的定时可以设为是与停止第一控制信号的定时同时,也可以将停止第二控制信号的定时与停止第一控制信号的定时错开规定时间。
以后的动作是上述动作的重复。
接下来,对本实施方式1涉及的半导体装置的效果进行说明。在本实施方式1涉及的半导体装置100中,通过由控制部25对向第二栅极电极8b供给的电荷进行调整,从而能够对导通时的施加于开关元件5两端的电压的时间变化率(dv/dt)进行调整。
第二开关区域10b的沟道电流与供给至第二栅极电极8b的电荷具有相关性。如果减少供给至第二栅极电极8b的电荷,即缩短第一规定期间t1,则供给至第二栅极电极8b的电荷变少,第二开关区域10b的沟道电流变小。通过减小第二开关区域10b的沟道电流,从而能够使半导体装置100的主电流,即集电极电流(ic)随时间的变化变慢,其结果能够减小导通时的开关元件5的两端的电压的时间变化率(dv/dt)。
在导通时的施加于开关元件5两端的电压的时间变化率(dv/dt)过小的情况下,通过延长第一规定期间t1,从而能够使供给至第二栅极电极8b的电荷增多而进行使导通时的开关元件5的两端的电压的时间变化率(dv/dt)增大的调整。
根据以上所述,根据本发明的实施方式1涉及的半导体装置100,由于能够通过控制部25的控制对第二栅极电极8b的电荷进行调整,因此能够进行导通时的施加于开关元件5两端的电压的时间变化率(dv/dt)的调整。
另外,即使在时刻(2)至时刻(4)去除第二栅极电极8b的电荷的情况下也能够进行导通时的施加于开关元件5两端的电压的时间变化率(dv/dt)的调整。即使在时刻(2)至时刻(4)去除了第二栅极电极8b的电荷的情况下,由于直至去除电荷为止从第二开关区域流动沟道电流,因此也能够通过对第一规定期间t1的长度进行调整,从而对导通时的开关元件5的两端的电压的时间变化率(dv/dt)进行调整。去除电荷或供给反向电位的电荷能够通过与截止的情况相同的动作进行。在设为上述动作的情况下,经过了t2的时刻的第二栅极电极8b的电压与经过了第一规定期间t1的时刻的所述第二栅极电极8b的电压相比降低。
此外,在本实施方式1中,说明了具有将第一栅极电极8a及第二栅极电极8b形成于一个半导体基板的开关元件5的半导体装置100,但对于具有分别形成于两个半导体基板的两个开关元件,这两个开关元件被并联连接的半导体装置而言,在将一个开关元件的栅极电极设为第一栅极电极,将另一个开关元件的栅极电极设为第二栅极电极的情况下,也能够如在本实施方式1中说明的那样通过对第二栅极电极的导通时的电荷进行调整,从而得到相同的效果。另外,如图7所示,在将IGBT替换为MOSFET的情况下,也取得下述效果,即,能够进行导通时的施加于开关元件5两端的电压的时间变化率(dv/dt)的调整。无论是IGBT还是MOSFET,开关元件5可以由Si形成,也可以由SiC、GaN等比Si带隙大的宽带隙半导体形成。
另外,在本实施方式1中,说明了半导体装置100为具有壳体树脂13的壳体型的半导体装置,但也可以是通过环氧树脂等对开关元件5、续流元件12、控制基板21等部件进行了模塑后的传递模塑型的半导体装置。
实施方式2.
对本发明的实施方式2涉及的半导体装置200的结构进行说明。在实施方式1中,说明了通过控制部25的结构以预先设定好的期间对第二规定期间t2进行控制的情况,但在实施方式2中说明如下情况,即,具有用于对第二规定期间t2进行控制的电压检测电路250,基于由电压检测电路250检测出的高电位侧信号端子260和基准电位信号端子14之间的电压对第二规定时间进行控制。此外,在本发明的实施方式2中,省略关于与本发明的实施方式1相同或对应的部分的说明。
使用图8,对本发明的实施方式3涉及的半导体装置200的结构进行说明。图8是表示本发明的实施方式2涉及的半导体装置的结构的俯视图。图8是表示从上表面观察半导体装置200的结构的俯视图,与图3所示的半导体装置100在结构上的不同之处是,在控制基板221内配置有电压检测电路250。另外,图9是表示本发明的实施方式2涉及的半导体装置的去除了控制基板的情况下的结构的俯视图。图9是表示在图8中取下控制基板221后的状态的俯视图。如图9所示,图8中的高电位侧信号端子260是经由导线19及电路图案3与开关元件5的集电极连接的端子。
电压检测电路250经由控制基板221的分别电气独立的导电图案而与基准电位信号端子14及高电位侧信号端子260连接,将集电极和发射极间的电压,即高电位侧信号端子260和基准电位信号端子14之间的电压向控制部225输出。
使用图6,对本发明的实施方式2涉及的半导体装置200的效果进行说明。实施方式2涉及的半导体装置200对图6所记载的时刻(3)至时刻(4)为止的期间进行调整。此外,由于至图6所记载的时刻(3)为止的动作与实施方式1涉及的半导体装置100相同,因此省略说明。
图6(e)所记载的电压波形与高电位侧信号端子260和基准电位信号端子14之间的电压相同,基准电位信号端子14的电压和高电位侧信号端子260的电压也为输入至电压检测电路250的信息。如果高电位侧信号端子260和基准电位信号端子14之间的电压小于或等于规定的阈值,则电压检测电路250将电压检测信号输出至控制部225。此外,由电压检测电路250输出电压检测信号的电压的阈值设定为小于导通开始时的电压的10%的值。这是因为,如图6(e)的电压波形也示出的那样,施加于开关元件5两端的电压的时间变化率(dv/dt)从时刻(1)至时刻(3)为止不是恒定的,在将导通开始时的电压设为100%的情况下,在电压从90%变化为10%的期间变得最高。通过将由电压检测电路250输出电压检测信号的电压的阈值设定为小于导通开始时的电压的10%的值,从而能够增大施加于开关元件5两端的电压的时间变化率(dv/dt)的抑制效果。
如果被输入了电压检测信号,则控制部225再次输出第二控制信号,使第二栅极电极8b的电压上升。即,就本实施方式2涉及的半导体装置200而言,在导通完成后,能够以短期间使第二栅极电极8b的电压上升开始。
就具有栅极电极的半导体装置而言,通常,由通电、周围的环境造成的半导体装置的温度上升、通断的电流越大,导通时的施加于开关元件5两端的电压随时间的变化变得越平缓,时间变化率(dv/dt)变得越小。就本发明的实施方式2涉及的半导体装置200而言,如果高电位侧信号端子260和基准电位信号端子14之间的电压小于或等于规定的阈值,则使第二栅极电极8b的电压上升,因此即使导通时的施加于开关元件5两端的电压的时间变化率(dv/dt)由于环境变化而产生变化,也能够将再次进行第二栅极电极8b的电压上升的定时自动调整为最佳值。其结果,能够缩短图6所记载的时刻(3)至时刻(4)为止的期间,能够降低刚导通后的导通损耗。
通过增大沟道电流,从而能够降低导通损耗。与将栅极电压仅施加于第一栅极电极8a的情况相比,在将栅极电压施加于第一栅极电极8a及第二栅极电极8b这两者的情况下,即输出第一控制信号及第二控制信号这两者的情况下沟道电流变大。因此,通过缩短图6所记载的时刻(3)至时刻(4)为止的期间,延长输出第一控制信号及第二控制信号这两者的时间,从而能够降低刚导通后的导通损耗。就本实施方式2涉及的半导体装置200而言,由于能够将再次进行第二栅极电极8b的电压上升的定时自动地调整为最佳值,因此能够降低刚导通后的导通损耗。
此外,电压检测电路250能够对并联连接的第一开关区域10a及第二开关区域10b的高电位侧电极和低电位侧电极之间的电压进行检测即可,在开关元件5为IGBT的情况下,如果能够对发射极电极和集电极电极之间的电压进行检测,则会取得上述效果。高电位侧电极包含与集电极电极电连接且呈与集电极电极相等的电压的信号端子、主电极,低电位侧电极包含与发射极电极电连接且呈与发射极电极相等的电压的信号端子、主电极。
实施方式3.
图10是表示在本发明的实施方式3涉及的半导体装置搭载的半导体元件的驱动配线的结构的俯视图。本发明的实施方式3涉及的半导体装置300构成为,相对于第一栅极电极308a的电压上升的完成所需要的电荷量,第二栅极电极308b的电压上升的完成所需要的电荷量更多。这里,第一栅极电极8a和第二栅极电极8b的升压完成所需要的电荷量是指直至第一栅极电极308a和第二栅极电极308b变为与电源91的设定电压相等的电压为止第一栅极电极308a和第二栅极电极308b所需要的电荷量。此外,本发明的实施方式3的半导体装置300除了图10所示的半导体元件的驱动配线的结构之外,与实施方式1及2所示的半导体装置的结构相同,省略与本发明的实施方式1及本发明的实施方式2相同或对应的部分的说明。
在图10中,通过使第一栅极电极308a的根数和第二栅极电极308b的根数的比率变更,从而对第一栅极电极308a及第二栅极电极308b的电压上升的完成所需要的电荷量进行调整。构成为,通过相对于第一栅极电极308a的根数使第二栅极电极308b的根数增加,从而使第一栅极电极308a的静电电容比第二栅极电极308b的静电电容大,相对于第一栅极电极308a的电压上升的完成所需要的电荷量,第二栅极电极308b的电压上升的完成所需要的电荷量更多。例如,在图10中,构成为相对于第一栅极电极308a的根数,第二栅极电极308b为其2倍的根数。此外,在图10中,通过使第一栅极电极308a的根数和第二栅极电极308b的根数的比率变更,从而对两者的静电电容的比率进行了变更,但也可以通过使第一栅极电极308a的面积和第二栅极电极308b的面积的比率变更,从对两者的静电电容的比率进行变更。
接下来,对本实施方式3涉及的半导体装置的效果进行说明。根据上述结构,如果在完成了第一栅极电极308a、第二栅极电极308b的电压上升的完成所需要的电荷量的供给的状态下进行比较,则第二开关区域310b的沟道电流能够比第一开关区域310a的沟道电流多。由于导通时的施加于开关元件305两端的电压的时间变化率(dv/dt)与沟道电流具有相关性,因此通过使第二开关区域310b的沟道电流相对于第一开关区域310a的沟道电流的比率增大,即,使第二栅极电极308b的电压上升的完成所需要的电荷量的比率增高,能够拓宽导通时的施加于开关元件305两端的电压的时间变化率(dv/dt)的调整幅度。其结果,能够更容易地进行导通时的控制性和导通损耗的调整。

Claims (11)

1.一种半导体装置,其具备:
第一开关区域,其具有第一栅极电极,沟道电流与通过输入至所述第一栅极电极的控制信号而供给的电荷量对应地受到控制;
第二开关区域,其具有第二栅极电极,沟道电流与通过输入至所述第二栅极电极的控制信号而供给的电荷量对应地受到控制,该第二开关区域与所述第一开关区域并联连接;以及
控制部,其向所述第一栅极电极输出用于使所述第一开关区域导通的第一控制信号,向所述第二栅极电极输出用于使所述第二开关区域导通的第二控制信号,
所述控制部在输出所述第一控制信号和所述第二控制信号而经过了第一规定期间后,使所述第二控制信号的输出停止,
在使所述第二控制信号的输出停止而经过了第二规定期间后,输出所述第二控制信号。
2.根据权利要求1所述的半导体装置,其中,
经过了所述第二规定期间的时刻的所述第二栅极电极的电压比经过了第一规定期间的时刻的所述第二栅极电极的电压低。
3.根据权利要求1或2所述的半导体装置,其中,
所述第一开关区域和所述第二开关区域形成于一个半导体基板。
4.根据权利要求1或2所述的半导体装置,其中,
所述第一开关区域和所述第二开关区域分别形成于不同的半导体基板。
5.根据权利要求1至4中任一项所述的半导体装置,其中,
所述第一开关区域或所述第二开关区域与高电位侧电极及低电位侧电极电连接,
所述半导体装置还具有电压检测电路,该电压检测电路对所述高电位侧电极和所述低电位侧电极之间的电压进行检测,
所述控制部基于由所述电压检测电路检测出的所述高电位侧电极和所述低电位侧电极之间的电压,对所述第二规定期间进行控制。
6.根据权利要求5所述的半导体装置,其中,
所述控制部在所述第二规定期间中的由所述电压检测电路检测出的所述高电位侧电极和所述低电位侧电极之间的电压低于规定的阈值的情况下输出所述第二控制信号,该规定的阈值比在所述第一规定期间的开始时由所述电压检测电路检测出的所述高电位侧电极和所述低电位侧电极之间的电压小。
7.根据权利要求6所述的半导体装置,其中,
所述阈值小于在所述第一规定期间的开始时由所述电压检测电路检测出的所述高电位侧电极和所述低电位侧电极之间的电压的10%。
8.根据权利要求1至7中任一项所述的半导体装置,其中,
供给至所述第二栅极电极的电荷量比供给至所述第一栅极电极的电荷量多。
9.根据权利要求8所述的半导体装置,其中,
所述第二栅极电极的静电电容比所述第一栅极电极的静电电容大。
10.根据权利要求9所述的半导体装置,其中,
所述第二栅极电极的数量比所述第一栅极电极的数量多。
11.根据权利要求1至10中任一项所述的半导体装置,其中,
所述第一开关区域及所述第二开关区域由带隙比Si大的宽带隙半导体形成。
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