CN110506394A - 频率产生器 - Google Patents
频率产生器 Download PDFInfo
- Publication number
- CN110506394A CN110506394A CN201880000473.8A CN201880000473A CN110506394A CN 110506394 A CN110506394 A CN 110506394A CN 201880000473 A CN201880000473 A CN 201880000473A CN 110506394 A CN110506394 A CN 110506394A
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- 239000000872 buffer Substances 0.000 claims description 15
- 238000001914 filtration Methods 0.000 claims description 10
- 230000010355 oscillation Effects 0.000 claims description 9
- 230000003111 delayed effect Effects 0.000 claims description 7
- 230000008030 elimination Effects 0.000 abstract description 12
- 238000003379 elimination reaction Methods 0.000 abstract description 12
- 238000010586 diagram Methods 0.000 description 14
- 238000013139 quantization Methods 0.000 description 11
- 102100038026 DNA fragmentation factor subunit alpha Human genes 0.000 description 7
- 101000950906 Homo sapiens DNA fragmentation factor subunit alpha Proteins 0.000 description 7
- 102100038023 DNA fragmentation factor subunit beta Human genes 0.000 description 6
- 101100277639 Homo sapiens DFFB gene Proteins 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000001934 delay Effects 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 239000000284 extract Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/08—Clock generators with changeable or programmable clock frequency
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
- H03L7/191—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using at least two different signals from the frequency divider or the counter for determining the time difference
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
- H03L7/193—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number the frequency divider/counter comprising a commutable pre-divider, e.g. a two modulus divider
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Manipulation Of Pulses (AREA)
Abstract
一种频率产生器,所述频率产生器包括三角积分调变器,用来产生除数控制信号以及相位控制信号;振荡器,用来产生振荡信号,其中所述振荡信号具有第一频率;可调式除频器,用来根据所述除数控制信号对所述振荡信号进行除频操作,以产生第一除频信号以及第二除频信号,其中所述第一除频信号以及所述第二除频信号具有第二频率;以及相位内插器,用来根据所述相位控制信号对所述第一除频信号以及所述第二除频信号进行相位内插操作,以产生输出信号,所述输出信号具有输出频率;其中,所述第一频率大于所述第二频率。
Description
PCT国内申请,说明书已公开。
Claims (10)
- PCT国内申请,权利要求书已公开。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/CN2018/079632 WO2019178748A1 (zh) | 2018-03-20 | 2018-03-20 | 频率产生器 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN110506394A true CN110506394A (zh) | 2019-11-26 |
CN110506394B CN110506394B (zh) | 2023-05-05 |
Family
ID=67985190
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201880000473.8A Active CN110506394B (zh) | 2018-03-20 | 2018-03-20 | 频率产生器 |
Country Status (4)
Country | Link |
---|---|
US (1) | US11086353B2 (zh) |
EP (1) | EP3567727A4 (zh) |
CN (1) | CN110506394B (zh) |
WO (1) | WO2019178748A1 (zh) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112350694B (zh) * | 2020-10-30 | 2022-09-06 | 上海兆芯集成电路有限公司 | 相位插值器 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20110006936A1 (en) * | 2009-07-09 | 2011-01-13 | National Taiwan University | All-digital spread spectrum clock generator |
US20130076415A1 (en) * | 2011-09-23 | 2013-03-28 | Susumu Hara | Pll using interpolative divider as digitally controlled oscillator |
CN107455009A (zh) * | 2017-07-03 | 2017-12-08 | 深圳市汇顶科技股份有限公司 | 音频***及耳机 |
CN107615226A (zh) * | 2015-12-31 | 2018-01-19 | 深圳市汇顶科技股份有限公司 | 积分电路及电容感测电路 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6426662B1 (en) * | 2001-11-12 | 2002-07-30 | Pericom Semiconductor Corp. | Twisted-ring oscillator and delay line generating multiple phases using differential dividers and comparators to match delays |
US7417510B2 (en) | 2006-09-28 | 2008-08-26 | Silicon Laboratories Inc. | Direct digital interpolative synthesis |
US20110031906A1 (en) * | 2008-04-15 | 2011-02-10 | Panasonic Corporation | Motor driving device, integrated circuit device, motor device, and motor driving system |
JP5106330B2 (ja) * | 2008-09-16 | 2012-12-26 | パナソニック株式会社 | ディジタル制御発振回路、周波数シンセサイザ及び無線通信機器 |
US7733151B1 (en) * | 2008-12-08 | 2010-06-08 | Texas Instruments Incorporated | Operating clock generation system and method for audio applications |
JP2012010308A (ja) * | 2010-05-24 | 2012-01-12 | Panasonic Corp | リファレンスリークの発生や位相ノイズを低減できるpll回路 |
US8248175B2 (en) * | 2010-12-30 | 2012-08-21 | Silicon Laboratories Inc. | Oscillator with external voltage control and interpolative divider in the output path |
US8963588B2 (en) * | 2011-08-22 | 2015-02-24 | Infineon Technologies Ag | Fractional frequency divider |
US8653869B2 (en) * | 2011-10-20 | 2014-02-18 | Media Tek Singapore Pte. Ltd. | Segmented fractional-N PLL |
US8692599B2 (en) * | 2012-08-22 | 2014-04-08 | Silicon Laboratories Inc. | Interpolative divider linearity enhancement techniques |
US9344065B2 (en) * | 2012-10-22 | 2016-05-17 | Mediatek Inc. | Frequency divider, clock generating apparatus, and method capable of calibrating frequency drift of oscillator |
US8791734B1 (en) * | 2013-02-13 | 2014-07-29 | Silicon Laboratories Inc. | Cascaded PLL for reducing low-frequency drift in holdover mode |
US9244484B2 (en) * | 2013-12-11 | 2016-01-26 | International Business Machines Corporation | Fractional-N spread spectrum state machine |
US10678294B2 (en) * | 2016-10-14 | 2020-06-09 | Sound Devices, LLC | Clock for recording devices |
US10534025B2 (en) * | 2017-06-12 | 2020-01-14 | Qualcomm Incorporated | Phase frequency detector linearization using switching supply |
-
2018
- 2018-03-20 EP EP18782865.2A patent/EP3567727A4/en not_active Ceased
- 2018-03-20 CN CN201880000473.8A patent/CN110506394B/zh active Active
- 2018-03-20 WO PCT/CN2018/079632 patent/WO2019178748A1/zh active Application Filing
- 2018-10-12 US US16/158,312 patent/US11086353B2/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20110006936A1 (en) * | 2009-07-09 | 2011-01-13 | National Taiwan University | All-digital spread spectrum clock generator |
US20130076415A1 (en) * | 2011-09-23 | 2013-03-28 | Susumu Hara | Pll using interpolative divider as digitally controlled oscillator |
CN103023495A (zh) * | 2011-09-23 | 2013-04-03 | 硅谷实验室公司 | 将内插分频器用作数控振荡器的pll |
CN107615226A (zh) * | 2015-12-31 | 2018-01-19 | 深圳市汇顶科技股份有限公司 | 积分电路及电容感测电路 |
CN107455009A (zh) * | 2017-07-03 | 2017-12-08 | 深圳市汇顶科技股份有限公司 | 音频***及耳机 |
Also Published As
Publication number | Publication date |
---|---|
CN110506394B (zh) | 2023-05-05 |
US20190294201A1 (en) | 2019-09-26 |
WO2019178748A1 (zh) | 2019-09-26 |
US11086353B2 (en) | 2021-08-10 |
EP3567727A1 (en) | 2019-11-13 |
EP3567727A4 (en) | 2019-11-13 |
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