CN110504297A - Two-dimensional material transistor, preparation method and application based on two-dimensional electron gas regulation backgate - Google Patents
Two-dimensional material transistor, preparation method and application based on two-dimensional electron gas regulation backgate Download PDFInfo
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- CN110504297A CN110504297A CN201810476731.1A CN201810476731A CN110504297A CN 110504297 A CN110504297 A CN 110504297A CN 201810476731 A CN201810476731 A CN 201810476731A CN 110504297 A CN110504297 A CN 110504297A
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Abstract
The invention discloses a kind of two-dimensional material transistor, preparation method and applications based on two-dimensional electron gas regulation backgate.The two-dimensional material transistor based on two-dimensional electron gas regulation backgate includes: hetero-junctions, it includes the first semiconductor and the second semiconductor for being formed on the first semiconductor, second semiconductor has the band gap for being wider than the first semiconductor, and two-dimensional electron gas or two-dimensional hole gas are formed in the hetero-junctions；And it is formed in source electrode, drain and gate on the hetero-junctions, the source electrode, drain electrode are distributed on the second semiconductor and are intervally installed, simultaneously, it is electrically connected between the source electrode and drain electrode through two-dimensional material, the two-dimensional material is used as the communication channel of the transistor, and the grid is electrically connected with the two-dimensional electron gas or two-dimensional hole gas.Two-dimensional material transistor provided by the invention based on two-dimensional electron gas regulation backgate realizes the two-dimensional material transistor of modulated backgate using the electrons high mobility characteristic of two-dimensional electron gas.
Description
Technical field
The present invention is more particularly directed to it is a kind of based on two-dimensional electron gas regulation backgate two-dimensional material transistor, preparation method and application,
Belong to semi-conductor electronic device technical field.
Background technique
The appearance of the two-dimensional materials such as graphene and the development for being successfully prepared as each field are filled with new vitality, two-dimensional material
Type includes metal, semiconductor and insulator, wherein the two-dimensional material with characteristic of semiconductor has in terms of microelectronic component
Wide application prospect.But it is limited by two-dimensional material material itself, is not appropriate for production high power and high voltage device.And
And due to lacking effective performance characterization means, the development of two-dimensional material is greatly limited.
Existing two-dimensional material field effect transistor mostly prepares field effect transistor using two-dimensional material as channel layer,
Structure is as shown in Figure 1, it successively has conductive substrates, insulating medium layer, two-dimensional material, metal electrode from bottom to top.This method letter
Change the preparation process of two-dimensional material field effect transistor, improve preparation efficiency and yield rate.
For example, CN107068745A discloses a kind of preparation method of field effect transistor, by two different two dimensions
Crystal forms heterojunction structure, prepares field effect transistor using the heterojunction structure as conducting channel material, and the device is suitable
For fields such as integrated circuits；The low voltage field effect transistor based on two-dimensional semiconductor material is disclosed in CN104078501A,
Comprising: grid region, source region, drain region, channel region and substrate.Its gate medium is to electronic isolation, to the inorganic porous of ionic conduction
Material contains positive and negative two kinds of ions simultaneously.The interface of gate medium and channel region forms electric double layer capacitance, so that device work electricity
Pressure lowers significantly, while using few layer two-dimensional semiconductor material as channel region material, so that device can be realized simultaneously electronics
Conductive and hole conduction.
However, the prior art mostly uses conductive substrates as backgate, it is poor with the integrated level of other devices, and have larger
Parasitic capacitance and assay reproducibility it is poor, complex process, operation difficulty is big, can not prepare in batches；And existing transistor
Gate dielectric material is required harsh, it is difficult to reach ideal effect.Therefore it provides a kind of two-dimensional material crystal of modulated backgate
Pipe is still industry urgent problem to be solved.
Summary of the invention
The main purpose of the present invention is to provide a kind of two-dimensional material transistors based on two-dimensional electron gas regulation backgate, system
Method and application, with overcome the deficiencies in the prior art.
For realization aforementioned invention purpose, the technical solution adopted by the present invention includes:
The embodiment of the present invention proposes aspect and provides a kind of two-dimensional material transistor based on two-dimensional electron gas regulation backgate,
Include:
Hetero-junctions comprising the first semiconductor and the second semiconductor being formed on the first semiconductor, described the second half lead
Body has the band gap for being wider than the first semiconductor, and two-dimensional electron gas or two-dimensional hole gas are formed in the hetero-junctions；And
Source electrode, the drain and gate being formed on the hetero-junctions, the source electrode, drain electrode be distributed on the second semiconductor and
It is intervally installed, meanwhile, it is electrically connected between the source electrode and drain electrode through two-dimensional material, the two-dimensional material is used as the crystal
The communication channel of pipe, the grid are electrically connected with the two-dimensional electron gas or two-dimensional hole gas.
In some embodiments, insulating medium layer can be also set on the second semiconductor, and the source electrode, drain electrode are set
It sets on insulating medium layer.
The embodiment of the invention also provides a kind of production of two-dimensional material transistor based on two-dimensional electron gas regulation backgate
Method comprising:
Hetero-junctions is provided, the hetero-junctions includes the first semiconductor and the second semiconductor, and second semiconductor is formed in
On first semiconductor, and there is the band gap for being wider than first semiconductor, is formed with two-dimensional electron gas or two in the hetero-junctions
Tie up hole gas；
In making grid on the hetero-junctions, and the grid is made to be electrically connected with the two-dimensional electron gas or two-dimensional hole gas
It connects；
In making the source electrode and drain electrode being intervally installed on second semiconductor；
Two-dimensional material is set between the source electrode and drain electrode, and the two-dimensional material is used as the conducting ditch of the transistor
Road.
The embodiment of the invention also provides the two-dimensional material transistors based on two-dimensional electron gas regulation backgate in preparation
Purposes in two-dimensional material sensing device or detection device.
The embodiment of the invention also provides a kind of characteristic variations detection methods of two-dimensional material comprising:
Production method according to the two-dimensional material transistor based on two-dimensional electron gas regulation backgate makes to form two dimension
Material transistors；
On-load voltage or it is passed through electric current on the two-dimensional material transistor, the transfer output for measuring wherein two-dimensional material is special
Property；
Characteristic variations processing is carried out to the two-dimensional material in the two-dimensional material transistor, later again in the two-dimentional material
Expect on-load voltage on transistor or be passed through electric current, measures the transfer output characteristics of two-dimensional material again, realize to two-dimensional material
Characteristic variations detection.
Compared with prior art, the invention has the advantages that
(1) embodiment of the present invention utilizes the electrons high mobility characteristic of two-dimensional electron gas, realizes the two of modulated backgate
Tie up material transistors, due to not needing to be doped device as channel using two-dimensional material or ion implanting, avoid because
Uniformity that doping or ion implantation technology introduce, repeatability and damage problem is introduced, and ensure that and be connected with gate electrode
The high electron mobility of two-dimensional electron gas reduces the conduction loss of device.Further, since the overall structure of device grows to obtain
Simplify, reduces etching technics, it is possible to device complexity and preparation cost be effectively reduced；
It (2), can be cleverer since the two-dimensional material transistor of the embodiment of the present invention uses two-dimensional electron gas as backgate
The quick characteristic variations for testing out two-dimensional material are suitable for all kinds of two-dimensional material sensors and detector, such as photosensitive sensor, gas
Dependent sensor, photodetector；It is equally applicable to the research of two-dimensional material doping characteristic.
Detailed description of the invention
Fig. 1 is the structural representation for preparing the field effect transistor to be formed as channel layer using two-dimensional material in the prior art
Figure；
Fig. 2 is the material structure schematic diagram formed in 1 step 1) of the embodiment of the present invention；
Fig. 3 is that the device architecture schematic diagram after gate electrode is formed in 1 step 2) of the embodiment of the present invention；
Fig. 4 is that the device architecture schematic diagram after source electrode and drain electrode is formed in 1 step 3) of the embodiment of the present invention；
Fig. 5 is the device architecture schematic diagram in 1 step 4) of the embodiment of the present invention after covering two-dimensional material；
Fig. 6 is finally formed a kind of two dimension based on two-dimensional electron gas regulation backgate in 1 step 5) of the embodiment of the present invention
The device architecture schematic diagram of material transistors；
Fig. 7 is a kind of device of the two-dimensional material transistor based on two-dimensional electron gas regulation backgate in the embodiment of the present invention 2
Another structural schematic diagram；
Fig. 8 is a kind of transfer characteristic curve of grapheme transistor in the embodiment of the present invention 1；
Fig. 9 is a kind of output characteristic curve of grapheme transistor in the embodiment of the present invention 1.
Specific embodiment
In view of deficiency in the prior art, inventor is studied for a long period of time and is largely practiced, and is able to propose of the invention
Technical solution.The technical solution, its implementation process and principle etc. will be further explained as follows.
On the one hand the embodiment of the present invention provides a kind of two-dimensional material transistor based on two-dimensional electron gas regulation backgate,
Include:
Hetero-junctions comprising the first semiconductor and the second semiconductor being formed on the first semiconductor, described the second half lead
Body has the band gap for being wider than the first semiconductor, and two-dimensional electron gas or two-dimensional hole gas are formed in the hetero-junctions；And
Source electrode, the drain and gate being formed on the hetero-junctions, the source electrode, drain electrode be distributed on the second semiconductor and
It is intervally installed, meanwhile, it is electrically connected between the source electrode and drain electrode through two-dimensional material, the two-dimensional material is used as the crystal
The communication channel of pipe, the grid are electrically connected with the two-dimensional electron gas or two-dimensional hole gas.
Aforementioned two-dimensional electron gas (2DEG), which refers to, to be restricted in the third dimension freely in moving in two dimensional directions
Free electron.The mobility that two-dimensional electron gas is moved along in-plane in modulation doping hetero-junctions will be very high and in pole
It compound will not all disappear under low temperature, therefore also known as these electronics are high mobility two-dimensional electron gas.Electron mobility is to influence device
An important factor for part working frequency, the application of high mobility two-dimensional electron gas become current research hotspot and have very big
Application advantage.
Further, Ohmic contact is formed between the grid and the two-dimensional electron gas or two-dimensional hole gas.
The gate electrode of two-dimensional material transistor provided in an embodiment of the present invention is connected with two-dimensional electron gas, and two-dimensional electron gas
It is present in barrier layer in the following, constituting backgate regulation, preparation process is simple, and integrated level is good.But also it can guarantee and gate electrode
The high electron mobility of connected two-dimensional electron gas.
Further, first semiconductor is selected from III-V compound.
Preferably, the material of first semiconductor includes GaN or GaAs, but not limited to this.
Further, the second semiconductor is selected from III-V compound.
Preferably, the material of second semiconductor includes AlGaN or AlGaAs, but not limited to this.
Further, the grid with a thickness of 10-1000nm.
Preferably, the material of the grid include any one or two kinds in Ti, Al, Ni, Au, Cr, Pt, Mo, Pd with
On combination, such as can be chosen from the followings group: Ti/Al/Ni/Au, Ti/Al/Ti/Au, Ti/Al/Cr/Au, Ti/Al/Pt/
Au, Ti/Al/Mo/Au, Ti/Al/Pd/Au, but not limited to this.
Further, the source electrode and/or drain electrode with a thickness of 10-1000nm.
Preferably, the source electrode and/or the material of drain electrode include any one in Au, Cr, Pt, Ag or two or more shapes
At alloy, but not limited to this.
Further, the number of plies of the two-dimensional material is 1-100 layers.
Further, the two-dimensional material is the two-dimensional material or two-dimensional material hetero-junctions of single kind.
Preferably, the two-dimensional material includes graphene, MoS2、WS2In any one or two or more combinations, but
It is without being limited thereto.
In some more specific embodiments, insulating medium layer, the source electrode, leakage are also formed on the hetero-junctions
Pole is set on the insulating medium layer.
Preferably, the insulating medium layer with a thickness of 1-1000nm.
Preferably, the material of the insulating medium layer includes SiO2、AlN、Si3N4In any one or it is two or more
Combination, but not limited to this.
In some more specific embodiments, the hetero-junctions is formed in substrate, and the hetero-junctions and base
Buffer layer is also distributed between bottom.
On the other hand the embodiment of the present invention additionally provides a kind of two-dimensional material crystal based on two-dimensional electron gas regulation backgate
The production method of pipe comprising:
Hetero-junctions is provided, the hetero-junctions includes the first semiconductor and the second semiconductor, and second semiconductor is formed in
On first semiconductor, and there is the band gap for being wider than first semiconductor, is formed with two-dimensional electron gas or two in the hetero-junctions
Tie up hole gas；
In making grid on the hetero-junctions, and the grid is made to be electrically connected with the two-dimensional electron gas or two-dimensional hole gas
It connects；
In making the source electrode and drain electrode being intervally installed on second semiconductor；
Two-dimensional material is set between the source electrode and drain electrode, and the two-dimensional material is used as the conducting ditch of the transistor
Road.
In the preparation method of two-dimensional material transistor provided in an embodiment of the present invention, due to not needing to be doped to device
Or ion implanting, it avoids because of the uniformity of doping or ion implantation technology introducing, repeatability and introduces damage problem.
Further, the preparation method of the two-dimensional material transistor based on two-dimensional electron gas regulation backgate is specifically wrapped
It includes: after the grid that completes on Yu Suoshu hetero-junctions, short annealing, annealing temperature 500- being carried out to the device architecture of formation
1000 DEG C, time 0.1-100min, connect formation ohm between the grid and the two-dimensional electron gas or two-dimensional hole gas
Touching.
Further, the preparation method of the two-dimensional material transistor based on two-dimensional electron gas regulation backgate is specifically wrapped
Include: prior to forming insulating medium layer on second semiconductor, later on the insulating medium layer production formed the source electrode,
Drain electrode.
Further, the preparation method of the two-dimensional material transistor based on two-dimensional electron gas regulation backgate is specifically wrapped
It includes:
Two-dimensional material is transferred between source electrode and drain electrode, and is electrically connected source electrode through two-dimensional material with drain electrode；
Alternatively, growth in situ forms two-dimensional material between source electrode and drain electrode, and make source electrode and drain electrode through two-dimensional material electricity
Connection.
Further, first semiconductor is selected from III-V compound.For example, the material of first semiconductor can
To include GaN or GaAs etc., but not limited to this.
Further, the second semiconductor is selected from III-V compound.
For example, the material of second semiconductor may include AlGaN or AlGaAs etc., but not limited to this.
Further, the grid with a thickness of 10-1000nm.
Preferably, the material of the grid include any one or two kinds in Ti, Al, Ni, Au, Cr, Pt, Mo, Pd with
On combination, such as can be chosen from the followings group: Ti/Al/Ni/Au, Ti/Al/Ti/Au, Ti/Al/Cr/Au, Ti/Al/Pt/
Au, Ti/Al/Mo/Au, Ti/Al/Pd/Au, but not limited to this.By taking Ti/Al/Ni/Au therein as an example, refers to and stack gradually
The Ti layer of setting, Al layers, Ni layers, Au layers.
Further, the source electrode and/or drain electrode with a thickness of 10-1000nm.
Preferably, the source electrode and/or the material of drain electrode include any one in Au, Cr, Pt, Ag or two or more shapes
At alloy, but not limited to this.
Further, the number of plies of the two-dimensional material is 1-100 layers.
Further, the two-dimensional material is the two-dimensional material or two-dimensional material hetero-junctions of single kind.
Preferably, the two-dimensional material includes graphene, MoS2、WS2In any one or two or more combinations, but
It is without being limited thereto.
In some more specific embodiments, insulating medium layer can also be set on the hetero-junctions, and by institute
State source electrode, drain electrode is set on the insulating medium layer.
Preferably, the insulating medium layer with a thickness of 1-1000nm.
Preferably, the material of the insulating medium layer includes SiO2、AlN、Si3N4In any one or it is two or more
Combination, but not limited to this.
In the preparation method of two-dimensional material transistor provided in an embodiment of the present invention, since the overall structure of device grows work
Skill is simplified, and reduces etching technics, effectively reduces the complexity and preparation cost of device.
The embodiment of the invention also provides the two-dimensional material transistors based on two-dimensional electron gas regulation backgate in preparation
Purposes in two-dimensional material sensing device or detection device.
The embodiment of the invention also provides a kind of characteristic variations detection methods of two-dimensional material comprising:
Production method according to the two-dimensional material transistor based on two-dimensional electron gas regulation backgate makes to form two dimension
Material transistors；
On-load voltage or it is passed through electric current on the two-dimensional material transistor, the transfer output for measuring wherein two-dimensional material is special
Property；
Characteristic variations processing is carried out to the two-dimensional material in the two-dimensional material transistor, later again in the two-dimentional material
Expect on-load voltage on transistor or be passed through electric current, measures the transfer output characteristics of two-dimensional material again, realize to two-dimensional material
Characteristic variations detection.
Further, afore-mentioned characteristics change process includes doping or corona treatment etc., but not limited to this.
For example, in some embodiments, it can be by the two-dimensional material in the two-dimensional material transistor and the chemistry specified
The contact such as substance, electromagnetic wave, to make it, physically and/or chemically characteristic changes.
The technical solution, its implementation process and principle etc. will further be solved in conjunction with attached drawing and specific embodiment as follows
Release explanation.
Embodiment 1
A kind of structure for two-dimensional material transistor based on two-dimensional electron gas regulation backgate that the embodiment provides can be as
It may include in the buffer layer, the channel layer (also referred to as the first semiconductor), barrier layer that are set gradually on substrate shown in Fig. 6
(also referred to as the second semiconductor) is arranged at intervals with source electrode and drain electrode on the barrier layer, through two-dimentional material between source electrode and drain electrode
Material electrical connection, grid is electrically connected with two-dimensional electron gas, the two-dimensional electron gas be formed in be made of channel layer and barrier layer it is heterogeneous
In knot.
A kind of preparation method for two-dimensional material transistor based on two-dimensional electron gas regulation backgate that the embodiment provides can
To include the following steps:
1) Metal Organic Chemical Vapor Deposition (MOCVD) or molecular beam epitaxy (MBE) or hydrite vapor phase are utilized
Extension (HVPE) homepitaxy technology, growth substrate/buffer layer/channel layer/barrier layer material structure, structure are as shown in Figure 2；
Substrate can be silicon wafer, sapphire etc., and the material of channel layer includes GaN or GaAs, the material of barrier layer include AlGaN or
AlGaAs is formed with two-dimensional electron gas or two-dimensional hole gas between channel layer and barrier layer；The electric conductivity of barrier layer is poor, such as
The conductivity of AlGaN is 10 Ω/m or 10 Ω/m or more；
2) using metal deposition techniques such as electron beam evaporation or sputterings, grid are made on the material structure surface in step 1)
Electrode, and with short annealing furnace annealing, annealing temperature is 500-1000 DEG C, and time 0.1-100min makes gate electrode and step
1) the material structure surface in forms Ohmic contact, and gate electrode is electrically connected with two-dimensional electron gas or two-dimensional hole gas, makes shape
It is as shown in Figure 3 at the device architecture after gate electrode；Gate electrode with a thickness of 10-1000nm, the material of gate electrode includes Ti/Al/
It is any one in Ni/Au, Ti/Al/Ti/Au, Ti/Al/Cr/Au, Ti/Al/Pt/Au, Ti/Al/Mo/Au, Ti/Al/Pd/Au
Kind；
3) using metal deposition techniques such as electron beam evaporation or sputterings, source is made on the device architecture surface in step 2)
Electrode and drain electrode, the device architecture made after forming source electrode, drain electrode are as shown in Figure 4；The thickness of source electrode and drain electrode
It is 10-1000nm；The material of source electrode and drain electrode includes any one metal or other conductions in Au, Cr, Pt, Ag
The good metal of property and its alloy；
4) two-dimensional material (such as graphene, molybdenum disulfide are grown using the methods of mechanical stripping, chemical vapor deposition (CVD)
Deng) and be transferred to the middle device architecture surface made after forming source electrode, drain electrode of step 3) or the system directly in step 3)
Device architecture surface after forming source electrode, drain electrode grows two-dimensional material, device architecture such as Fig. 5 after growing two-dimensional material
It is shown；Preferably, the number of plies of two-dimensional material is 1-100 layers；Two-dimensional material include single kind two-dimensional material or by two kinds with
The two-dimensional material hetero-junctions that upper two-dimensional material is formed；Preferably, two-dimensional material includes graphene, MoS2、WS2In any one,
Such as graphene/MoS2, graphene/WS2；
5) oxygen plasma or the lithographic techniques such as reactive ion etching or ion beam etching are utilized, etch away except source electrode and
Region makes two-dimensional material and source electrode, drain electrode form Ohmic contact between drain electrode with the two-dimensional material of exterior domain；Etched area
Domain can be determined by the technologies such as photoetching and exposure mask transfer, and finally formed device structure is as shown in Figure 6.
Further, the present embodiment also using semiconductor parameter instrument to preparation formed aforementioned two-dimensional material transistor into
Row test, obtains the transfer output characteristics of two-dimensional material, studies the performance of device.
Further, the present embodiment also the two-dimensional material of aforementioned two-dimensional material transistor surface can be doped or be waited from
Daughter processing, recycles semiconductor parameter instrument to be tested, measures the transfer output characteristics of two-dimensional material, researchs and analyses device spy
The variation of property.
For example, by taking a kind of grapheme transistor that the present embodiment is obtained as an example, using semiconductor parameter instrument to the graphene
Transistor is tested, and applies a fixed voltage Vds between source electrode, drain electrode, and grid applies the voltage Vg of variation, measures device source
Curve, that is, transfer characteristic curve that pole, leakage electrode current Ids change with grid voltage Vg, transfer characteristic curve are as shown in Figure 8；In
Grid applies a fixed voltage Vg, applies the voltage Vds of variation between source electrode, drain electrode, measures source electrode, leakage electrode current Ids with leakage
Curve, that is, output characteristic curve of pole tension Vds variation, output characteristic curve are as shown in Figure 9.
A kind of embodiment 2: the knot for two-dimensional material transistor based on two-dimensional electron gas regulation backgate that the embodiment provides
Structure can be as shown in fig.7, the difference place of itself and the two-dimensional material transistor of embodiment 1 be: being additionally provided on barrier layer absolutely
Edge dielectric layer, source electrode, two-dimensional material, drain electrode are arranged on the insulating medium layer.
The preparation method for the two-dimensional material transistor that the embodiment provides is substantially the same manner as Example 1, and difference place is:
Step 1) further includes insulating medium layer being formed on barrier layer, and etch with lithographic methods such as reactive ion etching or wet etchings
The insulating medium layer of gate electrode lower zone is removed, later redeposited gate metal；Or step 2) further includes being formed in production
After gate electrode, in barrier layer and grid in a manner of atomic layer deposition (ALD) or plasma reinforced chemical vapour deposition (PECVD) etc.
One layer of insulating medium layer is deposited on electrode, then removes the insulating medium layer above gate electrode.The thickness of the insulating medium layer
It can be 1-1000nm, the material of insulating medium layer includes SiO2、AlN、Si3N4In any one or two or more combinations.
It should be appreciated that the technical concepts and features of above-described embodiment only to illustrate the invention, its object is to allow be familiar with this
The personage of item technology cans understand the content of the present invention and implement it accordingly, and it is not intended to limit the scope of the present invention.It is all
Equivalent change or modification made by Spirit Essence according to the present invention, should be covered by the protection scope of the present invention.
Claims (14)
1. a kind of two-dimensional material transistor based on two-dimensional electron gas regulation backgate, characterized by comprising:
Hetero-junctions comprising the first semiconductor and the second semiconductor being formed on the first semiconductor, the second semiconductor tool
There is the band gap for being wider than the first semiconductor, and is formed with two-dimensional electron gas or two-dimensional hole gas in the hetero-junctions；And
Source electrode, the drain and gate being formed on the hetero-junctions, the source electrode, drain electrode are distributed on the second semiconductor and each other
Interval setting, meanwhile, it is electrically connected between the source electrode and drain electrode through two-dimensional material, the two-dimensional material is used as the transistor
Communication channel, the grid are electrically connected with the two-dimensional electron gas or two-dimensional hole gas.
2. the two-dimensional material transistor according to claim 1 based on two-dimensional electron gas regulation backgate, it is characterised in that: institute
It states and forms Ohmic contact between grid and the two-dimensional electron gas or two-dimensional hole gas.
3. the two-dimensional material transistor according to claim 1 based on two-dimensional electron gas regulation backgate, it is characterised in that: institute
It states the first semiconductor and is selected from III-V compounds of group；Preferably, the material of first semiconductor includes GaN or GaAs；And/or
Second semiconductor is selected from III-V compounds of group；Preferably, the material of second semiconductor includes AlGaN or AlGaAs.
4. the two-dimensional material transistor according to claim 1 based on two-dimensional electron gas regulation backgate, it is characterised in that: described
Grid with a thickness of 10-1000nm；And/or the material of the grid includes any in Ti, Al, Ni, Au, Cr, Pt, Mo, Pd
A combination of one or more；And/or the source electrode and/or drain electrode with a thickness of 10-1000nm；And/or the source electrode
And/or the material of drain electrode includes the alloy of any one or the two or more formation in Au, Cr, Pt, Ag.
5. the two-dimensional material transistor according to claim 1 based on two-dimensional electron gas regulation backgate, it is characterised in that: described
The number of plies of two-dimensional material is 1-100 layers；And/or the two-dimensional material is heterogeneous for the two-dimensional material or two-dimensional material of single kind
Knot；Preferably, the two-dimensional material includes graphene, MoS2、WS2In any one or two or more combinations.
6. the two-dimensional material transistor according to claim 1 based on two-dimensional electron gas regulation backgate, it is characterised in that: described
Insulating medium layer is also formed on hetero-junctions, the source electrode, drain electrode are arranged on insulating medium layer；Preferably, the insulation is situated between
Matter layer with a thickness of 1-1000nm；Preferably, the material of the insulating medium layer includes SiO2、AlN、Si3N4In any one
Or two or more combination.
7. the two-dimensional material transistor according to claim 1 based on two-dimensional electron gas regulation backgate, it is characterised in that: described
Hetero-junctions is formed in substrate, and buffer layer is also distributed between the hetero-junctions and substrate.
8. a kind of production method of the two-dimensional material transistor based on two-dimensional electron gas regulation backgate, characterized by comprising:
Hetero-junctions is provided, the hetero-junctions includes the first semiconductor and the second semiconductor, and second semiconductor is formed in first
On semiconductor, and there is the band gap for being wider than first semiconductor, two-dimensional electron gas is formed in the hetero-junctions or two dimension is empty
Cave gas；
In making grid on the hetero-junctions, and it is electrically connected the grid with the two-dimensional electron gas or two-dimensional hole gas；
In making the source electrode and drain electrode being intervally installed on second semiconductor；
Two-dimensional material is set between the source electrode and drain electrode, and the two-dimensional material is used as to the conducting ditch of the transistor
Road.
9. the preparation method of the two-dimensional material transistor according to claim 8 based on two-dimensional electron gas regulation backgate, special
Sign is to specifically include: after the grid that completes on Yu Suoshu hetero-junctions, carrying out short annealing to the device architecture of formation, moves back
Fiery temperature is 500-1000 DEG C, time 0.1-100min, make the grid and the two-dimensional electron gas or two-dimensional hole gas it
Between form Ohmic contact.
10. the preparation method of the two-dimensional material transistor according to claim 8 based on two-dimensional electron gas regulation backgate, special
Sign is to specifically include: prior to forming insulating medium layer on second semiconductor, making on the insulating medium layer later
Form the source electrode, drain electrode.
11. the preparation method of the two-dimensional material transistor according to claim 8 based on two-dimensional electron gas regulation backgate, special
Sign is to specifically include:
Two-dimensional material is transferred between source electrode and drain electrode, and is electrically connected source electrode through two-dimensional material with drain electrode；
Alternatively, growth in situ forms two-dimensional material between source electrode and drain electrode, and it is electrically connected source electrode through two-dimensional material with drain electrode.
12. the preparation method of the two-dimensional material transistor according to claim 8 based on two-dimensional electron gas regulation backgate, special
Sign is: first semiconductor is selected from III-V compounds of group；Preferably, the material of first semiconductor include GaN or
GaAs；And/or second semiconductor be selected from be selected from III-V compounds of group；Preferably, the material of second semiconductor includes
AlGaN or AlGaAs；And/or the grid with a thickness of 10-1000nm；And/or the material of the grid include Ti, Al,
Any one in Ni, Au, Cr, Pt, Mo, Pd or two or more combinations；And/or the source electrode and/or drain electrode with a thickness of
10-1000nm；And/or the source electrode and/or the material of drain electrode include in Au, Cr, Pt, Ag any one or it is two or more
The alloy of formation；And/or the number of plies of the two-dimensional material is 1-100 layers；And/or the two-dimensional material includes single kind
Two-dimensional material or two-dimensional material hetero-junctions；Preferably, the two-dimensional material includes graphene, MoS2、WS2In any one or
Two or more combinations.
13. the two-dimensional material transistor based on two-dimensional electron gas regulation backgate as described in any one of claim 1-7 is in preparation
Purposes in two-dimensional material sensing device or detection device.
14. a kind of characteristic variations detection method of two-dimensional material, characterized by comprising:
It makes to form two-dimensional material transistor according to method described in any one of claim 8-12；
On-load voltage or it is passed through electric current on the two-dimensional material transistor, measures the transfer output characteristics of wherein two-dimensional material；
Characteristic variations processing is carried out to the two-dimensional material in the two-dimensional material transistor, the characteristic variations processing includes mixing
Miscellaneous or corona treatment on-load voltage or is passed through electric current on the two-dimensional material transistor again later, measures two again
The transfer output characteristics of material is tieed up, realizes and the characteristic variations of two-dimensional material is detected.
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| PCT/CN2019/085974 WO2019218907A1 (en) | 2018-05-17 | 2019-05-08 | Two-dimensional material transistor for regulating back gate on the basis of two-dimensional electron gas, manufacturing method, and application |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112834579A (en) * | 2021-01-07 | 2021-05-25 | 中国科学院苏州纳米技术与纳米仿生研究所 | Semiconductor gas sensor and preparation method and application thereof |
| CN113315507A (en) * | 2021-05-24 | 2021-08-27 | 北京科技大学 | Two-dimensional material light-operated logic gate |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101777583A (en) * | 2010-02-05 | 2010-07-14 | 电子科技大学 | Graphene field effect transistor |
| JP2015149360A (en) * | 2014-02-05 | 2015-08-20 | トヨタ自動車株式会社 | compound semiconductor FET |
| CN104977347A (en) * | 2014-04-04 | 2015-10-14 | 中国科学院苏州纳米技术与纳米仿生研究所 | Graphene-based chemical or biological sensor and manufacture method thereof |
| CN105336809A (en) * | 2015-11-09 | 2016-02-17 | 中国工程物理研究院电子工程研究所 | Terahertz wave detector with array conductive channel structure |
| CN106206710A (en) * | 2016-07-15 | 2016-12-07 | 广东工业大学 | A kind of two-dimensional material HFET, its preparation method and transistor array devices |
| CN106910724A (en) * | 2016-04-05 | 2017-06-30 | 苏州捷芯威半导体有限公司 | A kind of semiconductor devices |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7728355B2 (en) * | 2005-12-30 | 2010-06-01 | International Rectifier Corporation | Nitrogen polar III-nitride heterojunction JFET |
| CN103715257B (en) * | 2014-01-09 | 2017-01-18 | 杭州电子科技大学 | HEMT device with back surface field plate structure and manufacturing method of HEMT device |
| CN104916685A (en) * | 2015-06-24 | 2015-09-16 | 无锡晶凯科技有限公司 | Silicon-based GaN HEMTs longitudinal power device and manufacturing method thereof |
| CN107068745A (en) * | 2017-03-31 | 2017-08-18 | 北京交通大学 | A kind of field-effect transistor and preparation method thereof |
-
2018
- 2018-05-17 CN CN201810476731.1A patent/CN110504297B/en active Active
-
2019
- 2019-05-08 WO PCT/CN2019/085974 patent/WO2019218907A1/en active Application Filing
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101777583A (en) * | 2010-02-05 | 2010-07-14 | 电子科技大学 | Graphene field effect transistor |
| JP2015149360A (en) * | 2014-02-05 | 2015-08-20 | トヨタ自動車株式会社 | compound semiconductor FET |
| CN104977347A (en) * | 2014-04-04 | 2015-10-14 | 中国科学院苏州纳米技术与纳米仿生研究所 | Graphene-based chemical or biological sensor and manufacture method thereof |
| CN105336809A (en) * | 2015-11-09 | 2016-02-17 | 中国工程物理研究院电子工程研究所 | Terahertz wave detector with array conductive channel structure |
| CN106910724A (en) * | 2016-04-05 | 2017-06-30 | 苏州捷芯威半导体有限公司 | A kind of semiconductor devices |
| CN106206710A (en) * | 2016-07-15 | 2016-12-07 | 广东工业大学 | A kind of two-dimensional material HFET, its preparation method and transistor array devices |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112834579A (en) * | 2021-01-07 | 2021-05-25 | 中国科学院苏州纳米技术与纳米仿生研究所 | Semiconductor gas sensor and preparation method and application thereof |
| CN113315507A (en) * | 2021-05-24 | 2021-08-27 | 北京科技大学 | Two-dimensional material light-operated logic gate |
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| Publication number | Publication date |
|---|---|
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| WO2019218907A1 (en) | 2019-11-21 |
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