CN109546974B - Multichannel current multiplexing chopper amplifier and chip - Google Patents
Multichannel current multiplexing chopper amplifier and chip Download PDFInfo
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- CN109546974B CN109546974B CN201811364721.5A CN201811364721A CN109546974B CN 109546974 B CN109546974 B CN 109546974B CN 201811364721 A CN201811364721 A CN 201811364721A CN 109546974 B CN109546974 B CN 109546974B
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- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/34—Negative-feedback-circuit arrangements with or without positive feedback
- H03F1/342—Negative-feedback-circuit arrangements with or without positive feedback in field-effect transistor amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
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- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45376—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using junction FET transistors as the active amplifying circuit
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Abstract
The invention discloses a multichannel current multiplexing chopper amplifier, which comprises a plurality of amplifier units; the amplifier unit comprises a differential input end, a first chopping switch, an input stage amplifying circuit, a second chopping switch, an output stage amplifying circuit and a feedback loop, wherein the differential input end, the first chopping switch, the input stage amplifying circuit, the second chopping switch and the output stage amplifying circuit are sequentially connected; an input capacitor is arranged between the first chopping switch and the input stage amplifying circuit; an isolation capacitor is arranged between the input-stage amplifying circuit and the second chopping switch, and the input end of the output-stage amplifying circuit is provided with a bias resistor; the input stage amplifying circuits of two adjacent amplifier units are connected in a stacked mode, and all the amplifier units multiplex a current source. The input stage amplifying circuit of the invention shares one current source, which simplifies the complexity of the circuit and reduces the area and power consumption of the integrated circuit. The invention can be widely applied to the field of integrated circuits.
Description
Technical Field
The invention relates to the field of integrated circuits, in particular to a multi-channel current multiplexing chopper amplifier and a chip.
Background
The acquisition of low-frequency weak signals, especially biomedical signals, usually has specific requirements on the front-end amplification circuit. In the low frequency band, flicker noise is significant, and therefore chopping of the signal to be amplified is generally required to filter out the low frequency noise. In addition, for an implanted multi-channel biomedical signal acquisition system, the front-end amplification circuit is also required to have the characteristics of low power consumption and small area.
In the prior art, an orthogonal current multiplexing technology is a way to realize low-power-consumption multi-channel weak signal acquisition. In the technology, a differential pair of an input stage amplifying circuit adopts a binary tree structure, namely a differential pair MOS tube of a first channel is used as a tail current source of a differential pair of a second channel, a differential pair MOS tube of the second channel is used as a tail current source of a differential pair of a third channel, and the like. Although the orthogonal current multiplexing structure can effectively reduce the overall power consumption of the system and does not affect the noise performance of the system, the orthogonal current multiplexing structure needs an additional current recombination circuit, which increases the complexity of the system and occupies additional area and power consumption; as the number of stacked layers increases, the number of current recombination legs grows exponentially.
Disclosure of Invention
To solve the above technical problems, the present invention aims to: the multichannel current multiplexing chopper amplifier and the chip are low in complexity and power consumption.
The first technical scheme adopted by the invention is as follows:
a multi-channel current-multiplexing chopper amplifier includes a plurality of amplifier cells;
the amplifier unit includes:
the differential input end is used for connecting the differential voltage signal into the chopper amplifier;
a first chopping switch for modulating a differential voltage signal input from the differential input terminal to a chopping frequency;
the input stage amplifying circuit is used for amplifying an input signal;
the second chopping switch is used for demodulating the signal output by the input stage amplifying circuit;
the output stage amplifying circuit is used for amplifying the differential voltage signal demodulated by the second chopping switch;
a feedback loop including a feedback chopping switch and a feedback capacitor;
the feedback chopping switch is used for modulating an output signal of the output stage amplifying circuit to a chopping frequency and is connected to the input end of the input stage amplifying circuit through the feedback capacitor to form negative feedback;
an input capacitor is arranged between the first chopping switch and the input stage amplifying circuit; an isolation capacitor is arranged between the input-stage amplifying circuit and the second chopping switch, and the input end of the output-stage amplifying circuit is provided with a bias resistor;
the input stage amplifying circuits of two adjacent amplifier units are connected in a stacked mode, and all the amplifier units multiplex a current source.
Further, the input stage amplifying circuit comprises a first P-channel field effect transistor, a second P-channel field effect transistor, a first N-channel field effect transistor, a second N-channel field effect transistor, a first pseudo resistor and a second pseudo resistor;
the first end of the first pseudo resistor is connected with the grid electrode of the first P-channel field effect transistor and the grid electrode of the first N-channel field effect transistor and forms a positive phase input end of the input stage amplifying circuit; the second end of the first pseudo resistor is connected with the drain electrode of the first P-channel field effect transistor and the drain electrode of the first N-channel field effect transistor and forms an inverted output end of the input stage amplifying circuit;
the first end of the second pseudo resistor is connected with the grid electrode of the second P-channel field effect transistor and the grid electrode of the second N-channel field effect transistor and forms the inverting input end of the input stage amplifying circuit; the second end of the second pseudo resistor is connected with the drain electrode of the second P-channel field effect transistor and the drain electrode of the second N-channel field effect transistor and forms a positive phase output end of the input stage amplifying circuit;
the source electrode of the first P-channel field effect transistor is connected with the source electrode of the second P-channel field effect transistor; the source of the first N-channel field effect transistor is connected to the source of the second N-channel field effect transistor.
Further, the first chopping switch, the second chopping switch and the feedback chopping switch are identical in structure;
the first chopping switch comprises a third N-channel field effect transistor, a fourth N-channel field effect transistor, a fifth N-channel field effect transistor and a sixth N-channel field effect transistor;
the drain electrode of the third N-channel field effect transistor is connected with the source electrode of the fourth N-channel field effect transistor and forms a first input end of the first chopping switch; the source electrode of the third N-channel field effect transistor is connected with the source electrode of the sixth N-channel field effect transistor and forms a second output end of the first chopping switch;
the drain electrode of the fifth N-channel field effect transistor is connected with the drain electrode of the fourth N-channel field effect transistor and forms a first output end of the first chopping switch; the source electrode of the fifth N-channel field effect transistor is connected with the drain electrode of the sixth N-channel field effect transistor and forms a second input end of the first chopping switch;
the grid electrode of the fourth channel field effect transistor and the grid electrode of the sixth channel field effect transistor jointly form a positive-phase chopping signal input end of the first chopping switch; and the grid electrode of the third channel field effect transistor and the grid electrode of the fifth channel field effect transistor jointly form an inverted chopping signal input end of the first chopping switch.
Further, the output stage amplifying circuit comprises a fully differential amplifying circuit and a common mode feedback circuit.
Further, the fully differential amplifying circuit comprises a third P-channel field effect transistor, a fourth P-channel field effect transistor, a fifth P-channel field effect transistor, a sixth P-channel field effect transistor, a seventh N-channel field effect transistor, an eighth N-channel field effect transistor, a ninth N-channel field effect transistor, a third pseudo resistor and a fourth pseudo resistor;
the source electrode of the third P-channel field effect transistor, the source electrode of the fourth P-channel field effect transistor, the source electrode of the fifth P-channel field effect transistor and the source electrode of the sixth P-channel field effect transistor are connected to the positive electrode of the power supply, and the drain electrode of the third P-channel field effect transistor and the drain electrode of the fifth P-channel field effect transistor are connected with the drain electrode of the seventh N-channel field effect transistor; the drain electrode of the fourth P-channel field effect transistor and the drain electrode of the sixth P-channel field effect transistor are both connected with the drain electrode of the eighth N-channel field effect transistor; the source electrode of the seventh N-channel field effect transistor and the source electrode of the eighth N-channel field effect transistor are both connected with the drain electrode of the ninth N-channel field effect transistor, and the source electrode of the ninth N-channel field effect transistor is grounded; the third pseudo resistor and the fourth pseudo resistor are connected in series between the drain electrode of the seventh N-channel field effect transistor and the drain electrode of the eighth N-channel field effect transistor; the grid electrode of the third P-channel field effect transistor is connected with the grid electrode of the fourth P-channel field effect transistor;
the grid electrode of the seventh N-channel field effect transistor forms a positive phase input end of the output stage amplifying circuit; the grid electrode of the eighth N-channel field effect transistor forms an inverting input end of the output stage amplifying circuit; the drain electrode of the seventh N-channel field effect transistor forms an inverted output end of the output stage amplifying circuit; the drain electrode of the eighth N-channel field effect transistor forms a positive phase output end of the output stage amplifying circuit; the grid electrode of the fifth P-channel field effect transistor and the grid electrode of the sixth P-channel field effect transistor form a first bias voltage input end; the gate of the ninth N-channel field effect transistor constitutes a second bias voltage input terminal.
Further, the common mode feedback circuit comprises a seventh P-channel field effect transistor, an eighth P-channel field effect transistor, a tenth N-channel field effect transistor, an eleventh N-channel field effect transistor and a twelfth N-channel field effect transistor;
the source electrode of the seventh P-channel field effect transistor and the source electrode of the eighth P-channel field effect transistor are both connected to the positive electrode of the power supply; and the drain electrode of the seventh P-channel field effect transistor is connected with the drain electrode of the tenth N-channel field effect transistor, and the drain electrode of the eighth P-channel field effect transistor is connected with the drain electrode of the eleventh N-channel field effect transistor. The drain electrode of the tenth N-channel field effect transistor is also connected with the grid electrode of the seventh P-channel field effect transistor and the grid electrode of the eighth P-channel field effect transistor respectively; the source electrode of the tenth N-channel field effect transistor and the source electrode of the eleventh N-channel field effect transistor are both connected with the drain electrode of the twelfth N-channel field effect transistor; a source electrode of the twelfth N-channel field effect transistor is grounded; the grid electrode of the twelfth N-channel field effect transistor is connected with the second bias voltage input end; a grid electrode of the tenth N-channel field effect transistor forms a common-mode level input end of the common-mode feedback circuit, and a grid electrode of the eleventh N-channel field effect transistor forms a reference voltage input end of the common-mode feedback circuit; and the drain electrode of the eleventh N-channel field effect transistor forms a feedback output end of the common-mode feedback circuit.
Further, the first pseudo resistor, the second pseudo resistor, the third pseudo resistor and the fourth pseudo resistor are identical in structure, and the first pseudo resistor comprises a thirteenth N-channel field effect transistor and a fourteenth N-channel field effect transistor; the grid electrode and the drain electrode of the thirteenth N-channel field effect transistor and the grid electrode and the drain electrode of the fourteenth N-channel field effect transistor are connected together, the source electrode of the thirteenth N-channel field effect transistor forms a first end of the first pseudo resistor, and the source electrode of the fourteenth N-channel field effect transistor forms a second end of the first pseudo resistor.
Further, the number of the amplifier units is 4.
The second technical scheme adopted by the invention is as follows:
a chip includes a multi-channel current-multiplexed chopper amplifier.
The invention has the beneficial effects that: compared with the circuit structure in the prior art, the circuit structure does not need an additional current recombination circuit, simplifies the complexity of the circuit and reduces the area and the power consumption of an integrated circuit.
Drawings
FIG. 1 is a schematic diagram of a multi-channel current-multiplexed chopper amplifier in accordance with an embodiment of the present invention;
FIG. 2 is a schematic diagram of an amplifier unit according to an embodiment of the invention;
FIG. 3 is a schematic diagram of an input stage amplification circuit according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a chopper switch in accordance with one embodiment of the present invention;
FIG. 5 is a schematic diagram of a fully differential amplifier circuit according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of a common mode feedback circuit according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of a pseudo resistor according to an embodiment of the present invention.
Detailed Description
The invention is further described with reference to the drawings and the specific examples.
Referring to fig. 1, a multi-channel current-multiplexing chopper amplifier includes a plurality of amplifier units, as shown in fig. 1, including a first amplifier unit CH1, a second amplifier unit CH2, a third amplifier unit CH3, and a fourth amplifier unit CH 4.
Referring to fig. 2, the amplifier unit includes:
the differential input end is used for connecting the differential voltage signal into the chopper amplifier; taking the first amplifier unit CH1 as an example, the differential voltage signal input from the differential input terminal is Vi1-、Vi1+(ii) a The output signal is Vout1-、Vout1+。
The first chopping switch X1 is used for modulating the differential voltage signal input from the differential input terminal to the chopping frequency.
Input stage amplifying circuit gm1For amplifying the input signal. Wherein, the input stage amplifying circuit gm1Comprises an output signal modulated by the first chopping switch X1 and a feedback signal input by a feedback loop, and thus, the input stage amplifying circuit gm1Is a superposition of both.
A second chopping switch X2 for amplifying the input stage circuit gm1The output signal is demodulated. While modulating the low frequency noise to the chopping frequency. Modulation and demodulation are for the original signal; modulation means that when an original signal passes through a first chopping switch, the original signal is shifted from a base frequency to a chopping frequency; demodulation refers to that the signal at the chopping frequency is restored to the original signal when passing through the second chopping switch. For low-frequency noise, the low-frequency noise is not subjected to the first chopping switch, and is only shifted to the odd harmonic frequency of the chopping square wave by the second chopping switch, so that the low-frequency noise can be separated from the low-frequency original signal and filtered.
Output stage amplifying circuit gm2And amplifies the differential voltage signal demodulated by the second chopping switch X2.
A feedback loop including a feedback chopping switch X3 and a feedback capacitor Cf；
The feedback chopping switch X3 is used for amplifying an output stage of the circuit gm2Is modulated to the chopping frequency and is passed through a feedback capacitor CfConnected into an input stage amplifying circuit gm1Forming negative feedback;
wherein, the first chopping switch X1 and the input stage amplifying circuit gm1An input capacitor C is arranged betweenin(ii) a In an input stage amplifying circuit gm1An isolation capacitor C is arranged between the first chopper switch X2 and the second chopper switch X2DCSaid output stage amplifying circuit gm2Is provided with a bias resistor Rb(ii) a Of course, the bias resistor RbIs connected to a reference voltage Vref。
Wherein, the isolation capacitor CDCHas the functions of realizing alternating current coupling and isolating the input stage amplifying circuit gm1The offset voltage of (3).
Input capacitance CinAnd a feedback capacitor CfTogether determining the closed loop gain of the amplifier unit.
Of course, the output stage amplifying circuit g can also be usedm2And a load capacitor is connected between the output end of the capacitor and the ground.
As shown in FIG. 1, the input stage amplifying circuits of two adjacent amplifier units are connected in a stacked manner, and all the amplifier units multiplex a current source Ibias. Compared with the circuit structure in the prior art, the circuit structure in the embodiment does not need an additional current recombination circuit, thereby simplifying the complexity of the circuit and reducing the area and power consumption of an integrated circuit.
Referring to fig. 3, the input stage amplifying circuit g is a preferred embodimentm1Comprising a first P-channel field effect transistor MP1A second P-channel field effect transistor MP2A first N-channel field effect transistor MN1A second N-channel field effect transistor MN2A first dummy resistor Rb1And a second dummy resistor Rb2；
The first pseudo resistor Rb1First terminal and first P-channel field effect transistor MP1And a first N-channel field effect transistor MN1And constitutes an input stage amplifying circuit gm1Positive phase input terminal V ofins1+(ii) a The first pseudo resistor Rb1And the first P-channel field effect transistor MP1And a first N-channel field effect transistor MN1And constitutes an input stage amplifying circuit gm1Is inverted output terminal Vouts1-；
The second pseudo resistor Rb2First terminal and second P-channel field effect transistor MP2And a second N-channel field effect transistor MN2And constitutes an input stage amplifying circuit gm1Is inverted input terminal Vins1-(ii) a The second pseudo resistor Rb2Second terminal and second P-channel field effect transistor MP2And a second N-channel field effect transistor MN2And constitutes an input stage amplifying circuit gm1Positive phase output terminal V ofouts1+；
The first P-channel field effect transistor MP1And a second P-channel field effect transistor MP2And access point P1; a first N-channel field effect transistor MN1And a second N-channel field effect transistor MN2And access point P2. In the multi-channel current multiplexing chopper amplifier, a point P1 of the amplifier unit of the first channel is connected to the anode of the input power supply, a point P2 of the amplifier unit of the first channel is connected to a point P1 of the amplifier unit of the second channel, a point P2 of the amplifier unit of the second channel is connected to a point P1 of the amplifier unit of the third channel, and so on, and a point P2 of the amplifier unit of the last channel is connected to the tail current source.
First P-channel field effect transistor MP1And a second P-channel field effect transistor MP2The substrates are all connected with the positive electrode of a power supply; a first N-channel field effect transistor MN1And a second N-channel field effect transistor MN2Are all grounded.
Referring to fig. 4, as a preferred embodiment, the first chopping switch X1, the second chopping switch X2 and the feedback chopping switch X3 are identical in structure; the present embodiment will be described by taking the first chopping switch X1 as an example.
The first chopping switch X1 comprises a third N-channel field effect transistor MN3A fourth N-channel field effect transistor MN4A fifth N-channel field effect transistor MN5And a sixth N-channel field effect transistor MN6；
The third N-channel field effect transistor MN3And a fourth N-channel field effect transistor MN4And constitutes a first input terminal In of a first chopping switch X11(ii) a The third N-channel field effect transistor MN3And a sixth N-channel field effect transistor MN6And constitutes a second output Out of the first chopping switch X12；
The fifth N-channel field effect transistor MN5And a fourth N-channel field effect transistor MN4And constitutes a first output Out of a first chopping switch X11(ii) a The fifth N-channel field effect transistor MN5And a sixth N-channel field effect transistor MN6And constitutes a second input terminal In of the first chopping switch X12；
The fourth channel field effect transistor MN4And a sixth channel field effect transistor MN6The gates of which together form the non-inverting chopping signal input terminal clk of the first chopping switch X1; the third channel field effect transistor MN3And a fifth channel field effect transistor MN5Which together form the inverting chopping signal input terminal clkn of the first chopping switch X1. The first chopping switch X1 chops the input signal under the control of the positive-phase chopping signal and the negative-phase chopping signal.
Wherein, the three N-channel field effect transistor MN3A fourth N-channel field effect transistor MN4A fifth N-channel field effect transistor MN5And a sixth N-channel field effect transistor MN6Are all grounded.
The lower limit of the chopping frequency is usually determined by the corner frequency of the low-frequency noise of the operational amplifier, and the upper limit is determined by the bandwidth of the main operational amplifier; in neural signal acquisition applications, the chopping frequency is typically in the range of 5kHz to 20 kHz. In this embodiment, the chopping clock frequency is 10 kHz. The chopping switch of the invention has the following principle: two chopper clock signals with 50% duty ratio and opposite phases are respectively input to a positive phase chopper signal input terminal clk and an opposite phase chopper signal input terminal clkn of the chopper switch to control the chopper shown in fig. 4Switching of a switch; when the positive phase chopping signal input terminal clk is at a high level and the negative phase chopping signal input terminal clkn is at a low level, the first input terminal In1And a first output terminal Out1Is conducted with the second output terminal Out2Disconnecting; second input terminal In2And a first output terminal Out1Is disconnected and is connected with the second output terminal Out2Conducting; when the positive chopping signal input terminal clk is at a low level and the negative chopping signal input terminal clkn is at a high level, the first input terminal In1And a first output terminal Out1Is disconnected and is connected with the second output terminal Out2Conducting; second input terminal In2And a first output terminal Out1Is conducted with the second output terminal Out2Disconnecting; in the embodiment, all chopping clock signals used by the chopping switches are the same, and when an input signal passes through the first chopping switch X1, the input signal is multiplied by a square wave with the frequency of 10kHz and the amplitude of +/-1, so that the square wave is modulated to the chopping frequency and odd harmonics thereof; when this signal passes through the second chopping switch X2, which, like before, is equivalent to multiplying by the same square wave of frequency 10kHz, the previously modulated signal can be restored to the original signal at this stage.
As a preferred embodiment, the output stage amplifying circuit gm2The circuit comprises a fully differential amplifying circuit and a common mode feedback circuit.
Referring to fig. 5, as a preferred embodiment, the fully differential amplifying circuit includes a third P-channel field effect transistor MP3And a fourth P-channel field effect transistor MP4And a fifth P-channel field effect transistor MP5And a sixth P-channel field effect transistor MP6A seventh N-channel field effect transistor MN7And an eighth N-channel field effect transistor MN8And a ninth N-channel field effect transistor MN9A third dummy resistor Rb3And a fourth dummy resistor Rb4；
The third P-channel field effect transistor MP3Source electrode of, fourth P-channel field effect transistor MP4Source electrode of, fifth P-channel field effect transistor MP5And a sixth P-channel field effect transistor MP6The source electrodes are all connected to the positive power supplyA third P-channel field effect transistor MP3And a fifth P-channel field effect transistor MP5And the drain electrodes of the first and second N-channel field effect transistors MN7Is connected with the drain electrode of the transistor; the fourth P-channel field effect transistor MP4And a sixth P-channel field effect transistor MP6And the drain electrodes of the first and second N-channel field effect transistors MN8Is connected with the drain electrode of the transistor; the seventh N-channel field effect transistor MN7And an eighth N-channel field effect transistor MN8And a ninth N-channel field effect transistor MN9Of said ninth N-channel field effect transistor MN9The source of (2) is grounded; the third pseudo resistor Rb3And a fourth dummy resistor Rb4Serially connected to a seventh N-channel field effect transistor MN7And an eighth N-channel field effect transistor MN8Between the drain electrodes of (1); the third P-channel field effect transistor MP3And a fourth P-channel field effect transistor MP4The gate of (1) is connected;
the seventh N-channel field effect transistor MN7The gate of (a) constitutes an output stage amplifying circuit gm2Positive phase input terminal V ofin+(ii) a The eighth N-channel field effect transistor MN8The gate of (a) constitutes an output stage amplifying circuit gm2Is inverted input terminal Vin-(ii) a The seventh N-channel field effect transistor MN7The drain electrode of (1) constitutes an output stage amplifying circuit gm2Is inverted output terminal Vout-(ii) a The eighth N-channel field effect transistor MN8The drain electrode of (1) constitutes an output stage amplifying circuit gm2Positive phase output terminal V ofout+(ii) a The fifth P-channel field effect transistor MP5And a sixth P-channel field effect transistor MP6Constitutes a first bias voltage input terminal Vbiasp(ii) a The gate of the ninth N-channel FET forms a second bias voltage input terminal Vbiasn. Of course, the first bias voltage input terminal VbiaspAnd a second bias voltage input terminal VbiasnThe two are connected with the anode and the cathode of the bias voltage respectively.
Referring to FIG. 6, as a preferred embodiment, the common modeThe feedback circuit comprises a seventh P-channel field effect transistor MP7And an eighth P-channel field effect transistor MP8And a tenth N-channel field effect transistor MN10And an eleventh N-channel field effect transistor MN11And a twelfth N-channel field effect transistor MN12；
The seventh P-channel field effect transistor MP7And an eighth P-channel field effect transistor MP8The source electrodes are all connected with the positive electrode of the power supply; the seventh P-channel field effect transistor MP7And a tenth N-channel field effect transistor MN10Of said eighth P-channel field effect transistor MP8And an eleventh N-channel field effect transistor MN11Is connected to the drain of (1). The tenth N-channel field effect transistor MN10And a seventh P-channel field effect transistor MP7And an eighth P-channel field effect transistor MP8The gate of (1) is connected; the tenth N-channel field effect transistor MN10And an eleventh N-channel field effect transistor MN11And a twelfth N-channel field effect transistor MN11Is connected with the drain electrode of the transistor; the twelfth N-channel field effect transistor MN12The source of (2) is grounded; the twelfth N-channel field effect transistor MN12And a second bias voltage input terminal VbiasnConnecting; the tenth N-channel field effect transistor MN10The grid of the common-mode feedback circuit forms a common-mode level input end V of the common-mode feedback circuitcmSaid eleventh N-channel field effect transistor MN11The grid of the common mode feedback circuit forms a reference voltage input end of the common mode feedback circuit, and the reference voltage input end is connected with a reference voltage VrefFor coupling with a common-mode level input VcmComparing; the eleventh N-channel field effect transistor MN11The drain electrode of the common mode feedback circuit forms a feedback output end V of the common mode feedback circuitcmfbI.e. the common mode feedback voltage node. Wherein, the common mode level input end VcmConnected to a third dummy resistor Rb3And a fourth dummy resistor Rb4The connection point of (a). The feedback output end VcmfbConnected to a third P-channel field effect transistor MP3And a fourth P-channel field effect transistor MP4A gate electrode of (1).
Wherein the third P-channel field effect transistor MP3Substrate of, fourth P-channel field effect transistor MP4Substrate of, fifth P-channel field effect transistor MP5Substrate of, sixth P-channel field effect transistor MP6Substrate of, seventh P-channel field effect transistor MP7Substrate of, eighth P-channel field effect transistor MP8The substrates are connected with the anode of a power supply;
seventh N-channel field effect transistor MN7Substrate of (1), eighth N-channel field effect transistor MN8And a ninth N-channel field effect transistor MN9Substrate of, a tenth N-channel field effect transistor MN10Substrate of (1), eleventh N-channel field effect transistor MN11And a twelfth N-channel field effect transistor MN12Are all grounded.
As a preferred embodiment, the first dummy resistance Rb1A second dummy resistor Rb2A third dummy resistor Rb3And a fourth dummy resistor Rb4The structure is the same.
Referring to FIG. 7, a first dummy resistor R is usedb1By way of example, the first dummy resistor Rb1Including a thirteenth N-channel field effect transistor MN13And a fourteenth N-channel field effect transistor MN14(ii) a The thirteenth N-channel field effect transistor MN13Gate and drain of (1) and a fourteenth N-channel field effect transistor MN14Are connected together, said thirteenth N-channel field effect transistor MN13The source electrode of (1) constitutes a first dummy resistor Rb1The fourteenth N-channel field effect transistor MN, and a first terminal P314The source electrode of (1) constitutes a first dummy resistor Rb1And a second end P4. The thirteenth N-channel field effect transistor MN13And a fourteenth N-channel field effect transistor MN14Are all grounded.
The invention improves the noise-performance of the whole multi-channel amplifier at the system level. Specifically, on the premise of not influencing the noise performance, the total power consumption of the system is reduced by multiplexing the current of the multi-channel amplifier, so that the noise-power consumption performance is improved. For example, for the four-channel stacked amplifier structure in the embodiment, the bias current of the main operational amplifier is shared, and for the single operational amplifier, the consumed effective bias current is 1/4, but the noise performance is not reduced. Therefore, the invention can effectively improve the noise-power consumption performance.
As a preferred embodiment, the number of amplifier units is 4.
The embodiment discloses a chip which comprises the multi-channel current multiplexing chopper amplifier.
While the preferred embodiments of the present invention have been illustrated and described, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (9)
1. A multi-channel current-multiplexed chopper amplifier, comprising: an amplifier unit including a plurality of channels;
the amplifier unit includes:
the differential input end is used for connecting the differential voltage signal into the chopper amplifier;
a first chopping switch for modulating a differential voltage signal input from the differential input terminal to a chopping frequency;
the input stage amplifying circuit is used for amplifying an input signal and comprises a first P-channel field effect transistor, a second P-channel field effect transistor, a first N-channel field effect transistor and a second N-channel field effect transistor, wherein the source electrode of the first P-channel field effect transistor and the source electrode of the second P-channel field effect transistor are connected to a first connecting point; the source electrode of the first N-channel field effect transistor and the source electrode of the second N-channel field effect transistor are connected to a second connection point; the grid electrode of the first P-channel field effect transistor is connected with the grid electrode of the first N-channel field effect transistor; the drain electrode of the first P-channel field effect transistor is connected with the drain electrode of the first N-channel field effect transistor; the grid electrode of the second P-channel field effect transistor is connected with the grid electrode of the second N-channel field effect transistor; the drain electrode of the second P-channel field effect transistor is connected with the drain electrode of the second N-channel field effect transistor;
the second chopping switch is used for demodulating the signal output by the input stage amplifying circuit;
the output stage amplifying circuit is used for amplifying the differential voltage signal demodulated by the second chopping switch;
a feedback loop including a feedback chopping switch and a feedback capacitor;
the feedback chopping switch is used for modulating an output signal of the output stage amplifying circuit to a chopping frequency and is connected to the input end of the input stage amplifying circuit through the feedback capacitor to form negative feedback;
an input capacitor is arranged between the first chopping switch and the input stage amplifying circuit; an isolation capacitor is arranged between the input-stage amplifying circuit and the second chopping switch, and the input end of the output-stage amplifying circuit is provided with a bias resistor;
the first connection point of the amplifier unit of the first channel is connected to the anode of the input power supply, the second connection point of the amplifier unit of the first channel is connected to the first connection point of the amplifier unit of the second channel, the second connection point of the amplifier unit of the second channel is connected to the first connection point of the amplifier unit of the third channel, and so on, the second connection point of the amplifier unit of the last channel is connected to the tail current source.
2. The multi-channel current-multiplexing chopper amplifier of claim 1, wherein: the input stage amplifying circuit further comprises a first dummy resistor and a second dummy resistor;
the first end of the first pseudo resistor is connected with the grid electrode of the first P-channel field effect transistor and the grid electrode of the first N-channel field effect transistor and forms a positive phase input end of the input stage amplifying circuit; the second end of the first pseudo resistor is connected with the drain electrode of the first P-channel field effect transistor and the drain electrode of the first N-channel field effect transistor and forms an inverted output end of the input stage amplifying circuit;
the first end of the second pseudo resistor is connected with the grid electrode of the second P-channel field effect transistor and the grid electrode of the second N-channel field effect transistor and forms the inverting input end of the input stage amplifying circuit; and the second end of the second pseudo resistor is connected with the drain electrode of the second P-channel field effect transistor and the drain electrode of the second N-channel field effect transistor and forms a positive phase output end of the input stage amplifying circuit.
3. The multi-channel current-multiplexing chopper amplifier of claim 1, wherein: the first chopping switch, the second chopping switch and the feedback chopping switch have the same structure;
the first chopping switch comprises a third N-channel field effect transistor, a fourth N-channel field effect transistor, a fifth N-channel field effect transistor and a sixth N-channel field effect transistor;
the drain electrode of the third N-channel field effect transistor is connected with the source electrode of the fourth N-channel field effect transistor and forms a first input end of the first chopping switch; the source electrode of the third N-channel field effect transistor is connected with the source electrode of the sixth N-channel field effect transistor and forms a second output end of the first chopping switch;
the drain electrode of the fifth N-channel field effect transistor is connected with the drain electrode of the fourth N-channel field effect transistor and forms a first output end of the first chopping switch; the source electrode of the fifth N-channel field effect transistor is connected with the drain electrode of the sixth N-channel field effect transistor and forms a second input end of the first chopping switch;
the grid electrode of the fourth N-channel field effect transistor and the grid electrode of the sixth N-channel field effect transistor jointly form a positive-phase chopping signal input end of the first chopping switch; and the grid electrode of the third N-channel field effect transistor and the grid electrode of the fifth N-channel field effect transistor jointly form an inverted chopping signal input end of the first chopping switch.
4. The multi-channel current-multiplexing chopper amplifier of claim 2, wherein: the output stage amplifying circuit comprises a fully differential amplifying circuit and a common mode feedback circuit.
5. The multi-channel current-multiplexing chopper amplifier of claim 4, wherein: the fully differential amplifying circuit comprises a third P-channel field effect transistor, a fourth P-channel field effect transistor, a fifth P-channel field effect transistor, a sixth P-channel field effect transistor, a seventh N-channel field effect transistor, an eighth N-channel field effect transistor, a ninth N-channel field effect transistor, a third pseudo resistor and a fourth pseudo resistor;
the source electrode of the third P-channel field effect transistor, the source electrode of the fourth P-channel field effect transistor, the source electrode of the fifth P-channel field effect transistor and the source electrode of the sixth P-channel field effect transistor are connected to the positive electrode of the power supply, and the drain electrode of the third P-channel field effect transistor and the drain electrode of the fifth P-channel field effect transistor are connected with the drain electrode of the seventh N-channel field effect transistor; the drain electrode of the fourth P-channel field effect transistor and the drain electrode of the sixth P-channel field effect transistor are both connected with the drain electrode of the eighth N-channel field effect transistor; the source electrode of the seventh N-channel field effect transistor and the source electrode of the eighth N-channel field effect transistor are both connected with the drain electrode of the ninth N-channel field effect transistor, and the source electrode of the ninth N-channel field effect transistor is grounded; the third pseudo resistor and the fourth pseudo resistor are connected in series between the drain electrode of the seventh N-channel field effect transistor and the drain electrode of the eighth N-channel field effect transistor; the grid electrode of the third P-channel field effect transistor is connected with the grid electrode of the fourth P-channel field effect transistor;
the grid electrode of the seventh N-channel field effect transistor forms a positive phase input end of the output stage amplifying circuit; the grid electrode of the eighth N-channel field effect transistor forms an inverting input end of the output stage amplifying circuit; the drain electrode of the seventh N-channel field effect transistor forms an inverted output end of the output stage amplifying circuit; the drain electrode of the eighth N-channel field effect transistor forms a positive phase output end of the output stage amplifying circuit; the grid electrode of the fifth P-channel field effect transistor and the grid electrode of the sixth P-channel field effect transistor form a first bias voltage input end; the gate of the ninth N-channel field effect transistor constitutes a second bias voltage input terminal.
6. The multi-channel current-multiplexing chopper amplifier of claim 5, wherein: the common mode feedback circuit comprises a seventh P-channel field effect transistor, an eighth P-channel field effect transistor, a tenth N-channel field effect transistor, an eleventh N-channel field effect transistor and a twelfth N-channel field effect transistor;
the source electrode of the seventh P-channel field effect transistor and the source electrode of the eighth P-channel field effect transistor are both connected to the positive electrode of the power supply; the drain electrode of the seventh P-channel field effect transistor is connected with the drain electrode of the tenth N-channel field effect transistor, and the drain electrode of the eighth P-channel field effect transistor is connected with the drain electrode of the eleventh N-channel field effect transistor; the drain electrode of the tenth N-channel field effect transistor is also connected with the grid electrode of the seventh P-channel field effect transistor and the grid electrode of the eighth P-channel field effect transistor respectively; the source electrode of the tenth N-channel field effect transistor and the source electrode of the eleventh N-channel field effect transistor are both connected with the drain electrode of the twelfth N-channel field effect transistor; a source electrode of the twelfth N-channel field effect transistor is grounded; the grid electrode of the twelfth N-channel field effect transistor is connected with the second bias voltage input end; a grid electrode of the tenth N-channel field effect transistor forms a common-mode level input end of the common-mode feedback circuit, and a grid electrode of the eleventh N-channel field effect transistor forms a reference voltage input end of the common-mode feedback circuit; and the drain electrode of the eleventh N-channel field effect transistor forms a feedback output end of the common-mode feedback circuit.
7. The multi-channel current-multiplexing chopper amplifier of claim 5, wherein: the first pseudo resistor, the second pseudo resistor, the third pseudo resistor and the fourth pseudo resistor are identical in structure, and the first pseudo resistor comprises a thirteenth N-channel field effect transistor and a fourteenth N-channel field effect transistor; the grid electrode and the drain electrode of the thirteenth N-channel field effect transistor and the grid electrode and the drain electrode of the fourteenth N-channel field effect transistor are connected together, the source electrode of the thirteenth N-channel field effect transistor forms a first end of the first pseudo resistor, and the source electrode of the fourteenth N-channel field effect transistor forms a second end of the first pseudo resistor.
8. The multi-channel current-multiplexing chopper amplifier of claim 1, wherein: the number of the amplifier units is 4.
9. A chip, characterized by: comprising a multi-channel current-multiplexing chopper amplifier as claimed in any one of claims 1-8.
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| CN112690799A (en) * | 2020-12-25 | 2021-04-23 | 南京邮电大学 | Low-power consumption chopper amplifier circuit |
| CN115118237A (en) * | 2021-03-23 | 2022-09-27 | 圣邦微电子（北京）股份有限公司 | Fully differential operational amplifier and fully differential operational amplifier circuit |
| CN113827249B (en) * | 2021-09-28 | 2022-03-01 | 之江实验室 | Method for eliminating multichannel gain error of electroencephalogram signal acquisition system |
| CN114430253B (en) * | 2022-01-27 | 2023-04-14 | 深圳市九天睿芯科技有限公司 | Signal amplification circuit |
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