CN109461697A - The manufacturing method of lithographic method and semiconductor devices - Google Patents
The manufacturing method of lithographic method and semiconductor devices Download PDFInfo
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- CN109461697A CN109461697A CN201811332602.1A CN201811332602A CN109461697A CN 109461697 A CN109461697 A CN 109461697A CN 201811332602 A CN201811332602 A CN 201811332602A CN 109461697 A CN109461697 A CN 109461697A
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- 238000000034 method Methods 0.000 title claims abstract description 80
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 43
- 239000004065 semiconductor Substances 0.000 title claims abstract description 29
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 100
- 239000000758 substrate Substances 0.000 claims abstract description 78
- 238000001035 drying Methods 0.000 claims abstract description 47
- 238000001039 wet etching Methods 0.000 claims abstract description 47
- 238000005530 etching Methods 0.000 claims description 42
- 238000002955 isolation Methods 0.000 claims description 34
- 238000001312 dry etching Methods 0.000 claims description 29
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 15
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 claims description 14
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 claims description 8
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 8
- 239000003795 chemical substances by application Substances 0.000 claims description 7
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 6
- 238000003486 chemical etching Methods 0.000 claims description 5
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 4
- 229910000147 aluminium phosphate Inorganic materials 0.000 claims description 4
- 238000004380 ashing Methods 0.000 claims description 4
- 238000000889 atomisation Methods 0.000 claims description 4
- 239000011259 mixed solution Substances 0.000 claims description 4
- 238000010276 construction Methods 0.000 claims description 2
- 230000008569 process Effects 0.000 abstract description 13
- 150000002500 ions Chemical class 0.000 description 9
- 230000003628 erosive effect Effects 0.000 description 6
- 239000000243 solution Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000001771 impaired effect Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 2
- 239000002253 acid Substances 0.000 description 2
- 230000009471 action Effects 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910052731 fluorine Inorganic materials 0.000 description 2
- 239000011737 fluorine Substances 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 125000004435 hydrogen atom Chemical class [H]* 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- UGFAIRIUMAVXCW-UHFFFAOYSA-N Carbon monoxide Chemical compound [O+]#[C-] UGFAIRIUMAVXCW-UHFFFAOYSA-N 0.000 description 1
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 229910002091 carbon monoxide Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 229910001882 dioxygen Inorganic materials 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 230000005596 ionic collisions Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 125000004430 oxygen atom Chemical group O* 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000005086 pumping Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000004408 titanium dioxide Substances 0.000 description 1
- 239000003039 volatile agent Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Semiconductor Memories (AREA)
- Drying Of Semiconductors (AREA)
- Weting (AREA)
Abstract
The present invention provides the manufacturing method of a kind of lithographic method and semiconductor devices, the lithographic method includes: to provide a substrate with patterned photoresist layer；Using the patterned photoresist layer as mask, wet etching is carried out to the substrate；The substrate after the wet etching is dried, drying temperature is 25 DEG C~35 DEG C；Using the patterned photoresist layer as mask, subsequent technique is carried out to the substrate after drying；And the removal patterned photoresist layer.Technical solution of the present invention is at low temperature dried the substrate after wet etching, so that the patterned photoresist layer after dry can continue to use in the subsequent process, and then shortens the production cycle, reduces production cost.
Description
Technical field
The present invention relates to IC manufacturing field, in particular to the manufacturer of a kind of lithographic method and semiconductor devices
Method.
Background technique
In the production technology of semiconductor devices, as the size of semiconductor devices is smaller and smaller and specification requirements is got over
Come higher, there is specific requirement in when part-structure in semiconductor devices etching to pattern, but to etch this specific
Pattern, wet etching or dry etching, which is used alone, all cannot achieve, and need using the isotropism of wet etching (refering to figure
1a) (refering to fig. 1 b), two kinds of lithographic methods, which are combined, can just meet the requirements with the anisotropy of dry etching.Specific steps
It is as follows:
1, patterned photoresist layer is first formed on device, and wet etching is carried out to region to be etched；
2, isopropanol atomization drying (IPA is dry) then, is carried out to the device after wet etching, and is removed patterned
Photoresist layer；
3, finally, forming patterned photoresist layer on device again, dry etching is carried out to region to be etched, is carved
Erosion removes patterned photoresist layer after completing.
In above step, when carrying out IPA drying to the device after wet etching, drying temperature is 75 DEG C~85
DEG C, patterned photoresist layer will receive damage under the action of high temperature, and then have an impact to subsequent etching technics.Such as
It is a substrate 10 to be etched shown in Fig. 2 a refering to the etching process of device shown in Fig. 2 a~2d, substrate 10 includes outer
Area 11 and memory block 12 are enclosed, includes multiple fleet plough groove isolation structures 13, fleet plough groove isolation structure in external zones 11 and memory block 12
Grid oxide layer 14 and polycrystalline silicon gate layer 15, the top table of fleet plough groove isolation structure 13 are formed on the top surface of substrate 10 between 13
Face is flushed with the top surface of polycrystalline silicon gate layer 15, and patterned photoresist layer 16 covers the top of external zones 11；First to lining
Bottom 10 carries out wet etching, can be seen that from Fig. 2 b, is mask with patterned photoresist layer 16, to the shallow ridges on memory block 12
Recess isolating structure 13 carries out wet etching, the fleet plough groove isolation structure 13 of segment thickness is removed, so that shallow on memory block 12
The top surface of groove isolation construction 13 is lower than the top surface of polycrystalline silicon gate layer 15, and is higher than the top surface of grid oxide layer 14；Then,
IPA drying is carried out to the substrate 10 after wet etching, can be seen that from Fig. 2 c, the patterned photoresist layer 16 after drying
Fringe region it is impaired so that the fleet plough groove isolation structure 13 on part external zones 11 is sudden and violent with the top surface of polycrystalline silicon gate layer 15
Expose, if continuing to use the dry etch process that impaired patterned photoresist layer 16 carries out next step to memory block 12,
The case where will appear as shown in fig. 2d, the fleet plough groove isolation structure 13 on normal memory block 12 are etched away part thickness
Other than degree, the fleet plough groove isolation structure 13 that the photoresist layer 16 that the top surface on external zones 11 is not patterned covers is also dry
Method is etched away segment thickness during etching, so that the structural damage of device, causes the performance of device impacted.So
Before carrying out dry etching to memory block 12, the photoresist layer 16 for needing first to will be patterned into is removed, then re-forms one layer of figure
The photoresist layer 16 of case, external zones 11 is completely covered, and completes the patterning that will newly be formed again after dry etching
Photoresist layer 16 remove, thus need to form patterned photoresist layer 16 and 22 times and remove patterned photoresist layer
16, production cost is higher, and the production cycle is longer.Therefore, how to make patterned photoresist layer after wet etching can be
It is continued to use in subsequent technique, to shorten the production cycle and reduce the problem of production cost is current urgent need to resolve.
Summary of the invention
The purpose of the present invention is to provide the manufacturing method of a kind of lithographic method and semiconductor devices so that wet etching it
Patterned photoresist layer afterwards can continue to use in the subsequent process, to shorten the production cycle and reduce production cost.
To achieve the above object, the present invention provides a kind of lithographic methods, comprising:
S1 provides a substrate with patterned photoresist layer；
S2 carries out wet etching to the substrate using the patterned photoresist layer as mask；
The substrate after the wet etching is dried in S3, and drying temperature is 25 DEG C~35 DEG C；
S4 carries out subsequent technique to the substrate after drying using the patterned photoresist layer as mask；And
S5 removes the patterned photoresist layer.
Optionally, the method substrate being dried includes isopropanol atomization drying.
Optionally, directly the substrate is dried on the board of the wet etching, the drying temperature setting
On the board of the wet etching.
Optionally, the subsequent technique includes dry etching or ion implanting.
Optionally, circulation executes step S2 to S4, until the etching result of the substrate reaches preset requirement.
Optionally, the step of removing the patterned photoresist layer includes: first progress plasma ashing processing, then is used
The mixed solution of sulfuric acid and hydrogen peroxide impregnates.
Optionally, the patterned photoresist layer includes positive photoresist or negative photoresist.
The present invention also provides a kind of manufacturing methods of semiconductor devices, comprising: uses the etching provided by the invention
Method performs etching a substrate, to make the semiconductor devices.
Optionally, the subsequent technique in the lithographic method includes dry etching or ion implanting.
Optionally, the substrate has external zones and a memory block, in the substrate of the external zones and the memory block respectively
Equipped with multiple fleet plough groove isolation structures, it is formed on the top surface of the substrate between the adjacent fleet plough groove isolation structure
Grid oxide layer and polycrystalline silicon gate layer, the top surface of the fleet plough groove isolation structure and the top surface of the polycrystalline silicon gate layer are neat
It is flat；Successively using in the lithographic method wet etching and dry etching to the shallow trench isolation in the memory block
Structure is etched back, so that the top surface of each fleet plough groove isolation structure in the memory block and the grid oxide layer
Bottom surface flush.
Optionally, etching agent used by the wet etching includes hydrofluoric acid or phosphoric acid.
Optionally, the dry etching includes physical etchings, chemical etching or physical chemistry etching.
Compared with prior art, technical solution of the present invention has the advantages that
1, lithographic method of the invention, by the way that the substrate after wet etching is dried at low temperature, so that after dry
Patterned photoresist layer can continue to use in the subsequent process, be not required to remove and remake the patterned photoresist
Layer, and then shorten the production cycle, reduce production cost.
2, the manufacturing method of semiconductor devices of the invention, by using the lithographic method of the invention to a substrate into
Row etching, so that the wet etching and patterned photoresist layer after drying can continue in the technique for manufacturing the semiconductor devices
Middle use, and then shorten the production cycle, reduce production cost.
Detailed description of the invention
Fig. 1 a~1b is the direction schematic diagram of wet etching and dry etching；
Fig. 2 a~2d is the device schematic diagram that the existing photoresist layer using a pattern layers performs etching；
Fig. 3 is the flow chart of the lithographic method of one embodiment of the invention；
Fig. 4 a~4d is the device schematic diagram in the manufacturing method of the semiconductor devices of one embodiment of the invention.
Wherein, the reference numerals are as follows by attached drawing 1a~4d:
10,20- substrate；11,21- external zones；12, the memory block 22-；13,23- fleet plough groove isolation structure；14,24- grid oxygen
Layer；15,25- polycrystalline silicon gate layer；16, the patterned photoresist layer of 26-.
Specific embodiment
To keep the purpose of the present invention, advantages and features clearer, below in conjunction with 3~4d of attached drawing to quarter proposed by the present invention
The manufacturing method of etching method and semiconductor devices is described in further detail.It should be noted that attached drawing is all made of very simplification
Form and use non-accurate ratio, only for the purpose of facilitating and clarifying the purpose of the embodiments of the invention.
One embodiment of the invention provides a kind of lithographic method, is the lithographic method of one embodiment of the invention refering to Fig. 3, Fig. 3
Flow chart, the lithographic method includes:
Step S1, a substrate with patterned photoresist layer is provided；
Step S2, using the patterned photoresist layer as mask, wet etching is carried out to the substrate；
Step S3, the substrate after the wet etching is dried, drying temperature is 25 DEG C~35 DEG C；
Step S4, using the patterned photoresist layer as mask, subsequent technique is carried out to the substrate after drying；
Step S5, the patterned photoresist layer is removed.
In greater detail below introduce lithographic method provided in this embodiment:
Firstly, providing a substrate with patterned photoresist layer according to step S1.The material of the substrate can wrap
Include silicon, germanium, SiGe, silicon carbide etc..The patterned photoresist layer can be by being lithographically formed, specifically, can be first in institute
It states and forms a layer photoresist on substrate, the photoresist can be positive photoresist or negative photoresist；Then, through a mask
Ultraviolet light irradiation is carried out to the photoresist, pre-designed circuit pattern is printed on the mask, if the photoresist is
Positive photoresist, the photoresist being irradiated to by ultraviolet light react and are dissolved, the photoresist quilt dissolved
After removing, the pattern of the photoresist stayed is consistent with the pattern on the mask, that is, obtains the patterned light
Photoresist layer.If the photoresist is negative photoresist, the photoresist being irradiated to by ultraviolet light will not be dissolved, and be dissolved
The photoresist removed after, the pattern on the pattern of the photoresist stayed and the mask is on the contrary, i.e. acquisition
The patterned photoresist layer.
Then, according to step S2, using the patterned photoresist layer as mask, wet etching is carried out to the substrate.
Specifically, the substrate can be immersed in etching agent, the substrate portion not covered by the patterned photoresist layer
Divide and chemical reaction occurs with the etching agent and is removed.The wet etching has isotropism, the i.e. width of lateral etching
Close to the depth of vertical etch.Width and the depth of the substrate etched away be can according to need to adjust the wet process and carve
The parameters such as the concentration of time of erosion and etching agent.Suitable etching agent, such as hydrogen fluorine can be selected according to the material of the substrate
Acid or phosphoric acid.
Then, according to step S3, the substrate after the wet etching is dried, drying temperature is 25 DEG C~35
DEG C (for example, 28 DEG C, 30 DEG C, 33 DEG C etc.).It include that (IPA is dry for isopropanol atomization drying to the method that the substrate is dried
It is dry), directly the substrate can be dried on the board of the wet etching, the drying temperature is set in described wet
On the board of method etching.Specifically, one or more drying boxes are provided on the board of the wet etching, the substrate is put
Enter in drying box, sets the temperature in drying box；Then, it is passed through isopropanol into drying box, utilizes the low surface of isopropanol
Power and volatile characteristic displace the moisture with high surface tension of the substrate surface；Then, drying box is carried out
Pumping, takes vapor and isopropanol out of drying box；Finally, nitrogen is passed through into drying box, the surface of the substrate is complete
White drying.Since drying temperature is set in 25 DEG C~35 DEG C (for example, 28 DEG C, 30 DEG C, 33 DEG C etc.), drying temperature is low, in drying
It is impaired not will cause the patterned photoresist layer in the process, allows the patterned photoresist layer in subsequent technique
In continue to use, be not required to remake again after the patterned photoresist layer removal, and then shorten the production cycle, drop
Low production cost.
Then, according to step S4, using the patterned photoresist layer as mask, after being carried out to the substrate after drying
Continuous technique.The subsequent technique may include dry etching or ion implanting, wherein if being with the patterned photoresist layer
Mask carries out dry etching to the substrate after drying, since the dry etching has anisotropy, i.e., substantially only has
Vertical etch, and almost without lateral undercutting, and then can guarantee to copy over the substrate and the patterned photoetching
The completely the same pattern of glue-line, then, it, can in conjunction with the isotropism of the wet etching and the anisotropy of the dry etching
To etch the structure with specific pattern over the substrate；In addition, if using the patterned photoresist layer as mask, it is right
The substrate after drying carries out ion implanting, can make graded transition junction etc. in the substrate.
Finally, removing the patterned photoresist layer according to step S5.Preferably, the patterned photoetching is removed
The step of glue-line, is included: first progress plasma ashing processing, then is impregnated using the mixed solution of sulfuric acid and hydrogen peroxide.Wherein, etc.
Ion ashing processing is that oxygen atom and photoresist react in the environment of plasma, generates carbon monoxide, titanium dioxide
Then carbon and vapor etc. are taken the substance of generation with pumped vacuum systems away, to remove most photoresist；Sulfuric acid and dioxygen
The mixed solution of water is that other residuals generated during removing complete photoresist and removal photoresist impregnate
Removal removes the patterned photoresist layer complete.
It, can be according to each etching executed after step S4 to the substrate in addition, in other embodiments of the invention
Effect executes step S2 to S4 to recycle, until the etching result of the substrate reaches preset requirement.
By first wet etching, dry etching is again to obtain the technique of the substrate of specific pattern for needing, existing
In technology, due to the drying temperature height used after wet etching to the substrate, cause the patterned photoresist layer impaired,
So photoresist is needed to form photoresist twice and remove twice, and technical solution of the present invention uses low drying temperature to institute
Substrate is stated to be dried, although the drying time under low temperature increases 2 minutes compared to the drying time under high temperature, the figure
The photoresist layer of case is not damaged during low temperature drying, can continue to use in dry etch process, and then only need
Primary to form photoresist and primary removal photoresist, so that the production cycle shortens at least 8 hours, the time of shortening substantially exceeds
Increased drying time so technical solution of the present invention substantially reduces the production cycle reduces production cost.
In conclusion lithographic method provided by the invention, comprising: provide a substrate with patterned photoresist layer；
Using the patterned photoresist layer as mask, wet etching is carried out to the substrate；To the lining after the wet etching
Bottom is dried, and drying temperature is 25 DEG C~35 DEG C；Using the patterned photoresist layer as mask, to the lining after drying
Bottom carries out subsequent technique；And the removal patterned photoresist layer.Technical solution of the present invention at low temperature carves wet process
Substrate after erosion is dried, so that the patterned photoresist layer after dry can continue to use in the subsequent process, is not required to
It removes and remakes patterned photoresist layer, and then shorten the production cycle, reduce production cost.
One embodiment of the invention provides a kind of manufacturing method of semiconductor devices, using described in above-mentioned steps S1~step S5
Lithographic method one substrate is performed etching, to make the semiconductor devices.Subsequent technique in the lithographic method can
To include dry etching or ion implanting.When the subsequent technique in the lithographic method is dry etching, can successively adopt
The semiconductor devices is made with the wet etching and dry etching, the semiconductor devices can be memory, such as join
Fig. 4 a~4d is read, Fig. 4 a~4d is the device schematic diagram in the manufacturing method of the semiconductor devices of one embodiment of the invention.Specifically
It is described as follows:
It refering to Fig. 4 a, can be seen that from Fig. 4 a, the substrate 20 has external zones 21 and memory block 22, the external zones 21
With multiple fleet plough groove isolation structures 23, the adjacent fleet plough groove isolation structure are respectively equipped in the substrate 20 of the memory block 22
Grid oxide layer 24 and polycrystalline silicon gate layer 25, the fleet plough groove isolation structure are formed on the top surface of the substrate 20 between 23
23 top surface is flushed with the top surface of the polycrystalline silicon gate layer 25.Patterned photoresist layer 26 will be located at the external zones
In fleet plough groove isolation structure 23 and polycrystalline silicon gate layer 25 on 21 be completely buried in, and by the shallow trench on the memory block 22
The top surface of isolation structure 23 and polycrystalline silicon gate layer 25 is exposed.Successively using the wet etching in the lithographic method
The fleet plough groove isolation structure 23 in the memory block 22 is etched back with dry etching, so that the memory block 22
In the top surface of each fleet plough groove isolation structure 23 flushed with the bottom surface of the grid oxide layer 24.Specific process step is such as
Under:
Firstly, being mask with the patterned photoresist layer 26, to the shallow trench in the memory block 22 refering to Fig. 4 b
Isolation structure 23 carries out wet etching can be seen that from Fig. 4 b with removing the fleet plough groove isolation structure 23 of segment thickness, wet
After method etching, the top surface of the fleet plough groove isolation structure 23 in the memory block 22 is lower than the top of the polycrystalline silicon gate layer 25
Surface, and it is higher than the bottom surface of the polycrystalline silicon gate layer 25, etching agent used by the wet etching may include hydrogen fluorine
Acid or phosphoric acid.
Then, refering to Fig. 4 b, the substrate 20 after the wet etching is dried, drying temperature is 25 DEG C~35
DEG C (for example, 28 DEG C, 30 DEG C, 33 DEG C etc.), since drying temperature is low, after dry, the patterned photoresist layer 26 not by
To damage, it can continue to use in the subsequent process, and then shorten the production cycle, reduce production cost.
It then, is mask with the patterned photoresist layer 26, in the memory block 22 after drying refering to Fig. 4 c
Fleet plough groove isolation structure 23 carry out dry etching, to remove the fleet plough groove isolation structure 23 of segment thickness, from Fig. 4 c
It can be seen that, after dry etching, the top surface and the grid of each fleet plough groove isolation structure 23 in the memory block 22
The bottom surface of oxygen layer 24 flushes, meanwhile, because dry etching has anisotropy, so that the structure of the grid oxide layer 24 is not affected by
The influence of dry etch process.The dry etching includes physical etchings, chemical etching or physical chemistry etching.The physics is carved
Erosion be etched using ion collision structure surface generate splash effect and realize etching；The chemical etching is by swashing
The chemical action of etching gas living and the structure that is etched generates volatile compound and realizes etching；The physical chemistry is carved
Erosion is that by ion or active group in plasma and the physics between the structure that is etched and chemistry interaction is realized
Etching.The anisotropic effect of the physical chemistry etching and the physical etchings is better than the chemical etching, can basis
The method of the suitably described dry etching of the structure choice of required etching.For example, using the method for physical chemistry etching described
Groove needed for forming fleet plough groove isolation structure is etched in substrate.
Finally, removing the patterned photoresist layer 26 refering to Fig. 4 d.
Alternatively, it is also possible to using the wet etching and dry etching in lithographic method described in above-mentioned steps S1~step S5
The method combined, during forming fleet plough groove isolation structure, etching removal be located at substrate on silicon nitride mask and
Pad oxide.
In addition, when the subsequent technique in the lithographic method is ion implanting, it can be according to above-mentioned steps S1~step
Rapid S5 carries out the substrate after carrying out wet etching as mask using the patterned photoresist layer to the substrate
Low temperature drying, is further continued for using the patterned photoresist layer as mask, the ion implanting is carried out to the substrate, in institute
It states and manufactures graded transition junction in substrate, and then obtain the semiconductor devices with high operation voltage.
In conclusion the manufacturing method of semiconductor devices provided by the invention, comprising: use the quarter provided by the invention
Etching method performs etching a substrate, to make the semiconductor devices.Technical solution of the present invention at low temperature carves wet process
Substrate after erosion is dried, so that the patterned photoresist layer after dry can continue in the work for manufacturing the semiconductor devices
It is used in skill, and then shortens the production cycle, reduces production cost.
Foregoing description is only the description to present pre-ferred embodiments, not to any restriction of the scope of the invention, this hair
Any change, the modification that the those of ordinary skill in bright field does according to the disclosure above content, belong to the protection of claims
Range.
Claims (12)
1. a kind of lithographic method characterized by comprising
S1 provides a substrate with patterned photoresist layer；
S2 carries out wet etching to the substrate using the patterned photoresist layer as mask；
The substrate after the wet etching is dried in S3, and drying temperature is 25 DEG C~35 DEG C；
S4 carries out subsequent technique to the substrate after drying using the patterned photoresist layer as mask；And
S5 removes the patterned photoresist layer.
2. lithographic method as described in claim 1, which is characterized in that the method that the substrate is dried includes isopropanol
Atomization drying.
3. lithographic method as described in claim 1, which is characterized in that directly to the lining on the board of the wet etching
Bottom is dried, and the drying temperature is set on the board of the wet etching.
4. lithographic method as described in claim 1, which is characterized in that the subsequent technique includes dry etching or ion note
Enter.
5. lithographic method according to any one of claims 1 to 4, which is characterized in that circulation executes step S2 to S4, until
The etching result of the substrate reaches preset requirement.
6. lithographic method as described in claim 1, which is characterized in that the step of removing the patterned photoresist layer is wrapped
It includes: first carrying out plasma ashing processing, then impregnated using the mixed solution of sulfuric acid and hydrogen peroxide.
7. lithographic method as described in claim 1, which is characterized in that the patterned photoresist layer includes positive photoresist
Or negative photoresist.
8. a kind of manufacturing method of semiconductor devices characterized by comprising using described in any one of claims 1 to 7
Lithographic method performs etching a substrate, to make the semiconductor devices.
9. the manufacturing method of semiconductor devices as claimed in claim 8, which is characterized in that subsequent in the lithographic method
Technique includes dry etching or ion implanting.
10. the manufacturing method of semiconductor devices as claimed in claim 9, which is characterized in that the substrate have external zones and
Multiple fleet plough groove isolation structures are respectively equipped in the substrate of memory block, the external zones and the memory block, adjacent is described shallow
Grid oxide layer and polycrystalline silicon gate layer, the shallow trench isolation are formed on the top surface of the substrate between groove isolation construction
The top surface of structure is flushed with the top surface of the polycrystalline silicon gate layer；Successively using the wet etching in the lithographic method
The fleet plough groove isolation structure in the memory block is etched back with dry etching, so that each in the memory block
The top surface of a fleet plough groove isolation structure is flushed with the bottom surface of the grid oxide layer.
11. the manufacturing method of semiconductor devices as claimed in claim 10, which is characterized in that used by the wet etching
Etching agent includes hydrofluoric acid or phosphoric acid.
12. the manufacturing method of semiconductor devices as claimed in claim 10, which is characterized in that the dry etching includes physics
Etching, chemical etching or physical chemistry etching.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112701043A (en) * | 2020-12-28 | 2021-04-23 | 广州粤芯半导体技术有限公司 | Method for manufacturing semiconductor device |
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|---|---|---|---|---|
| US6498106B1 (en) * | 2001-04-30 | 2002-12-24 | Taiwan Semiconductor Manufacturing Company | Prevention of defects formed in photoresist during wet etching |
| CN101191692A (en) * | 2006-11-28 | 2008-06-04 | 中芯国际集成电路制造(上海)有限公司 | Wafer drying method |
| CN103972075A (en) * | 2014-05-05 | 2014-08-06 | 京东方科技集团股份有限公司 | Etching method and array substrate |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6498106B1 (en) * | 2001-04-30 | 2002-12-24 | Taiwan Semiconductor Manufacturing Company | Prevention of defects formed in photoresist during wet etching |
| CN101191692A (en) * | 2006-11-28 | 2008-06-04 | 中芯国际集成电路制造(上海)有限公司 | Wafer drying method |
| CN103972075A (en) * | 2014-05-05 | 2014-08-06 | 京东方科技集团股份有限公司 | Etching method and array substrate |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112701043A (en) * | 2020-12-28 | 2021-04-23 | 广州粤芯半导体技术有限公司 | Method for manufacturing semiconductor device |
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Address after: 430205 No.18, Gaoxin 4th Road, Donghu Development Zone, Wuhan City, Hubei Province Patentee after: Wuhan Xinxin Integrated Circuit Co.,Ltd. Country or region after: China Address before: 430205 No.18, Gaoxin 4th Road, Donghu Development Zone, Wuhan City, Hubei Province Patentee before: Wuhan Xinxin Semiconductor Manufacturing Co.,Ltd. Country or region before: China |