CN109148591A - 一种集成肖特基二极管的碳化硅槽栅mos器件 - Google Patents

一种集成肖特基二极管的碳化硅槽栅mos器件 Download PDF

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CN109148591A
CN109148591A CN201811008629.5A CN201811008629A CN109148591A CN 109148591 A CN109148591 A CN 109148591A CN 201811008629 A CN201811008629 A CN 201811008629A CN 109148591 A CN109148591 A CN 109148591A
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drift region
silicon carbide
gate structure
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罗小蓉
张科
何清源
廖天
樊雕
方健
杨霏
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University of Electronic Science and Technology of China
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Abstract

本发明属于功率半导体技术领域，具体涉及一种集成肖特基二极管的碳化硅槽栅MOS器件。传统碳化硅MOS器件的体二极管由于导通压降大，且为双极器件，因而在反向恢复时的损耗较大。本发明在碳化硅槽栅MOS的槽栅之间集成了一个肖特基二极管，器件在反向恢复时，此肖特基二极管起续流的作用，从而使续流二极管的导通压降减小，反向恢复时间和反向恢复电荷比传统体二极管减小。器件在承受高压时，槽栅与N型漂移区之间和P型保护区与N型漂移区之间的耗尽作用可以保护肖特基接触不受高电场的影响，提高了器件的耐压和可靠性。

Description

一种集成肖特基二极管的碳化硅槽栅MOS器件
技术领域
本发明属于功率半导体器件技术领域，涉及一种集成肖特基二极管的碳化硅槽栅MOS器件。
背景技术
碳化硅材料由于具有禁带宽度大、电子饱和漂移速度高和热导率高等优点，在功率器件领域有很广阔的应用前景。碳化硅槽栅MOS相较于传统平面MOS器件，其导电沟道位于体内，沟道密度得到大幅提高，同时沟道由原来的横向变为垂直分布，单个元胞的面积减小，使得单位面积的电流密度大幅提高。目前，市面上已有多种成熟的碳化硅槽栅MOS产品，被广泛应用于逆变电路、斩波电路等拓扑中。
然而，由于碳化硅槽栅MOS器件的体二极管开启电压较高，导致反向恢复性能较差，在实际的应用中，常常给碳化硅器件反并联一个肖特基二极管用做续流二极管。但是，引入的肖特基二极管又会导致器件体积增大和寄生电容增大等负面效应，因此，在碳化硅MOS器件体内集成肖特基二极管已成为该领域重要的研究方向。
发明内容
为了降低续流二极管的导通压降，减小反向恢复电荷，本发明提出一种集成肖特基二极管的碳化硅槽栅MOS器件。通过在槽栅之间形成肖特基接触，并与源极接触接同一电位，从而提高器件的反向恢复能力。同时，栅极结构与N型漂移区之间的相互耗尽作用使得器件在承受高压时，肖特基接触的表面电场保持一个较低的值，从而提高器件的可靠性。
本发明技术方案如下：
一种集成肖特基二极管的碳化硅槽栅MOS器件，包括栅极结构、源极结构、N型衬底1、漂移区2和金属9；其中，漂移区2位于N型衬底1上表面，金属9位于漂移区2上层中部，在金属9两侧，具有呈对称设置的源极结构和栅极结构，栅极结构位于靠近金属9的一侧，源极结构位于漂移区2上层两侧；
所述源极结构包括P型阱区3以及位于P型阱区3上层，且并列设置的N型源区5和P型体接触区4，N型源区5与栅极结构接触，所述N型源区5和P型体接触区4共同引出端为源极；P型阱区3靠近栅极结构一侧形成沟道区；
所述栅极结构包括栅绝缘层6、位于栅绝缘层6内的栅电极7和位于栅绝缘层6底部的P+型保护区8，所述栅电极7引出端为栅极，P+型保护区8与源极电气连接；
所述N型衬底1底部引出漏极；
所述金属9与漂移区2在接触面处形成肖特基接触，在器件反向导通时用作续流二极管。
进一步的，金属9与N型漂移区2所形成的肖特基接触面位于栅绝缘层底部一侧，其深度与槽栅深度相同。
进一步的，金属9与N型漂移区2所形成的肖特基接触位于器件表面。
进一步的，金属9与N型漂移区2所形成的肖特基接触位于器件表面，且金属9与栅极结构之间有间距，P+型保护区8沿栅极结构侧面延伸至金属9侧面的垂直边沿。
本发明的有益效果为，相对于传统碳化硅槽栅MOS器件，本发明在碳化硅槽栅MOS器件中集成了一个肖特基二极管，并在器件反向导通时用作续流二极管，从而具有更低的反向导通压降和更少的反向恢复电荷。
附图说明
图1为实施例1的结构示意图；
图2为实施例2的结构示意图；
图3为实施例3的结构示意图。
具体实施方式
下面结合附图对本发明进行详细的描述
实施例1
如图1所示，本实例的碳化硅槽栅MOS器件，包括栅极结构、源极结构、N型衬底1、漂移区2和金属9。其中，漂移区2位于N型衬底1之上，源极结构和栅极结构位于漂移区2之上，金属9位于两个相邻的栅极结构之间。
所述源极结构包括P型阱区3以及位于P型阱区3上部的N型源区5和P型体接触区4，所述N型源区5和P型体接触区4共同引出端为源极；P型阱区3靠近栅绝缘层6一侧形成沟道区；
所述栅极结构位于源极结构和金属9之间，所述栅极结构包括栅绝缘层6、位于栅绝缘层6内的多晶硅或金属栅区7和位于栅绝缘层底部的P+型保护区8，所述栅区7引出端为栅极，P+型保护区8与源极接触接同一电位；
所述N型衬底1引出端为漏极；
金属9与漂移区2在接触面处形成肖特基接触，在器件反向导通时用作续流二极管，金属9与源极接触接同一电位。
本例的工作原理为：
器件在反向导通时，用作续流的是集成的肖特基二极管，而不是体二极管。由于肖特基二极管导通压降低且为单极器件，因此器件的反向导通压降较低，反向恢复电荷较少，从而可以实现更快的反向恢复速度和更小的反向恢复损耗。器件在承受高耐压时，P型保护区与N型漂移区之间的耗尽作用可以对肖特基接触起到保护作用，使肖特基接触的表面电场保持一个较低的值。
实施例2
如图2所示，与实施例1相比，本例中的肖特基接触位于器件表面，在器件承受高耐压时可以进一步减小肖特基接触的表面电场，获得更好的保护效果。
与实施例1相比，本例在工艺上更易实现。
实施例3
如图3所示，与实施例2相比，本例中槽栅的底部和靠近金属9的侧壁具有P+保护区，P+保护区与N型漂移区形成耗尽区，在进一步减小肖特基接触表面电场的同时，还可以减小器件的栅漏电容，提高器件的开关特性。

Claims (4)

1.一种集成肖特基二极管的碳化硅槽栅MOS器件，包括栅极结构、源极结构、N型衬底(1)、漂移区(2)和金属(9)；其中，漂移区(2)位于N型衬底(1)上表面，金属(9)位于漂移区(2)上层中部，在金属(9)两侧，具有呈对称设置的源极结构和栅极结构，栅极结构位于靠近金属(9)的一侧，源极结构位于漂移区(2)上层两侧；
所述源极结构包括P型阱区(3)以及位于P型阱区(3)上层，且并列设置的N型源区(5)和P型体接触区(4)，N型源区(5)与栅极结构接触，所述N型源区(5)和P型体接触区(4)共同引出端为源极；P型阱区(3)靠近栅极结构一侧形成沟道区；
所述栅极结构包括栅绝缘层(6)、位于栅绝缘层(6)内的栅电极(7)和位于栅绝缘层(6)底部的P+型保护区(8)，所述栅电极(7)引出端为栅极，P+型保护区(8)与源极电气连接；
所述N型衬底(1)底部引出漏极；
所述金属(9)与漂移区(2)在接触面处形成肖特基接触，在器件反向导通时用作续流二极管。
2.根据权利要求1所述的一种集成肖特基二极管的碳化硅槽栅MOS器件，其特征在于，金属(9)与N型漂移区(2)所形成的肖特基接触面位于栅绝缘层底部一侧，其深度与槽栅深度相同。
3.根据权利要求1所述的一种集成肖特基二极管的碳化硅槽栅MOS器件，其特征在于，金属(9)与N型漂移区(2)所形成的肖特基接触位于器件表面。
4.根据权利要求1所述的一种集成肖特基二极管的碳化硅槽栅MOS器件，其特征在于，金属(9)与N型漂移区(2)所形成的肖特基接触位于器件表面，且金属(9)与栅极结构之间有间距，P+型保护区(8)沿栅极结构侧面延伸至金属(9)侧面的垂直边沿。
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CN111223937A (zh) * 2020-01-17 2020-06-02 电子科技大学 一种具有集成续流二极管的GaN纵向场效应晶体管
CN113130627A (zh) * 2021-04-13 2021-07-16 电子科技大学 一种集成沟道二极管的碳化硅鳍状栅mosfet
WO2024113129A1 (zh) * 2022-11-29 2024-06-06 江苏能华微电子科技发展有限公司 一种集成式的肖特基器件及制备方法

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CN109742148B (zh) * 2019-01-16 2024-04-02 厦门芯光润泽科技有限公司 碳化硅umosfet器件及其制备方法
CN111223937A (zh) * 2020-01-17 2020-06-02 电子科技大学 一种具有集成续流二极管的GaN纵向场效应晶体管
CN111223937B (zh) * 2020-01-17 2021-04-23 电子科技大学 一种具有集成续流二极管的GaN纵向场效应晶体管
CN113130627A (zh) * 2021-04-13 2021-07-16 电子科技大学 一种集成沟道二极管的碳化硅鳍状栅mosfet
CN113130627B (zh) * 2021-04-13 2022-08-23 电子科技大学 一种集成沟道二极管的碳化硅鳍状栅mosfet
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