CN108155983B - Method and device for counteracting system disturbance introduced by power consumption fluctuation - Google Patents

Method and device for counteracting system disturbance introduced by power consumption fluctuation Download PDF

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CN108155983B
CN108155983B CN201611105183.9A CN201611105183A CN108155983B CN 108155983 B CN108155983 B CN 108155983B CN 201611105183 A CN201611105183 A CN 201611105183A CN 108155983 B CN108155983 B CN 108155983B
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CN108155983A (en
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吴浩
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ZTE Corp
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/04Speed or phase control by synchronisation signals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/14Network analysis or design
    • H04L41/145Network analysis or design involving simulating, designing, planning or modelling of a network
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00Arrangements for monitoring or testing data switching networks
    • H04L43/08Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters

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  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Environmental & Geological Engineering (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Testing Electric Properties And Detecting Electric Faults (AREA)

Abstract

The invention discloses a method and a device for counteracting system disturbance introduced by power consumption fluctuation, which relate to the related fields of IC design and application, such as communication manufacture, equipment manufacture, integrated circuit design and the like, and the method comprises the following steps: the power consumption of a tested subject needing to be improved in performance is detected to obtain the power consumption of the tested subject; according to the power consumption of the tested body, finding out a phase adjustment amount corresponding to the power consumption from a system load model; and compensating the clock phase of the measured main body by using the phase adjustment quantity. The embodiment of the invention counteracts the interference of the dynamic power consumption on the system through monitoring, detecting and feedback inhibition of the dynamic power consumption, thereby reducing the system disturbance and inhibiting the noise, further improving the design stability and improving the system performance.

Description

Method and device for counteracting system disturbance introduced by power consumption fluctuation
Technical Field
The invention relates to the fields related to IC design and application, such as communication manufacturing, equipment manufacturing, integrated circuit design and the like, in particular to a method and a device for counteracting system disturbance introduced by power consumption fluctuation.
Background
Along with the increasing scale of integrated circuits, the system integration level is higher and higher, the power consumption and heat consumption borne by the unit board area are also higher and higher, and besides the problems of heat dissipation, through-current and the like, the influence of the power supply load change on the system is gradually highlighted.
Taking the Radio frequency index Error Vector Magnitude (EVM) performance of a Remote Radio Unit, an RRU and an RRU in a communication system as an example, an Error Vector (including a Vector of Magnitude and phase) is a Vector difference between an ideal Error-free reference signal and an actually transmitted signal at a given time, and the EVM can comprehensively measure the Magnitude Error and the phase Error of a modulated signal. The index directly affects key indexes such as throughput rate and channel quality of the system. The main ways to affect the EVM include modulation error generated by a modulator, quality of a radio frequency device, Phase Locked Loop (PLL) noise, Power Amplifier (PA) distortion effect, thermal noise, and the like.
However, the interference caused by power consumption fluctuation is rarely improved or reflected in the system because the fluctuation of the power supply and the actual load have a great relationship with other interference sources, the power supply is not easily stripped, and it is difficult to provide an effective solution to feed back to the system.
Disclosure of Invention
According to the method and the device for counteracting the system disturbance introduced by the power consumption fluctuation, provided by the embodiment of the invention, the problem of counteracting the system disturbance introduced by the power consumption fluctuation is solved.
The method for counteracting the system disturbance introduced by the power consumption fluctuation comprises the following steps:
the power consumption of a tested subject needing to be improved in performance is detected to obtain the power consumption of the tested subject;
according to the power consumption of the tested body, finding out a phase adjustment amount corresponding to the power consumption from a system load model;
and compensating the clock phase of the measured main body by using the phase adjustment quantity.
Preferably, the obtaining the power consumption of the measured subject by monitoring the power consumption of the measured subject needing to improve the performance includes:
and the power consumption of the tested main body is detected by monitoring the load of the tested main body.
Preferably, the system load model is established before counteracting the system disturbance introduced by the power consumption fluctuation, and the method comprises the following steps:
adjusting the power consumption or load of the tested body and the clock phase of the tested body to obtain a phase adjustment quantity corresponding to each fixed power consumption or load and enabling the performance index to be improved of the tested body to be optimal;
and establishing the system load model by using the power consumption or the load and the corresponding optimal performance index to be improved and the phase adjustment quantity.
Preferably, the obtaining of the phase adjustment amount corresponding to each fixed power consumption or load and capable of optimizing the performance index to be improved of the measured subject includes:
and continuously and equivalently adjusting the clock phase until the performance index to be improved of the tested main body is optimal under the condition that the tested main body is at a certain fixed power consumption or load, and recording the power consumption or load when the performance index to be improved is optimal, the performance index to be improved and the phase adjustment amount.
Preferably, the compensating the clock phase of the measured subject by using the phase adjustment amount includes:
and generating a corresponding compensation phase according to the phase adjustment amount found from the system load model, and compensating the clock phase of the measured main body by using the compensation phase.
According to an embodiment of the present invention, there is provided a storage medium storing a program for implementing the above-described method of canceling a system disturbance introduced by a power consumption fluctuation.
The device for counteracting the system disturbance introduced by the power consumption fluctuation comprises the following components:
the monitoring module is used for monitoring the power consumption of a tested main body needing to improve the performance to obtain the power consumption of the tested main body;
the searching module is used for finding out the phase adjustment quantity corresponding to the power consumption from a system load model according to the power consumption of the tested main body;
and the compensation module is used for compensating the clock phase of the measured main body by using the phase adjustment quantity.
Preferably, the monitoring module monitors the load of the tested subject to detect the power consumption of the tested subject.
Preferably, the method further comprises the following steps:
the model establishing module is used for adjusting the power consumption or load of the tested main body and the clock phase of the tested main body before counteracting the system disturbance caused by power consumption fluctuation to obtain a phase adjustment quantity corresponding to each fixed power consumption or load and capable of enabling the performance index to be improved of the tested main body to be optimal, and establishing the system load model by using the power consumption or load and the optimal performance index to be improved and the phase adjustment quantity corresponding to the power consumption or load.
Preferably, the model establishing module continuously and equivalently adjusts the clock phase until the performance index to be improved of the measured subject is optimal under the condition that the measured subject is under a certain fixed power consumption or load, and records the power consumption or load, the performance index to be improved and the phase adjustment amount when the performance index to be improved is optimal.
Preferably, the compensation module generates a corresponding compensation phase according to the phase adjustment amount found from the system load model, and compensates the clock phase of the measured subject by using the compensation phase.
The technical scheme provided by the embodiment of the invention has the following beneficial effects:
the embodiment of the invention counteracts the interference of the dynamic power consumption on the system through monitoring, detecting and feedback inhibition of the dynamic power consumption, thereby reducing the system disturbance and inhibiting the noise, further improving the design stability and improving the system performance.
Drawings
FIG. 1 is a block diagram of a method for canceling system disturbance caused by power consumption fluctuation according to an embodiment of the present invention;
FIG. 2 is a block diagram of an apparatus for canceling a system disturbance introduced by power consumption fluctuation according to an embodiment of the present invention;
FIG. 3 is a diagram illustrating a variation of a rise time of a critical signal when a power consumption load of an integrated chip varies according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of an implementation of a load disturbance cancellation apparatus according to an embodiment of the present invention;
fig. 5 is a schematic diagram of interference cancellation of a Time Division Duplex (TDD) transceiver according to an embodiment of the present invention.
Detailed Description
The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, and it should be understood that the preferred embodiments described below are only for the purpose of illustrating and explaining the present invention, and are not to be construed as limiting the present invention.
Fig. 1 is a block diagram of a method for canceling a system disturbance introduced by power consumption fluctuation according to an embodiment of the present invention, as shown in fig. 1, the method includes the steps of:
step S101: and obtaining the power consumption of the tested subject by detecting the power consumption of the tested subject needing to improve the performance.
The power consumption of the tested body can be detected, and the power consumption can be equivalent to the load of the tested body under partial conditions, so that the power consumption of the tested body can be detected by monitoring the load of the tested body.
Step S102: and finding out the phase adjustment amount corresponding to the power consumption from a system load model according to the power consumption of the tested body.
Before the step S101, that is, before the system load model is built to counteract the system disturbance introduced by the power consumption fluctuation, the step of building the system load model includes: the method comprises the steps of adjusting power consumption or load of a tested body and clock phase of the tested body to obtain phase adjustment quantity corresponding to each fixed power consumption or load and enabling performance indexes to be improved of the tested body to be optimal, and establishing a system load model by utilizing the power consumption or load and the optimal performance indexes to be improved and the phase adjustment quantities corresponding to the power consumption or load.
And continuously and equivalently adjusting the clock phase until the performance index to be improved of the tested main body is optimal under the condition that the tested main body is at a certain fixed power consumption or load, and recording the power consumption or load when the performance index to be improved is optimal, the performance index to be improved and the phase adjustment amount.
Step S103: and compensating the clock phase of the measured main body by using the phase adjustment quantity.
Step 103 comprises: and generating a corresponding compensation phase according to the phase adjustment amount found from the system load model, and compensating the clock phase of the measured main body by using the compensation phase. For example, the voltage-controlled oscillator may be caused to output a desired compensation phase by adjusting an input voltage of the voltage-controlled oscillator.
It will be understood by those skilled in the art that all or part of the steps in the method according to the above embodiments may be implemented by a program, which may be stored in a computer-readable storage medium, and includes steps S101 to S103 when the program is executed. The storage medium may be ROM/RAM, magnetic disk, optical disk, etc.
Fig. 2 is a block diagram of an apparatus for canceling a system disturbance introduced by power consumption fluctuation according to an embodiment of the present invention, as shown in fig. 2, including:
and the monitoring module is used for obtaining the power consumption of the tested main body by monitoring the power consumption of the tested main body needing to improve the performance. Specifically, the monitoring module may detect power consumption of the tested subject, and may also monitor a load of the tested subject in some cases to achieve detection of the power consumption of the tested subject.
And the searching module is used for finding out the phase adjustment quantity corresponding to the power consumption from a system load model according to the power consumption of the tested body.
And the compensation module is used for compensating the clock phase of the measured main body by using the phase adjustment quantity. Specifically, the compensation module generates a corresponding compensation phase according to the phase adjustment amount found from the system load model, and compensates the clock phase of the measured subject by using the compensation phase.
Further, the system load model may be established prior to counteracting system disturbances introduced by power consumption fluctuations. Therefore, the apparatus of the present embodiment further comprises:
and the model establishing module is used for adjusting the power consumption or load of the tested main body and the clock phase of the tested main body to obtain a phase adjustment quantity corresponding to each fixed power consumption or load and enabling the performance index to be improved of the tested main body to be optimal, and establishing the system load model by using the power consumption or load and the optimal performance index to be improved and the phase adjustment quantity corresponding to the power consumption or load. Specifically, taking the measured subject at a certain fixed power consumption or load as an example, the clock phase is continuously adjusted in equal amount until the performance index to be improved of the measured subject is optimal, and the power consumption or load, the performance index to be improved, and the phase adjustment amount when the performance index to be improved is optimal are recorded.
The embodiment of the invention can reduce the system interference caused by power consumption and load change, and takes the clock as a medium to bring the improved result into the system, thereby achieving the purpose of effectively improving the system performance and suppressing the interference.
Taking a transistor as an example, a response time such as a breakdown time or a storage time of the transistor is different from a response time such as a junction bias voltage of the transistor, and ideally, if the voltage is stabilized under a constant voltage condition, the time distributions are gaussian distributions, the thermal noise behavior of holes or electrons is mainly influenced, and the response time is stable on the whole system. When the voltage changes from one value to another stable value, the response time changes correspondingly, that is, a response error is introduced into two moments, and the continuous superposition of the errors can affect the system and further affect the system performance.
The embodiment of the invention mainly extracts the pressure value variation relative to the previous moment by monitoring the system power consumption which is equivalent to the system load under partial conditions, searches the corresponding compensation quantity (namely phase adjustment quantity) according to a pre-extracted system power consumption curve model (a system load module), and reversely compensates the response error by taking a clock path of the system as a medium, thereby achieving the purpose of compensating the system performance. That is, after the system power consumption is obtained, the phase adjustment amount corresponding to the system power consumption is found from the system power consumption curve model, and the phase adjustment amount is used for compensating the system clock phase.
Fig. 3 is a diagram showing a change of a rise time of a key signal when a power consumption load of an integrated device (e.g., an integrated chip) changes according to an embodiment of the present invention, and as shown in fig. 3, it can be seen from a schematic diagram of a response time of an output signal when a core load (power consumption) of the integrated device changes, that a current output by a voltage regulator increases accordingly as the load increases, a voltage drop caused by a power supply path increases, which causes a decrease in a core voltage, and a decrease in the core voltage, which causes a lag in a rise time of a key signal of a system, and shows that a noise introduction of the system is increased compared with an ideal case, thereby affecting a system performance.
Fig. 4 is a schematic diagram illustrating an implementation of the load disturbance canceling device according to the embodiment of the present invention, and as shown in fig. 4, the load disturbance canceling device at least includes a system to be improved (i.e., a system module), a power consumption detection and quantization module, a system load model module, a quantitative adjustment module, an execution adjustment module, and a system clock source module, and completes main processes including monitoring and quantization of power consumption, bringing in a power consumption model curve, calculating an adjustment amount, and bringing in a system. Wherein, the system module is equivalent to the tested body of the embodiment of fig. 3; the power consumption detection and quantification module may implement the functions of the monitoring module of the embodiment of fig. 3; the system load model module is provided with the system load model of the embodiment in fig. 3, and the function of the search module of the embodiment in fig. 3 can be realized; the quantitative adjustment module, the execution adjustment module and the system clock source module can realize the function of the compensation module in the embodiment of fig. 3; when a system load model is established, the above modules cooperate with each other to realize the functions of the model establishing module of the embodiment of fig. 3.
The system module refers to a subject to be tested and optimized, such as an integrated chip, a system complete machine, etc., whose performance needs to be improved.
The power consumption detection and quantification module needs to complete the process of power consumption detection and quantification, and the power consumption detection main body is used for monitoring the power consumption or the load of the main body to be improved and completing quantification conversion. The monitoring and conversion rate of the power consumption detection and quantization module determines the compensation performance and response speed of the improved device (i.e. the device for counteracting the system disturbance introduced by the power consumption fluctuation), and the quantization precision determines the compensation precision and suppression performance of the device.
The system load model module, the modeling of the system load depending on the type of system and the performance to be improved when modeling, is the modeling of the system prior to the operation of the plant. Taking EVM as an example, the following parts are required to establish a model of the system load: system itself, clock input, power consumption input, EVM performance monitoring. And recording the power consumption, the load condition and the EVM performance condition by adjusting the power consumption of the system module, adjusting the phase of the clock source system to gradually approach the optimal EVM performance, and recording the adjustment phase value of the clock source system, thereby completing the establishment process of the load model. That is, before the device runs, a system load model is established, during the establishment of the system load model, by taking the power consumption of the system module as a fixed value, the EVM is minimized by continuously adjusting the clock phase, then the power consumption, the EVM and the phase adjustment amount at the moment are recorded, the power consumption of the system module is changed, the above steps are repeated, the corresponding power consumption, the EVM and the phase adjustment amount are recorded again, and finally the establishment of the system load model is completed.
And the adjustment quantitative module is mainly used for providing input for the adjustment execution module, realizing the mutual matching with the adjustment execution module, completing the matching of the adjustment quantity of the clock source phase to be adjusted and the quantity to be adjusted output by the system load model, and outputting the matching to the adjustment execution module. Meanwhile, the module can perform functions of random filtering or low-pass filtering and the like on the quantity to be adjusted output by the system load model so as to match the efficiency of model adjustment and reduce the possibility of over-adjustment of the system.
And the adjustment execution module converts the specified adjustment quantity into the voltage-controlled quantitative adjustment of the clock source system, and executes the adjustment compensation action of the device.
The system clock source module provides a medium for adjusting and executing a reference clock path of the system so as to complete the adjusting and compensating functions of the device.
That is to say, the system load model module outputs the phase adjustment amount corresponding to the power consumption to the adjustment quantitative module according to the power consumption of the system module, the adjustment quantitative module performs filtering and other processing on the phase adjustment amount, converts the phase adjustment amount into an instruction executable by the adjustment execution module, and sends the instruction to the adjustment execution module, and the adjustment execution module outputs a corresponding compensation phase according to the phase adjustment amount given by the instruction, so as to compensate the system clock phase.
The device comprises the following specific implementation steps:
step 1: and adjusting the power consumption or load of the system, and synchronously recording the performance index to be improved of the system.
Step 2: and continuously and equivalently adjusting the clock phase of the system, and synchronously recording the performance index to be improved of the system.
And step 3: and changing the difference of the clock phase of the adjusting system, observing and recording the performance index of the system, and selecting the optimal or receivable index.
And 4, step 4: and (3) changing power consumption or load, repeating the steps from 1 to 3, completing a two-dimensional table of the whole power consumption, performance (namely the performance index to be improved of the system) and clock adjustment quantity (namely the phase adjustment quantity or the clock phase adjustment quantity), and establishing a system load adjustment model (namely a system load model).
That is, the above steps 1 to 4 are used to establish a system load model, during the establishment of the system load model, firstly, the system power consumption or load is fixed, the system performance index to be improved is continuously optimized by continuously adjusting the phase of the system clock in equal amount, and the corresponding system performance index to be improved and the phase adjustment amount under the system power consumption or load are recorded; and then adjusting the power consumption or load of the system, obtaining the corresponding performance index to be improved of the system and the phase adjustment quantity under different system power consumption or loads by repeating the steps, and finally establishing a system load model comprising the power consumption or load of the system, the performance index to be improved of the system and the phase adjustment quantity.
And 5: an Analog-to-Digital Converter (ADC) and other conversion units are used to monitor and quantify the power consumption of the system to be improved.
Step 6: and providing the quantization result to a system load adjustment model, finishing searching and outputting a quantitative adjustment quantity (namely a phase adjustment quantity).
And 7: the quantitative result (i.e., the phase adjustment amount) is converted into an executable instruction for adjusting the execution module.
And 8: and the input adjustment quantity is executed, so that the purpose of regulating and controlling the system clock source is achieved.
And step 9: and continuously executing the step 5 to the step 8 to complete the real-time tracking and verification of the system, so as to complete the system disturbance counteracting function introduced by the power consumption and load change.
That is, the above steps 5 to 9 are used to cancel the system disturbance caused by the system power consumption and the load change, and the phase adjustment amount corresponding to the current system power consumption is found by using the system load model established in the steps 1 to 4, and the phase of the system clock is compensated by using the phase adjustment amount.
Fig. 5 is a schematic diagram illustrating interference cancellation of a certain TDD transceiver according to an embodiment of the present invention, where as shown in fig. 5, a high-precision clock source is used in a baseband resource pool as a clock source of a whole system, and clocks of subsystems are referred to the high-precision clock source. The clock source is transmitted to the remote radio unit through the baseband processing pool and the optical fiber, the remote radio unit recovers the clock through the high-speed clock data recovery unit and provides the clock to a phase-locked loop of an intermediate frequency and Field Programmable Gate Array (FPGA) processing power supply, and further provides the clock reference to a local board clock network of the transceiver, and the local board clock network is provided to local clock devices such as a transmitting link and a local oscillator through clock distribution, so that each module at each level is ensured to process under the same clock reference, and further the system synchronization is ensured.
For a TDD transceiver, it operates in a transmit-receive time-sharing mode, and behaves as an example with intermediate frequency and FPGA processing, and it is in full-load operation in the case of transmit time slots, and in near-zero load operation in the case of receive time slots. In this case, the power consumption will add a period amount to the system in TDD cycle, and due to the influence of power consumption and power supply wiring voltage drop, the periodic noise will be added to the PLL in the intermediate frequency and FPGA processing module and brought into the local-level clock network, and then the noise enters the whole transceiver system through the local-level clock network, thus polluting the system performance.
The method of the embodiment of the invention is to feed back and compensate the periodic disturbance caused by the periodic power consumption, further compensate the output of the PLL and offset the disturbance caused by the power consumption. The specific method comprises the following steps: the output of the power supply module is detected by a quantization detection module (i.e. a power consumption detection and quantization module), an ADC is generally used to detect the magnitude of change of the power supply voltage, or the power supply current can be detected, when the power consumption is changed incrementally, for example, the power consumption difference of the transceiving time slot, a phase adjustment amount is given to compensate the output phase of the PLL, so as to offset the clock output phase difference caused by the power consumption, thereby improving the system clock performance and further improving the system performance.
The compensation amount (namely the phase adjustment amount) of the embodiment of the invention is a pre-embedded value table measured in advance according to the power consumption and the variation range, the intensity, the response time and the like of the system, and during the operation of the equipment, the corresponding compensation value (namely the phase adjustment amount) is called to compensate the clock phase of the system through the monitoring condition of the power consumption conversion amount or the power consumption conversion amount variation.
The embodiment of the invention can be applied to a single chip or an integrated system, can effectively offset system disturbance caused by power consumption or load change, and has an interference offset function.
In summary, the embodiments of the present invention have the following technical effects:
the invention can offset the system interference caused by power consumption or system load fluctuation and bring the improved result into the system, thereby effectively improving the system performance and inhibiting the load fluctuation noise.
Although the present invention has been described in detail hereinabove, the present invention is not limited thereto, and various modifications can be made by those skilled in the art in light of the principle of the present invention. Thus, modifications made in accordance with the principles of the present invention should be understood to fall within the scope of the present invention.

Claims (8)

1. A method of canceling a system disturbance introduced by power consumption fluctuations, comprising:
adjusting the power consumption or load of a tested main body and the clock phase of the tested main body to obtain a phase adjustment quantity corresponding to each fixed power consumption or load and enabling the performance index to be improved of the tested main body to be optimal, and establishing a system load model by utilizing the power consumption or load and the optimal performance index to be improved and the phase adjustment quantity corresponding to the power consumption or load;
obtaining the power consumption of the tested subject by detecting the power consumption of the tested subject needing to improve the performance;
according to the power consumption of the tested body, finding out a phase adjustment amount corresponding to the power consumption from a system load model;
and compensating the clock phase of the measured main body by using the phase adjustment quantity.
2. The method of claim 1, wherein the deriving the power consumption of the subject under test by detecting the power consumption of the subject under test requiring improved performance comprises:
and the power consumption of the tested main body is detected by monitoring the load of the tested main body.
3. The method of claim 1, wherein the obtaining a phase adjustment amount corresponding to each fixed power consumption or load and capable of optimizing a performance index to be improved of the measured subject comprises:
and continuously and equivalently adjusting the clock phase until the performance index to be improved of the tested main body is optimal under the condition that the tested main body is at a certain fixed power consumption or load, and recording the power consumption or load when the performance index to be improved is optimal, the performance index to be improved and the phase adjustment amount.
4. The method of claim 1, wherein the compensating the clock phase of the measured subject using the phase adjustment comprises:
and generating a corresponding compensation phase according to the phase adjustment amount found from the system load model, and compensating the clock phase of the measured main body by using the compensation phase.
5. An apparatus for canceling a system disturbance introduced by power consumption fluctuations, comprising:
the model establishing module is used for adjusting the power consumption or load of a tested main body and the clock phase of the tested main body to obtain a phase adjustment quantity corresponding to each fixed power consumption or load and enabling the performance index to be improved of the tested main body to be optimal, and establishing a system load model by using the power consumption or load and the optimal performance index to be improved and the phase adjustment quantity corresponding to the power consumption or load;
the monitoring module is used for obtaining the power consumption of the tested main body by detecting the power consumption of the tested main body needing to improve the performance;
the searching module is used for finding out the phase adjustment quantity corresponding to the power consumption from a system load model according to the power consumption of the tested main body;
and the compensation module is used for compensating the clock phase of the measured main body by using the phase adjustment quantity.
6. The apparatus of claim 5, the monitoring module implements detection of power consumption of the subject under test by monitoring a load of the subject under test.
7. The apparatus of claim 5, wherein the model building module continuously adjusts the clock phase in equal amount under a condition that the measured subject is under a certain fixed power consumption or load until a performance index to be improved of the measured subject is optimal, and records the power consumption or load, the performance index to be improved, and a phase adjustment amount when the performance index to be improved is optimal.
8. The apparatus of claim 5, wherein the compensation module generates a corresponding compensation phase according to the phase adjustment amount found from a system load model, and compensates a clock phase of the measured object by using the compensation phase.
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