CN107611111B - 半导体模块、电力转换装置 - Google Patents

半导体模块、电力转换装置 Download PDF

Info

Publication number
CN107611111B
CN107611111B CN201710565919.9A CN201710565919A CN107611111B CN 107611111 B CN107611111 B CN 107611111B CN 201710565919 A CN201710565919 A CN 201710565919A CN 107611111 B CN107611111 B CN 107611111B
Authority
CN
China
Prior art keywords
semiconductor chip
insulating layer
bonding material
directly
metal pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201710565919.9A
Other languages
English (en)
Other versions
CN107611111A (zh
Inventor
村上晴彦
米山玲
大月高实
山下秋彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of CN107611111A publication Critical patent/CN107611111A/zh
Application granted granted Critical
Publication of CN107611111B publication Critical patent/CN107611111B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • H01L23/3675Cooling facilitated by shape of device characterised by the shape of the housing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/043Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
    • H01L23/049Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads being perpendicular to the base
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/071Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next and on each other, i.e. mixed assemblies
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48105Connecting bonding areas at different heights
    • H01L2224/48106Connecting bonding areas at different heights the connector being orthogonal to a side surface of the semiconductor or solid-state body, e.g. parallel layout
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48153Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
    • H01L2224/48175Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/049Nitrides composed of metals from groups of the periodic table
    • H01L2924/050313th Group
    • H01L2924/05032AlN
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/049Nitrides composed of metals from groups of the periodic table
    • H01L2924/050414th Group
    • H01L2924/05042Si3N4
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/053Oxides composed of metals from groups of the periodic table
    • H01L2924/054313th Group
    • H01L2924/05432Al2O3
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/1026Compound semiconductors
    • H01L2924/1027IV
    • H01L2924/10272Silicon Carbide [SiC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1203Rectifying Diode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • H01L2924/141Analog devices
    • H01L2924/1425Converter
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • H01L2924/141Analog devices
    • H01L2924/1426Driver
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress
    • H01L2924/3512Cracking

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Inverter Devices (AREA)

Abstract

本发明的目的在于,提供能够确保高半导体芯片散热性的半导体模块和电力转换装置。具备:绝缘基板,其具有绝缘层、形成于该绝缘层的上表面的第1金属图案、形成于该绝缘层的下表面的第2金属图案;半导体芯片,其通过第1金属接合材料固定于该第1金属图案,由SiC形成;以及散热板,其通过第2金属接合材料固定于该第2金属图案,该半导体芯片的厚度是大于或等于0.25mm且小于或等于0.35mm,该绝缘层的厚度相对于该半导体芯片的厚度是大于或等于2.66倍且小于或等于5倍。

Description

半导体模块、电力转换装置
技术领域
本发明涉及用于例如大电流的通断等的半导体模块、以及使用了该半导体模块的电力转换装置。
背景技术
在专利文献1中公开了一种绝缘基板,其具有陶瓷板以及形成于陶瓷板的上表面和下表面的电极。并且,在一个电极处利用金属接合材料固定有基座板,在另一个电极处利用金属接合材料固定有半导体元件。
专利文献1:日本特开2014-130875号公报
电力控制用半导体模块搭载有IGBT、MOSFET、及FWDi等半导体芯片。这样的半导体模块称作功率模块。功率模块具备:绝缘基板,其焊接于散热板;以及半导体芯片,其焊接于绝缘基板的金属图案。
功率模块的应用产品即逆变器设备要求低损耗化和小型化,因此半导体模块也要求低损耗化和小型化。低损耗化是通过将所要搭载的半导体芯片变薄,或对半导体芯片的构造进行优化而实现的。小型化是通过封装构造的优化而实现的。然而,如果将半导体模块小型化,则在半导体模块内半导体芯片密集,散热面积也变小,因此可能导致散热性的恶化。为了避免该散热性的恶化,想到将绝缘基板的绝缘层变薄。
最近的趋势是,如上述那样,为了半导体模块的低损耗化而将半导体芯片变薄,为了改善散热性而将绝缘基板的绝缘层变薄。
对于将半导体芯片和绝缘基板进行接合的第1焊料以及将绝缘基板和散热板进行接合的第2焊料而言,在使用半导体模块时在半导体芯片的接合温度和壳体温度之间产生大的温度变化的动作模式中,由于半导体芯片、绝缘基板及散热板的线膨胀系数差而引起热疲劳。如果因热疲劳而在第1焊料和第2焊料产生裂纹,则存在半导体芯片的散热性恶化,可靠性的寿命降低的问题。
特别是如果利用诸如SiC这样的与Si相比具有较硬的物理特性值的材料形成半导体芯片,则当温度变化时在第1焊料产生大的应力应变。如果将绝缘层变薄,则在第1焊料产生更大的应力应变,存在使半导体模块的寿命缩短的问题。
想到通过将半导体芯片的厚度变薄而降低在第1焊料产生的应力应变。然而,SiC是比Si硬的材质,因此为了将晶片变薄而使用的研磨工具的磨损剧烈,量产效率恶化。
发明内容
本发明是为了解决上述课题而提出的,其目的在于提供能够确保高半导体芯片散热性的半导体模块和电力转换装置。
本发明涉及的半导体模块的特征在于具备:绝缘基板,其具有绝缘层、形成于该绝缘层的上表面的第1金属图案、形成于该绝缘层的下表面的第2金属图案;半导体芯片,其通过第1金属接合材料固定于该第1金属图案,由SiC形成;以及散热板,其通过第2金属接合材料固定于该第2金属图案,该半导体芯片的厚度是大于或等于0.25mm且小于或等于0.35mm,该绝缘层的厚度相对于该半导体芯片的厚度是大于或等于2.66倍且小于或等于5倍。
发明的效果
根据本发明,对在半导体芯片的正下方形成的第1金属接合材料的裂纹进行抑制,容许在使用了SiC半导体芯片时形成得较大的基板即绝缘基板之下的第2金属接合材料的裂纹,从而能够确保高半导体芯片散热性。
附图说明
图1是实施方式1涉及的半导体模块的剖视图。
图2是半导体模块的剖视图和俯视图。
图3是实施方式2涉及的半导体模块的剖视图。
图4是表示绝缘层的厚度与在第1金属接合材料及第2金属接合材料产生的应变之间的关系的图。
图5是实施方式3涉及的半导体模块的剖视图。
图6是表示实施方式4涉及的电力转换装置的图。
标号的说明
10散热板,12绝缘基板,12a绝缘层,12b第1金属图案,12c第2金属图案,14第2金属接合材料,16、20第1金属接合材料,18、22半导体芯片
具体实施方式
参照附图,对本发明的实施方式涉及的半导体模块和电力转换装置进行说明。对相同或对应的结构要素标注相同的标号,有时省略重复的说明。
实施方式1.
图1是实施方式1涉及的半导体模块的剖视图。该半导体模块具备绝缘基板12。绝缘基板12具有:绝缘层12a、形成于绝缘层12a的上表面的第1金属图案12b、以及形成于绝缘层12a的下表面的第2金属图案12c。绝缘层12a的材料例如是AlN、Al2O3或者是SiN。
在第1金属图案12b处利用第1金属接合材料16、20固定有半导体芯片18、22。半导体芯片18、22由SiC形成。半导体芯片18例如是IGBT(Insulated Gate BipolarTransistor),半导体芯片22例如是续流二极管。由SiC形成的半导体芯片或者晶片的厚度通常为0.25mm~0.35mm。例如,在日本特开2014-82361号公报的说明书第0005段中公开了n型SiC晶片的厚度是350μm。本发明的实施方式1涉及的半导体模块的半导体芯片18、22的厚度Z2为大于或等于0.25mm且小于或等于0.35mm。
在第2金属图案12c处利用第2金属接合材料14固定有散热板10。散热板10例如由金属等散热性高的材料形成。第1金属接合材料16、20和第2金属接合材料14例如是焊料。第2金属接合材料14具有处于半导体芯片18、22的正下方的正下部分14a以及与正下部分14a相连且不处于半导体芯片18、22的正下方的非正下部分14b。第2金属接合材料14的形成面积比第1金属接合材料16、20的形成面积大。
然而,根据绝缘层12a和半导体芯片18、22的物理特性值及线膨胀系数之间的关系,如果将绝缘层12a的厚度变厚,则半导体芯片18、22之下的第1金属接合材料16、22的应变降低,绝缘基板12之下的第2金属接合材料14的应变增加。这样的关系不是仅在利用氮化铝形成绝缘层12a、利用SiC形成半导体芯片18、22的情况下成立,而是通常成立的关系。
如果由于热循环导致半导体模块的各部分反复膨胀和收缩,则在第1金属接合材料16、22的端部形成裂纹,在第2金属接合材料14的端部形成裂纹。在图1中示出了形成于第1金属接合材料20的裂纹20a和形成于第2金属接合材料14的裂纹14c。
在图2中示出了半导体模块的剖视图和俯视图。在图2中,为了便于说明而表现出形成于第2金属接合材料14的裂纹14c和形成于第1金属接合材料20的裂纹20a。第1金属接合材料20的裂纹20a和半导体芯片22的散热性的恶化有直接关系。另一方面,对于第2金属接合材料14的裂纹14c,由于其形成于非正下部分14b,因此对半导体芯片22的散热性的影响小。
并且,裂纹20a、14c的规模如上所述,能够通过绝缘层12a的厚度调整。在本发明的实施方式1中,绝缘层12a的厚度Z1相对于半导体芯片18、22的厚度Z2为大于或等于2.66倍且小于或等于5倍。即,将绝缘层12a变厚,减少半导体芯片18、22之下的第1金属接合材料16、20的裂纹,使绝缘基板12之下的第2金属接合材料14的裂纹增加。
即,对使半导体芯片18、20的散热性大幅恶化的第1金属接合材料16、20的裂纹进行抑制,在对半导体芯片18、20的散热性贡献小的第2金属接合材料14的非正下部分14b生成裂纹。由此,能够确保高半导体芯片散热性。在将半导体芯片18、20的材料设为诸如SiC这样的硬的材料的情况下,在第1金属接合材料16、20处特别容易产生裂纹,但通过如上所述地对裂纹的产生容易度进行调整,从而能够抑制因第1金属接合材料16、20的热疲劳引起的裂纹或将其止于小规模。
这样,就本发明的实施方式1涉及的半导体模块而言,导入至第1金属接合材料16、20的裂纹的规模小于导入至第2金属接合材料14的裂纹。在第2金属接合材料14导入相对大规模的裂纹,但在俯视观察时将半导体芯片18、20配置在绝缘基板12的中央,从而能够在防止向正下部分14a形成裂纹的同时在非正下部分14b形成裂纹,因此不会大幅损害半导体芯片18、22的散热性。
由于在利用SiC形成半导体芯片18、20的情况下能够处理大电流,因此将绝缘基板12变大。在该情况下,第2金属接合材料14的非正下部分14b的面积变大,因此能够降低裂纹从非正下部分14b发展至正下部分14a的可能性。
本发明的实施方式1涉及的半导体模块能够在不丧失其特征的范围进行各种各样的变形。例如,固定于绝缘基板12的半导体芯片的数量是任意的。对以下的实施方式涉及的半导体模块和电力转换装置也同样适用。此外,以下的实施方式涉及的半导体模块和电力转换装置与实施方式1的类似点多,因此以与实施方式1的不同点为中心进行说明。
实施方式2.
图3是实施方式2涉及的半导体模块的剖视图。半导体芯片的厚度Z2是大于或等于0.25mm且小于或等于0.35mm。绝缘层12a的厚度Z3是大于或等于0.8mm。图4是表示由AlN形成的绝缘层12a的厚度与在第1金属接合材料16、20及第2金属接合材料14产生的应变之间的关系的图。在图4的A中,作为参考,示出在半导体芯片由Si形成,将绝缘层AlN设为0.653mm时,第1金属接合材料16、20和第2金属接合材料14的非弹性应变增加量。
在该情况下,在处于绝缘基板12之下的第2金属接合材料14处产生的应变比第1金属接合材料16、20大。然而,如图4的B所示,如果将半导体芯片的材料变更为SiC,则即使将由AlN形成的绝缘层12a的厚度保持0.653mm不变,在半导体芯片之下的第1金属接合材料16、20也将产生大的应变。其原因在于,SiC是比Si硬的材料。这样,在利用SiC形成半导体芯片的情况下,第1金属接合材料16、20容易产生大的应变。
然而,如图4的C、D、E所示,如果将绝缘层12a的厚度增加为0.8mm、1.0mm、1.5mm,则在第1金属接合材料16、20处产生的应变减少,在第2金属接合材料14处产生的应变增加。在本发明的实施方式2中,将绝缘层12a的厚度Z3设为大于或等于0.8mm,因此在第1金属接合材料16、20产生的应变始终比在第2金属接合材料14产生的应变小。具体地说,能够使第1金属接合材料16、20的应变与如图4的A所示的绝缘层为Si的情况等同或更小。由此,能够确保高半导体芯片散热性。
实施方式3.
图5是实施方式3涉及的半导体模块的剖视图。绝缘基板12和半导体芯片18收容于壳体50。壳体50固定于散热板10。在壳体50固定有端子52。在该端子52固定有印刷基板54。印刷基板54处于壳体50中的绝缘基板12的正上方。在印刷基板54利用导电性材料形成有焊垫60。在该焊垫60利用焊料62固定有控制IC 64的端子64a。控制IC 64是集成有半导体芯片18的保护电路以及对半导体芯片18进行驱动的驱动电路的IC。控制IC 64收容于壳体50中。
在印刷基板54连接有延伸至壳体50之外的端子56。端子56作为信号端子起作用。在壳体50固定有延伸至壳体50的外部的主端子70。在壳体50安装有盖74。将如上述那样在壳体50中内置有控制IC 64的半导体模块称作智能功率模块(IPM),该控制IC 64集成有半导体芯片18的驱动电路和保护电路。在IPM的情况下,要求比半导体模块更小型化。如果伴随封装件的小型化而将芯片高集成化,则IPM内部的热密度变高,IPM工作时的芯片接合温度的温度变化变大。如果在这样的状况下采用实施方式1、2中所说明的结构,则能够确保高半导体芯片散热性。
实施方式4.
图6是表示实施方式4涉及的电力转换装置的图。电力转换装置至少具有1个在实施方式1~3的任一者中说明的半导体模块。即,在电力转换装置的至少一处,形成实施方式1~3中所说明的厚度的绝缘层12a和半导体芯片。在图6中示出作为半导体芯片而设置有6个开关元件和6个续流二极管,整体上构成3相交流逆变器电路的电力转换装置。不限于逆变器电路,也可以形成转换器装置、伺服放大器或者电源单元等。
在电力转换装置中使用实施方式1~3中的任意者的半导体模块,从而能够将半导体模块自身小型化、高密度化、高寿命化。因此,电力转换装置的框体及母线的设计制约减少,能够将电力转换装置的框体尺寸小型化。另外,以往,由于相对于逆变器的框体尺寸来说能够搭载的半导体模块的布局制约,逆变器的控制电力元件数受限,但通过应用本发明的半导体模块,从而使电力转换装置内的布局自由度提高,因此能够增加控制电力元件数,能够实现逆变器自身的功能的提高。
此外,在以上说明的各实施方式中说明的技术特征也可以适当地组合而使用。

Claims (6)

1.一种半导体模块,其特征在于,具备:
绝缘基板,其具有绝缘层、形成于所述绝缘层的上表面的第1金属图案、形成于所述绝缘层的下表面的第2金属图案;
半导体芯片,其通过第1金属接合材料固定于所述第1金属图案,由SiC形成;以及
散热板,其通过第2金属接合材料固定于所述第2金属图案,
所述半导体芯片的厚度是大于或等于0.25mm且小于或等于0.35mm,
所述绝缘层的厚度相对于所述半导体芯片的厚度是大于或等于2.66倍且小于或等于5倍,
所述第2金属接合材料具有处于所述半导体芯片的正下方的正下部分和与所述正下部分相连且不处于所述半导体芯片的正下方的非正下部分,
导入至所述第1金属接合材料的裂纹的规模小于导入至所述非正下部分的裂纹。
2.一种半导体模块,其特征在于,具备:
绝缘基板,其具有绝缘层、形成于所述绝缘层的上表面的第1金属图案、形成于所述绝缘层的下表面的第2金属图案;
半导体芯片,其通过第1金属接合材料固定于所述第1金属图案,由SiC形成;以及
散热板,其通过第2金属接合材料固定于所述第2金属图案,
所述半导体芯片的厚度是大于或等于0.25mm且小于或等于0.35mm,
所述绝缘层的厚度是大于或等于0.8mm而小于或等于1.5mm,
所述第2金属接合材料具有处于所述半导体芯片的正下方的正下部分和与所述正下部分相连且不处于所述半导体芯片的正下方的非正下部分,
导入至所述第1金属接合材料的裂纹的规模小于导入至所述非正下部分的裂纹。
3.根据权利要求1或2所述的半导体模块,其特征在于,
所述绝缘层的材料是AlN、Al2O3或SiN。
4.根据权利要求1或2所述的半导体模块,其特征在于,具备:
壳体,其对所述绝缘基板和所述半导体芯片进行收容,固定于所述散热板;以及
控制IC,其集成有对所述半导体芯片进行驱动的驱动电路和所述半导体芯片的保护电路,
所述控制IC收容于所述壳体之中。
5.一种电力转换装置,其特征在于,
至少具有1个半导体模块,所述半导体模块具备:绝缘基板,其具有绝缘层、形成于所述绝缘层的上表面的第1金属图案、形成于所述绝缘层的下表面的第2金属图案;半导体芯片,其通过第1金属接合材料固定于所述第1金属图案,由SiC形成;以及散热板,其通过第2金属接合材料固定于所述第2金属图案,所述半导体芯片的厚度是大于或等于0.25mm且小于或等于0.35mm,所述绝缘层的厚度相对于所述半导体芯片的厚度是大于或等于2.66倍且小于或等于5倍,
所述第2金属接合材料具有处于所述半导体芯片的正下方的正下部分和与所述正下部分相连且不处于所述半导体芯片的正下方的非正下部分,
导入至所述第1金属接合材料的裂纹的规模小于导入至所述非正下部分的裂纹。
6.一种电力转换装置,其特征在于,
至少具有1个半导体模块,所述半导体模块具备:绝缘基板,其具有绝缘层、形成于所述绝缘层的上表面的第1金属图案、形成于所述绝缘层的下表面的第2金属图案;半导体芯片,其通过第1金属接合材料固定于所述第1金属图案,由SiC形成;以及散热板,其通过第2金属接合材料固定于所述第2金属图案,所述半导体芯片的厚度是大于或等于0.25mm且小于或等于0.35mm,所述绝缘层的厚度是大于或等于0.8mm而小于或等于1.5mm,
所述第2金属接合材料具有处于所述半导体芯片的正下方的正下部分和与所述正下部分相连且不处于所述半导体芯片的正下方的非正下部分,
导入至所述第1金属接合材料的裂纹的规模小于导入至所述非正下部分的裂纹。
CN201710565919.9A 2016-07-12 2017-07-12 半导体模块、电力转换装置 Active CN107611111B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2016137730A JP6759784B2 (ja) 2016-07-12 2016-07-12 半導体モジュール
JP2016-137730 2016-07-12

Publications (2)

Publication Number Publication Date
CN107611111A CN107611111A (zh) 2018-01-19
CN107611111B true CN107611111B (zh) 2021-09-07

Family

ID=60783074

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710565919.9A Active CN107611111B (zh) 2016-07-12 2017-07-12 半导体模块、电力转换装置

Country Status (4)

Country Link
US (1) US10727150B2 (zh)
JP (1) JP6759784B2 (zh)
CN (1) CN107611111B (zh)
DE (1) DE102017209119B4 (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102122210B1 (ko) * 2019-10-18 2020-06-12 제엠제코(주) 방열 기판, 그 제조 방법, 그리고 이를 포함하는 반도체 패키지
CN114556600A (zh) * 2019-10-24 2022-05-27 三菱电机株式会社 热电转换元件模块以及热电转换元件模块的制造方法
JP7178980B2 (ja) * 2019-10-30 2022-11-28 三菱電機株式会社 半導体装置

Family Cites Families (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE60037069T2 (de) 1999-05-28 2008-09-11 Denki Kagaku Kogyo K.K. Schaltung mit Substrat
TW512653B (en) * 1999-11-26 2002-12-01 Ibiden Co Ltd Multilayer circuit board and semiconductor device
JP2001284513A (ja) * 2000-03-29 2001-10-12 Mitsubishi Electric Corp パワー半導体装置
JP2001358263A (ja) * 2000-06-12 2001-12-26 Hitachi Ltd 半導体装置およびその回路形成方法
JP3926141B2 (ja) * 2000-12-27 2007-06-06 日本特殊陶業株式会社 配線基板
US7800222B2 (en) 2007-11-29 2010-09-21 Infineon Technologies Ag Semiconductor module with switching components and driver electronics
US8304660B2 (en) * 2008-02-07 2012-11-06 National Taiwan University Fully reflective and highly thermoconductive electronic module and method of manufacturing the same
WO2009150875A1 (ja) 2008-06-12 2009-12-17 株式会社安川電機 パワーモジュールおよびその制御方法
WO2011078010A1 (ja) * 2009-12-25 2011-06-30 富士フイルム株式会社 絶縁基板、絶縁基板の製造方法、配線の形成方法、配線基板および発光素子
JP5213884B2 (ja) 2010-01-27 2013-06-19 三菱電機株式会社 半導体装置モジュール
JP5638623B2 (ja) 2010-11-25 2014-12-10 三菱電機株式会社 半導体装置および半導体装置の製造方法
JP5626087B2 (ja) * 2011-04-13 2014-11-19 三菱電機株式会社 半導体装置
EP2709148A4 (en) * 2011-05-13 2015-07-15 Fuji Electric Co Ltd SEMICONDUCTOR COMPONENT AND MANUFACTURING METHOD THEREFOR
US8963321B2 (en) * 2011-09-12 2015-02-24 Infineon Technologies Ag Semiconductor device including cladded base plate
JP5887901B2 (ja) * 2011-12-14 2016-03-16 富士電機株式会社 半導体装置及び半導体装置の製造方法
US10122293B2 (en) 2012-01-17 2018-11-06 Infineon Technologies Americas Corp. Power module package having a multi-phase inverter and power factor correction
JP5966504B2 (ja) * 2012-03-28 2016-08-10 三菱マテリアル株式会社 はんだ接合構造、パワーモジュール、ヒートシンク付パワーモジュール用基板、並びに、はんだ接合構造の製造方法、パワーモジュールの製造方法、ヒートシンク付パワーモジュール用基板の製造方法
JP6044097B2 (ja) * 2012-03-30 2016-12-14 三菱マテリアル株式会社 ヒートシンク付パワーモジュール用基板、冷却器付パワーモジュール用基板及びパワーモジュール
CN104285294B (zh) * 2012-05-22 2016-11-09 松下知识产权经营株式会社 半导体装置及该半导体装置的制造方法
WO2014014012A1 (ja) * 2012-07-19 2014-01-23 三菱電機株式会社 電力用半導体モジュール
JP6154383B2 (ja) * 2012-08-23 2017-07-05 日産自動車株式会社 絶縁基板、多層セラミック絶縁基板、パワー半導体装置と絶縁基板の接合構造体、及びパワー半導体モジュール
WO2014046058A1 (ja) * 2012-09-20 2014-03-27 ローム株式会社 パワーモジュール半導体装置およびインバータ装置、およびパワーモジュール半導体装置の製造方法、および金型
JP6102171B2 (ja) 2012-10-17 2017-03-29 富士電機株式会社 炭化珪素mos型半導体装置の製造方法
JP2014130875A (ja) 2012-12-28 2014-07-10 Mitsubishi Electric Corp 半導体装置およびその製造方法
TWI478479B (zh) * 2013-01-17 2015-03-21 Delta Electronics Inc 整合功率模組封裝結構
JP5975911B2 (ja) * 2013-03-15 2016-08-23 ルネサスエレクトロニクス株式会社 半導体装置
JP6265693B2 (ja) * 2013-11-12 2018-01-24 三菱電機株式会社 半導体装置およびその製造方法
JP6129090B2 (ja) 2014-01-30 2017-05-17 三菱電機株式会社 パワーモジュール及びパワーモジュールの製造方法
TWI560829B (en) * 2014-03-07 2016-12-01 Xintec Inc Chip package and method thereof
WO2015174158A1 (ja) * 2014-05-15 2015-11-19 富士電機株式会社 パワー半導体モジュールおよび複合モジュール
JP2015220295A (ja) 2014-05-15 2015-12-07 三菱電機株式会社 パワーモジュール及びその製造方法
CN106104779B (zh) * 2014-05-20 2019-05-10 三菱电机株式会社 功率用半导体装置

Also Published As

Publication number Publication date
JP6759784B2 (ja) 2020-09-23
US10727150B2 (en) 2020-07-28
US20180019180A1 (en) 2018-01-18
DE102017209119A1 (de) 2018-01-18
DE102017209119B4 (de) 2024-02-22
JP2018010929A (ja) 2018-01-18
CN107611111A (zh) 2018-01-19

Similar Documents

Publication Publication Date Title
KR101391924B1 (ko) 반도체 패키지
JP5542567B2 (ja) 半導体装置
US20060237825A1 (en) Device packages having a III-nitride based power semiconductor device
KR100536115B1 (ko) 전력 반도체장치
JP2007305962A (ja) パワー半導体モジュール
JP2007234690A (ja) パワー半導体モジュール
WO2017217369A1 (ja) 電力用半導体装置
JP2013069782A (ja) 半導体装置
EP2889902B1 (en) Electric power semiconductor device
JP4146785B2 (ja) 電力用半導体装置
JP2010283053A (ja) 半導体装置及びその製造方法
CN107611111B (zh) 半导体模块、电力转换装置
JP2008263210A (ja) 電力用半導体装置
JPWO2013171946A1 (ja) 半導体装置の製造方法および半導体装置
JP5845634B2 (ja) 半導体装置
JP7195208B2 (ja) 半導体装置および半導体装置の製造方法
JP4695484B2 (ja) 半導体装置
KR102588854B1 (ko) 파워모듈 및 그 제조방법
KR102490612B1 (ko) 전력용 반도체 모듈
JP2007227762A (ja) 半導体装置及びこれを備えた半導体モジュール
JP4375299B2 (ja) パワー半導体装置
CN112530915B (zh) 半导体装置
JP2015097237A (ja) 半導体装置
JP2021180234A (ja) 半導体モジュール
CN109564918B (zh) 半导体装置

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant