JP6265693B2 - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
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- JP6265693B2 JP6265693B2 JP2013233824A JP2013233824A JP6265693B2 JP 6265693 B2 JP6265693 B2 JP 6265693B2 JP 2013233824 A JP2013233824 A JP 2013233824A JP 2013233824 A JP2013233824 A JP 2013233824A JP 6265693 B2 JP6265693 B2 JP 6265693B2
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- bonding
- semiconductor element
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- semiconductor
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- 238000004519 manufacturing process Methods 0.000 title claims description 31
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- 229910052737 gold Inorganic materials 0.000 claims description 4
- 229910052763 palladium Inorganic materials 0.000 claims description 4
- 238000010438 heat treatment Methods 0.000 description 14
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- 239000010949 copper Substances 0.000 description 9
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- 238000005452 bending Methods 0.000 description 1
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- 239000002131 composite material Substances 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
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Description
また、本発明に係る半導体装置の製造方法は、(a)絶縁性の基板を準備する工程と、(b)基板の主面の接合領域に焼結性の接合材を配置する工程と、(c)半導体素子の接合に供される面である接合面を接合材に加圧接触させながら接合材を焼結することにより、基板と半導体素子とを接合材を介して接合する工程と、を備え、工程(b)における接合領域は半導体素子の接合面よりも平面視で内側にあり、かつ工程(c)の後も、接合材は、半導体素子の接合面よりも平面視で30μm以上200μm以下内側にあり、基板の、半導体素子の接合面と平面視で重なる領域は平坦である。
また、本発明に係る半導体装置は、絶縁性の基板と、基板の表面に接合された半導体素子と、基板と半導体素子の接合に供される面である接合面とを接合する焼結性の接合材と、を備え、接合材は、半導体素子の接合面を接合材に加圧接触させながら焼結されたものであり、接合材は、半導体素子の接合面よりも平面視で30μm以上200μm以下内側にあり、基板の、半導体素子の接合面と平面視で重なる領域は平坦である。
<構成>
図1に、本実施の形態における半導体装置を含み、高温環境下で使用される電子機器に適用される半導体モジュールの断面図を示す。本実施の形態における半導体装置は、絶縁性の基板である絶縁基板3と、絶縁基板3に接合された半導体素子1と、絶縁基板3と半導体素子1とを接合する焼結性の接合材2とを備える。
まず、本実施の形態における焼結性の接合材2について説明する。ペースト状の接合材2は、微小金属粒子、溶剤および表面安定剤からなる。微小金属粒子は、直径1nm以上10μm以下のAg、Cu、Au、Pd、Pt等からなる。微小金属粒子の表面は有機保護膜により覆われている。接合材2をナノもしくはマイクロサイズの微小金属粒子とすることにより、融点降下が起こり、接合材固有の溶融温度よりも低い温度で焼結接合を行うことが可能となる。接合後は、バルク材同等に高融点化し、高い耐熱性と信頼性が得られる。
本実施の形態における半導体装置の製造方法は、(a)絶縁性または導電性の基板を準備する工程と、(b)基板(即ち、絶縁基板3)の主面の接合領域3aに焼結性の接合材2を配置する工程と、(c)半導体素子1の接合に供される面である接合面を接合材2に加圧接触させながら接合材2を焼結することにより、基板(即ち、絶縁基板3)と半導体素子1とを接合材2を介して接合する工程と、を備え、工程(b)における接合領域3aは半導体素子1の接合面(即ち領域3b)よりも平面視で内側にあり、かつ工程(c)の後も、接合材2は、半導体素子1の接合面よりも平面視で外側にはみ出ていないことを特徴とする。
<構成>
図3に、本実施の形態における半導体装置を含み、高温環境下で使用される電子機器に適用される半導体モジュールの断面図を示す。本実施の形態における半導体装置は、導電性基板5と、導電性基板5に接合された半導体素子1と、導電性基板5と半導体素子1とを接合する焼結性の接合材2とを備える。なお、導電性基板5は金属板である。
まず、寸法が例えば10mm×80mm×3mmの導電性基板5を準備する。図4は、導電性基板5の平面図である。次に、導電性基板5上面の接合領域5aにペースト状の焼結性の接合材2を配置する。接合材2は実施の形態1で述べた接合材と同様の性質を持つ。接合材2はシリンジに充填されており、シリンジから射出されて接合領域5aに塗布される。つまり、接合領域5aは接合材2が配置される領域である。図4において、領域5bは半導体素子1aの接合面(本実施の形態では半導体素子1の底面)を投射した領域である。接合材2は領域5bの中央に配置される。
本実施の形態における半導体装置の製造方法の、基板(即ち導電性基板5)の主面の接合領域5aに焼結性の接合材2を配置する工程において、接合材2はシリンジから射出されることにより配置されることを特徴とする。
Claims (11)
- (a)導電性の基板を準備する工程と、
(b)前記基板の主面の接合領域に焼結性の接合材を配置する工程と、
(c)半導体素子の接合に供される面である接合面を前記接合材に加圧接触させながら前記接合材を焼結することにより、前記基板と前記半導体素子とを前記接合材を介して接合する工程と、
を備え、
前記工程(b)における前記接合領域は前記半導体素子の接合面よりも平面視で内側にあり、かつ
前記工程(c)の後も、前記接合材は、前記半導体素子の接合面よりも平面視で内側にあり、
前記基板の、前記半導体素子の前記接合面と平面視で重なる領域は平坦である、
半導体装置の製造方法。 - (a)絶縁性の基板を準備する工程と、
(b)前記基板の主面の接合領域に焼結性の接合材を配置する工程と、
(c)半導体素子の接合に供される面である接合面を前記接合材に加圧接触させながら前記接合材を焼結することにより、前記基板と前記半導体素子とを前記接合材を介して接合する工程と、
を備え、
前記工程(b)における前記接合領域は前記半導体素子の接合面よりも平面視で内側にあり、かつ
前記工程(c)の後も、前記接合材は、前記半導体素子の接合面よりも平面視で30μm以上200μm以下内側にあり、
前記基板の、前記半導体素子の前記接合面と平面視で重なる領域は平坦である、
半導体装置の製造方法。 - 前記工程(c)の後において、前記接合材はAg、Cu、Pd、Auのいずれかを主成分とした導電性金属であることを特徴とする、
請求項1又は請求項2に記載の半導体装置の製造方法。 - 前記工程(b)において、前記接合材は直径1nm以上10μm以下の金属粒子からなることを特徴とする、
請求項1〜3のいずれかに記載の半導体装置の製造方法。 - 前記工程(b)において、前記接合材はペースト状であることを特徴とする、
請求項1〜4のいずれかに記載の半導体装置の製造方法。 - 前記工程(b)において、前記接合材は印刷により配置されることを特徴とする、
請求項1〜5のいずれかに記載の半導体装置の製造方法。 - 前記工程(b)において、前記接合材はシリンジから射出されることにより配置されることを特徴とする、
請求項1〜5のいずれかに記載の半導体装置の製造方法。 - 前記工程(b)において、前記接合領域は複数であり、
前記工程(c)において、前記半導体素子は複数であり、各前記半導体素子は前記接合領域の各々において接合されることを特徴とする、
請求項5〜7のいずれかに記載の半導体装置の製造方法。 - 前記工程(c)の後、焼結した前記接合材の厚みは1000μm以下であることを特徴とする、
請求項1〜8のいずれかに記載の半導体装置の製造方法。 - 導電性の基板と、
前記基板の表面に接合された半導体素子と、
前記基板と前記半導体素子の接合に供される面である接合面とを接合する焼結性の接合材と、
を備え、
前記接合材は、前記半導体素子の前記接合面を前記接合材に加圧接触させながら焼結されたものであり、
前記接合材は、前記半導体素子の前記接合面よりも平面視で内側にあり、
前記基板の、前記半導体素子の前記接合面と平面視で重なる領域は平坦である、
半導体装置。 - 絶縁性の基板と、
前記基板の表面に接合された半導体素子と、
前記基板と前記半導体素子の接合に供される面である接合面とを接合する焼結性の接合材と、
を備え、
前記接合材は、前記半導体素子の前記接合面を前記接合材に加圧接触させながら焼結されたものであり、
前記接合材は、前記半導体素子の前記接合面よりも平面視で30μm以上200μm以下内側にあり、
前記基板の、前記半導体素子の前記接合面と平面視で重なる領域は平坦である、
半導体装置。
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JP5050440B2 (ja) * | 2006-08-01 | 2012-10-17 | 日産自動車株式会社 | 半導体装置及びその製造方法 |
JP4872663B2 (ja) * | 2006-12-28 | 2012-02-08 | 株式会社日立製作所 | 接合用材料及び接合方法 |
JP5151150B2 (ja) * | 2006-12-28 | 2013-02-27 | 株式会社日立製作所 | 導電性焼結層形成用組成物、これを用いた導電性被膜形成法および接合法 |
US8513534B2 (en) * | 2008-03-31 | 2013-08-20 | Hitachi, Ltd. | Semiconductor device and bonding material |
JP2011029472A (ja) * | 2009-07-28 | 2011-02-10 | Hitachi Metals Ltd | 接合材料及びこれを用いた半導体の実装方法並びに半導体装置 |
JP5968046B2 (ja) * | 2012-04-26 | 2016-08-10 | 三菱電機株式会社 | 半導体装置および半導体装置の製造方法 |
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DE102014222993B4 (de) | 2022-07-14 |
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CN104637832B (zh) | 2018-07-03 |
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CN104637832A (zh) | 2015-05-20 |
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