CN105845724B - A kind of vertical HEMT device of accumulation type - Google Patents
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- CN105845724B CN105845724B CN201610432032.8A CN201610432032A CN105845724B CN 105845724 B CN105845724 B CN 105845724B CN 201610432032 A CN201610432032 A CN 201610432032A CN 105845724 B CN105845724 B CN 105845724B
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- 238000009825 accumulation Methods 0.000 title claims abstract description 32
- 230000004888 barrier function Effects 0.000 claims abstract description 53
- 230000000903 blocking effect Effects 0.000 claims abstract description 8
- 238000009413 insulation Methods 0.000 claims description 20
- 239000000758 substrate Substances 0.000 claims description 10
- 229910002704 AlGaN Inorganic materials 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 7
- 238000002161 passivation Methods 0.000 claims description 5
- 230000003139 buffering effect Effects 0.000 claims description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 2
- 229910052681 coesite Inorganic materials 0.000 claims description 2
- 229910052593 corundum Inorganic materials 0.000 claims description 2
- 229910052906 cristobalite Inorganic materials 0.000 claims description 2
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(IV) oxide Inorganic materials O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 claims description 2
- 239000000377 silicon dioxide Substances 0.000 claims description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 2
- 229910052682 stishovite Inorganic materials 0.000 claims description 2
- 229910052905 tridymite Inorganic materials 0.000 claims description 2
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 2
- 230000005684 electric field Effects 0.000 abstract description 11
- 230000015556 catabolic process Effects 0.000 abstract description 8
- 230000000694 effects Effects 0.000 abstract description 5
- 230000002441 reversible effect Effects 0.000 abstract description 5
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 238000005530 etching Methods 0.000 description 6
- 238000005036 potential barrier Methods 0.000 description 6
- 230000002829 reductive effect Effects 0.000 description 4
- 230000008094 contradictory effect Effects 0.000 description 3
- 230000036961 partial effect Effects 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 2
- 229910001092 metal group alloy Inorganic materials 0.000 description 2
- 229910004205 SiNX Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 239000012774 insulation material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
- 230000003313 weakening effect Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7788—Vertical transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
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Abstract
The invention belongs to technical field of semiconductors, it is related to a kind of vertical HEMT device of accumulation type.Under forward conduction state of the present invention, insulated gate structures side-walls form the electron accumulation layer of high concentration, greatly reduce the conducting resistance of device, to ensure that device has good forward current driving capability；Under reverse blocking state, insulated gate structures can effectively improve the electric field concentration effect of device barrier layer and buffer layer interface, new electric field spike is introduced in insulated gate structures end simultaneously, keeps device electric fields distribution more uniform, to improve the breakdown voltage of device.The device preparation technology that the present invention is announced is compatible with traditional handicraft.
Description
Technical field
The invention belongs to technical field of semiconductors, it is related to a kind of vertical HEMT (the High Electron of accumulation type
Mobility Transistor, high electron mobility transistor) device.
Background technique
Existing high voltage GaN HEMT structure is mainly transversal device, and basic device structure is as shown in Figure 1.Device is main
Including source electrode, the drain and gate formed in substrate, GaN buffer layer, AlGaN potential barrier and AlGaN potential barrier, wherein source electrode
Ohmic contact is formed with drain electrode and AlGaN potential barrier, grid and AlGaN potential barrier form Schottky contacts.But for transverse direction
For GaN HEMT, in the off state, drain electrode can be reached by GaN buffer layer from source electrode injected electrons, form electric leakage
Channel, excessive buffer layer leakage current will lead to device and puncture in advance, be unable to give full play the high voltage advantage of GaN material,
To limit application of the GaN HEMT in terms of high pressure.Transverse direction GaN HEMT device relies primarily between grid and drain electrode simultaneously
Active area bears pressure resistance, to obtain big breakdown voltage, very big grid and drain electrode spacing need to be designed, to will increase chip
Area is unfavorable for the development trend of modern power electronic system portable, miniaturization.
Document (Enhancement and Depletion Mode AlGaN/GaN CAVET With Mg-Ion-
Implanted GaN as Current Blocking Layer,IEEE ELECTRON DEVICE LETTERS,VOL.29,
NO.6, JUNE 2008) propose vertical GaN HEMT structure, effectively improve the problems of above-mentioned transverse direction GaN HEMT.
Compared with lateral GaN HEMT, there are following advantages by vertical GaN HEMT: device pressure resistance is no longer influenced by the limitation of lateral dimension, i.e.,
Device mainly bears pressure resistance by the longitudinal pitch between grid and drain electrode, and lateral device dimensions can design very small,
Effectively save chip area；The p-n junction formed between p-GaN current barrier layer and n-GaN buffer layer simultaneously can effectively stop
From source electrode injected electrons, thus suppression device buffer layer leakage current.
For conventional vertical GaN HEMT, longitudinal device can not realize conducting using 2DEG, and conducting electric current needs
Buffer layer is flowed through, this makes conducting resistance much higher than transversal device；And device relies primarily on p-GaN current barrier layer and n-GaN
The PN junction formed between buffer layer bears pressure resistance, and in order to realize high breakdown voltage, n-GaN buffer layer concentration is unsuitable excessively high,
But the buffer layer of low concentration will increase the conducting resistance of device, greatly limit the forward current ability of device, therefore conventional vertical
There is the contradictory relation of pressure resistance with conducting resistance in straight GaNHEMT device.
Summary of the invention
It is to be solved by this invention, aiming at the above problem, proposes a kind of vertical HEMT device of accumulation type, mentioned reaching
The conducting resistance that device is reduced while high device electric breakdown strength, alleviates or solves the contradictory relation of pressure resistance with conducting resistance.
The technical scheme is that as shown in figure 3,
The vertical HEMT device of a kind of accumulation type, including drain electrode 1, the substrate 2, buffer layer being cascading from bottom to up
3, active electrode 7 is arranged in channel layer 5 and barrier layer 6, the 6 upper surface both ends of barrier layer；6 upper surface middle part of barrier layer is set
It is equipped with insulated gate structures；6 upper surface of barrier layer between the source electrode 7 and insulated gate structures has dielectric passivation layer
10；It is characterized in that, the substrate 2, buffer layer 3, channel layer 5 are n-type doping；The current barrier layer 4 is p-type doping；Institute
State in buffer layer 3 that there are barrier layers 4；It is run vertically down in the middle part of the insulated gate structures, sequentially passes through potential barrier
Layer 6, channel layer 5 and barrier layer 4 simultaneously extend into buffer layer 3, insulated gate structures be located at 6 upper surface of barrier layer part and to
The part of lower extension forms T-shape structure；The insulated gate structures surround grid by insulation gate medium 8 and by insulation gate medium 8
Electrode 9 is constituted；The barrier layer 4 is located at the two sides of insulation gate medium 8, and has spacing, this spacing between insulation gate medium 8
And form current apertures；The source electrode 7 and drain electrode 1 are Ohmic contact.
Further, the transverse width of the insulation gate medium 8 gradually increases from top to bottom
Further, the gate electrode 9 is made of first gate electrode 91 and the second gate electrode 92, formation splitting bar, and first
Gate electrode 91 is located at the top of the second gate electrode 92, and between first gate electrode 91 and the second gate electrode 92 by insulation gate medium 8 every
From；The connect current potential of second gate electrode 92 is positive potential, negative potential or zero potential.
Further, the p-type doping blocking layer structure that the current barrier layer 4 is parallel to each other in vertical direction by multilayer
At.
Further, the doping way of the buffer layer 3 is that Uniform Doped, longitudinal divisions Doping and vertical linear are mixed
It is one of miscellaneous.
Further, the insulated gate structures are located at the part of 6 upper surface of barrier layer, extend into barrier layer vertically downward
In 6.
Further, the insulated gate structures are located at the part of 6 upper surface of barrier layer, extend into barrier layer vertically downward
In 6, and it is connect with the upper surface of channel layer 5.
Further, the material that the insulation gate medium 8 uses is Al2O3、HfO2、SiO2One or more of combinations.
Further, the substrate 2, buffer layer 3, current barrier layer 4, channel layer 5 and 6 material of barrier layer be GaN, AlN,
The combination of one or more of AlGaN, InGaN, InAlN, and channel layer 5 and barrier layer 6 form hetero-junctions
Beneficial effects of the present invention are, on the one hand, insulated gate structures can effectively improve device under reverse blocking state
The electric field concentration effect of part current barrier layer and buffer layer interface, while new electric field is introduced in insulated gate structures end
Spike keeps device electric fields distribution more uniform, to improve the breakdown voltage of device；On the other hand, forward conduction state
Lower insulated gate structures side-walls form the electron accumulation layer of high concentration, the conducting resistance of device are greatly reduced, to protect
Device has been demonstrate,proved with good forward current driving capability.
Detailed description of the invention
Fig. 1 is conventional lateral HEMT device structure.
Fig. 2 is conventional vertical HEMT device structure.
Fig. 3 is the vertical HEMT device structure of accumulation type proposed by the present invention.
Fig. 4 is the vertical HEMT device structure of the accumulation type proposed by the present invention with stairstepping gate medium.
Fig. 5 is proposed by the present invention with the vertical HEMT device structure of division insulated gate structures accumulation type.
Fig. 6 is that the present invention proposes the vertical HEMT device structure of accumulation type with multilayer p-type current barrier layer.
Fig. 7 is buffer layer proposed by the present invention using the sectional doped vertical HEMT device structure of accumulation type.
Fig. 8 is the vertical HEMT device structure of accumulation type of grid lower barrierlayer partial etching proposed by the present invention.
Fig. 9 is the vertical HEMT device structure of accumulation type that grid lower barrierlayer proposed by the present invention all etches.
Figure 10 is the reverse withstand voltage of accumulation type proposed by the present invention vertical HEMT device structure and conventional vertical HEMT structure
Field distribution compares figure.
Figure 11 is the curve of output of accumulation type proposed by the present invention vertical HEMT device structure and conventional vertical HEMT structure
Compare figure.
Specific embodiment
With reference to the accompanying drawings and examples, the technical schemes of the invention are described in detail:
Fig. 3 shows a kind of full structure cell schematic diagram of the vertical HEMT device of accumulation type.This example device includes:
The device includes the drain electrode 1 being cascading from bottom to up, substrate 2, buffer layer 3, channel layer 5 and potential barrier
Active electrode 7 is arranged in layer 6, the 6 upper surface both ends of barrier layer；6 upper surface middle part of barrier layer is provided with insulated gate electrode knot
Structure；6 upper surface of barrier layer between the source electrode 7 and insulated gate structures has dielectric passivation layer 10；It is characterized in that, institute
Stating substrate 2, buffer layer 3, channel layer 5 is n-type doping；The current barrier layer 4 is p-type doping；There is resistance in the buffer layer 3
Barrier 4；It runs vertically down, sequentially pass through barrier layer 6, channel layer 5 and stops in the middle part of the insulated gate structures
Layer 4 simultaneously extends into buffer layer 3, and the part that insulated gate structures are located at the part of 6 upper surface of barrier layer and extend downwardly is formed
T-shape structure；The insulated gate structures are constituted by insulation gate medium 8 and by the encirclement gate electrode 9 of insulation gate medium 8；The resistance
Barrier 4 is located at the two sides of insulation gate medium 8, and has spacing between insulation gate medium 8, this spacing simultaneously forms current apertures；
The source electrode 1 and drain electrode 7 are Ohmic contact.
The vertical HEMT device of accumulation type provided by the invention alleviates the pressure resistance of conventional vertical HEMT device and conducting resistance
Contradictory relation.Under reverse blocking state, insulated gate structures can effectively improve device current barrier layer and buffering bed boundary
The electric field concentration effect at place, while new electric field spike is introduced in insulated gate structures end, make device electric fields distribution more
Uniformly, to improve the breakdown voltage of device；Under forward conduction state, under positive grid voltage effect, insulated gate structures
Side-walls form the electron accumulation layer of high concentration, form the low impedance path of electronics, greatly reduce the conducting resistance of device, from
And ensure that device has good forward current driving capability.
Embodiment 2
Compared with Example 1, stairstepping, other structures and 1 phase of embodiment is presented in the insulation gate medium 8 of this example device
Together, as shown in Figure 4.The introducing of the insulation gate medium 8 of stairstepping can effectively reduce gate capacitance, improve the dynamic of device
Can, but the accumulation effect of grid will receive weakening.
Embodiment 3
Compared with Example 1, the insulated gate structures of this example device are division insulated gate structures, other structures and implementation
Example 1 is identical, as shown in Figure 5.Using division insulated gate electrodes structure, it can be effectively reduced gate-drain capacitance, to improve device
Dynamic property；New electric field spike is introduced in the interface of gate electrode 91 and division gate electrode 92 simultaneously, so as to improve drift
Area's field distribution improves device pressure resistance.In addition, the current potential of division gate electrode 92 can be positive potential, negative potential or zero electricity
Position.
Embodiment 4
Compared with Example 1, the current barrier layer 4 of this example device is parallel to each other and size phase in the vertical direction by multilayer
Same p-type doping blocking layer is constituted, and other structures are same as Example 1, as shown in Figure 6.The introducing of multilayer p-type doping blocking layer
It can effectively improve the field distribution of buffer layer, improve average field intensity, improve device pressure resistance；Further, since p-type is adulterated
Barrier layer can improve to a certain extent the doping concentration of buffer layer to the depletion action of buffer layer, to reduce leading for device
Be powered resistance, improves forward current fan-out capability.
Embodiment 5
Compared with Example 1, the buffer layer 3 of this example device uses sectional doped, and other structures are same as Example 1, such as
Shown in Fig. 7.Buffer layer uses the sectional doped field distribution that can effectively optimize buffer layer, and draws in doping interface
Enter new electric field spike, to improve device pressure resistance.
Embodiment 6
Compared with Example 1, the grid lower barrierlayer 6 of this example device takes whole etchings, other structures and 1 phase of embodiment
Together, as shown in Figure 9.Grid lower barrierlayer, which is taken all to etch, can effectively exhaust 2DEG concentration below grid, greatly improve
Threshold voltage, to realize enhanced, but all etching can cause to damage to buffering bed boundary for grid lower barrierlayers, influence device
Electric property.
Embodiment 7
Compared with Example 1, the grid lower barrierlayer 6 of this example device takes partial etching, other structures and 1 phase of embodiment
Together, as shown in Figure 8.Compared with Example 6, caused by grid lower barrierlayer partial etching can be avoided to a certain extent because of etching
Interface damage.
The vertical HEMT device of accumulation type described in above-mentioned several embodiments of the invention, can using GaN, AlN,
The combination of one or more of AlGaN, InGaN, InAlN are as substrate 2,3 current barrier layer 4 of buffer layer, channel layer 5 and gesture
The material of barrier layer 6；For passivation layer 10, the common material of industry is SiNx, Al can also be used2O3, the dielectric materials such as AlN, insulation
Material identical with passivation layer can be used in gate medium 8；Source electrode 7, drain electrode 1 generally use metal alloy, and there are commonly Ti/
Al/Ni/Au or Mo/Al/Mo/Au etc.；Gate electrode 9 generally uses the biggish metal alloy of work function, such as Ni/Au or Ti/Au
Deng.
Figure 10, Figure 11 are the vertical HEMT device structure of accumulation type proposed by the present invention and conventional vertical HEMT structure respectively
Field distribution compares figure when reverse withstand voltage and curve of output compares figure.It is emulated using Sentaurus TCAD software, two kinds
Structure is 11 μm in device longitudinal size, and lateral dimension is 4 μm, and buffer layer thickness is the present invention under conditions of 9.5 μm
The breakdown voltage of the structure proposed is increased to 1848V from the 585V of conventional vertical HEMT, and breakdown voltage improves 215%；This hair
The conducting resistance of the structure of bright proposition is reduced to 0.83m Ω cm2, conducting resistance from the 1.86m Ω cm2 of conventional vertical HEMT
Reduce by 124%.
Claims (9)
1. the vertical HEMT device of a kind of accumulation type, including the drain electrode (1), substrate (2), buffering being cascading from bottom to up
Active electrode (7) are arranged in layer (3), channel layer (5) and barrier layer (6), barrier layer (6) the upper surface both ends；The barrier layer
(6) upper surface middle part is provided with insulated gate structures；On barrier layer (6) between the source electrode (7) and insulated gate structures
Surface has dielectric passivation layer (10)；It is characterized in that, the substrate (2), buffer layer (3), channel layer (5) be n-type doping；Institute
It states there are current barrier layer (4) in buffer layer (3), the barrier layer (4) is p-type doping；The middle part of the insulated gate structures
It runs vertically down, sequentially pass through barrier layer (6), channel layer (5) and barrier layer (4) and extends into buffer layer (3),
The part that insulated gate structures are located at the part of barrier layer (6) upper surface and extend downwardly forms T-shape structure；The insulated gate
Pole structure is constituted by insulation gate medium (8) and by insulation gate medium (8) encirclement gate electrode (9)；The barrier layer (4) is located at insulation
The two sides of gate medium (8), and there is spacing between insulation gate medium (8), this spacing simultaneously forms current apertures；The source electrode
(7) and drain electrode (1) is Ohmic contact.
2. a kind of vertical HEMT device of accumulation type according to claim 1, which is characterized in that the insulation gate medium (8)
Transverse width gradually increase from top to bottom.
3. a kind of vertical HEMT device of accumulation type according to claim 1, which is characterized in that the gate electrode (9) is by
One gate electrode (91) and the second gate electrode (92) are constituted, and form splitting bar, and first gate electrode (91) is located at the second gate electrode (92)
Top, and be isolated between first gate electrode (91) and the second gate electrode (92) by insulation gate medium (8)；Second gate electrode
(92) connect current potential is positive potential, negative potential or zero potential.
4. the vertical HEMT device of a kind of accumulation type according to claim 1 to 3, which is characterized in that the electric current
The p-type doping blocking layer that barrier layer (4) is parallel to each other in vertical direction by multilayer is constituted.
5. a kind of vertical HEMT device of accumulation type according to claim 1, which is characterized in that buffer layer (3) are mixed
Miscellaneous mode is one of Uniform Doped, longitudinal divisions Doping and vertical linear doping.
6. a kind of vertical HEMT device of accumulation type according to claim 1, which is characterized in that the insulated gate structures position
In the part of barrier layer (6) upper surface, extended into vertically downward from surface in barrier layer (6).
7. a kind of vertical HEMT device of accumulation type according to claim 6, which is characterized in that the insulated gate structures position
It in the part of barrier layer (6) upper surface, is extended into vertically downward from surface in barrier layer (6), and the upper surface with channel layer (5)
Connection.
8. a kind of according to claim 1-3, the vertical HEMT device of accumulation type described in 5-7 any one, the insulation gate medium
(8) material used is Al2O3、HfO2、SiO2One or more of combinations.
9. a kind of vertical HEMT device of accumulation type according to claim 8, which is characterized in that the substrate (2), buffer layer
(3), current barrier layer (4), channel layer (5) and barrier layer (6) material are one of GaN, AlN, AlGaN, InGaN, InAlN
Or several combinations, and channel layer (5) and barrier layer (6) form hetero-junctions.
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| CN111354777A (en) * | 2018-12-24 | 2020-06-30 | 东南大学 | Heterojunction semiconductor device with low on-resistance |
| CN109888010B (en) * | 2019-01-28 | 2021-09-28 | 西安电子科技大学 | AlGaN/GaN heterojunction vertical field effect transistor with P-type shielding layer and manufacturing method thereof |
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| CN113410297B (en) * | 2021-06-23 | 2022-05-17 | 湘潭大学 | MIS split gate GaN-based high electron mobility transistor and preparation method thereof |
| CN114597130B (en) * | 2022-04-02 | 2022-12-27 | 致瞻科技(上海)有限公司 | Silicon carbide MOSFET device based on split gate and manufacturing method thereof |
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| CN105845724A (en) | 2016-08-10 |
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