CN105845724A - Accumulation vertical HEMT device - Google Patents
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- CN105845724A CN105845724A CN201610432032.8A CN201610432032A CN105845724A CN 105845724 A CN105845724 A CN 105845724A CN 201610432032 A CN201610432032 A CN 201610432032A CN 105845724 A CN105845724 A CN 105845724A
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- 238000009825 accumulation Methods 0.000 title claims abstract description 33
- 230000004888 barrier function Effects 0.000 claims abstract description 55
- 230000000903 blocking effect Effects 0.000 claims abstract description 8
- 239000000758 substrate Substances 0.000 claims description 9
- 229910002704 AlGaN Inorganic materials 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 8
- 238000002161 passivation Methods 0.000 claims description 5
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 3
- 229910052593 corundum Inorganic materials 0.000 claims description 3
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 3
- 229910052681 coesite Inorganic materials 0.000 claims description 2
- 229910052906 cristobalite Inorganic materials 0.000 claims description 2
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(IV) oxide Inorganic materials O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 claims description 2
- 239000000377 silicon dioxide Substances 0.000 claims description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 2
- 229910052682 stishovite Inorganic materials 0.000 claims description 2
- 229910052905 tridymite Inorganic materials 0.000 claims description 2
- 230000005684 electric field Effects 0.000 abstract description 15
- 230000015556 catabolic process Effects 0.000 abstract description 8
- 239000000872 buffer Substances 0.000 abstract description 6
- 230000000694 effects Effects 0.000 abstract description 5
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 238000005530 etching Methods 0.000 description 5
- 238000005036 potential barrier Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000008094 contradictory effect Effects 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 229910001092 metal group alloy Inorganic materials 0.000 description 2
- 229910004205 SiNX Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7788—Vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
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- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
The invention belongs to the technical field of semiconductors, and relates to an accumulation vertical HEMT device. In the forward conduction state of the accumulation vertical HEMT device, a high-concentration electron accumulation layer is formed at the side wall of an insulated gate electrode structure so that conduction resistance of the device can be greatly reduced and the device is ensured to have great forward current driving capacity; and in the reverse blocking state, the effect of electric field concentration of the interface of the barrier layer and the buffer layer of the device can be effectively improved by the insulated gate electrode structure, and a new electric field peak is introduced to the tail end of the insulated gate electrode structure so that electric field distribution is enabled to be more uniform, and off-state breakdown voltage of the device can be enhanced. The preparation technology of the device is compatible with the conventional technology.
Description
Technical field
The invention belongs to technical field of semiconductors, relate to a kind of vertical HEMT of accumulation type (High Electron Mobility
Transistor, HEMT) device.
Background technology
Existing height is pressure, and GaN HEMT-structure is mainly transversal device, and basic device structure is as shown in Figure 1.Device mainly includes
The source electrode of formation, drain and gate, wherein source electrode in substrate, GaN cushion, AlGaN potential barrier and AlGaN potential barrier
Forming Ohmic contact with drain electrode and AlGaN potential barrier, grid forms Schottky contacts with AlGaN potential barrier.But for laterally
For GaN HEMT, in the off state, drain electrode can be arrived through GaN cushion from source electrode injected electrons, form electric leakage
Passage, excessive cushion leakage current can cause device to puncture in advance, it is impossible to gives full play to the pressure advantage of height of GaN material,
Thus limit GaN HEMT application in terms of high pressure.The most laterally GaN HEMT device relies primarily between grid and drain electrode
Active area bears pressure, will obtain big breakdown voltage, need to design the biggest grid and drain electrode spacing, thus can increase chip
Area, is unfavorable for the development trend of modern power electronic system portable, miniaturization.
Document (Enhancement and Depletion Mode AlGaN/GaN CAVET With Mg-Ion-Implanted GaN
as Current Blocking Layer,IEEE ELECTRON DEVICE LETTERS,VOL.29,NO.6,JUNE 2008)
Propose vertical GaN HEMT-structure, effectively improve the problem existing for above-mentioned horizontal GaN HEMT.With horizontal GaN HEMT
Comparing, there is following advantage in vertical GaN HEMT: device is pressure is no longer influenced by the restriction of lateral dimension, i.e. device mainly passes through grid
Longitudinal pitch between pole and drain electrode is born pressure, and it is the least that lateral device dimensions can design, and effectively saves chip area；
The p-n junction simultaneously formed between p-GaN current barrier layer and n-GaN cushion can effectively stop from source electrode injected electrons,
Thus suppression device cushion leakage current.
For conventional vertical GaN HEMT, longitudinal device cannot utilize 2DEG to realize conducting, and conducting electric current needs to flow through
Cushion, this makes conducting resistance be far above transversal device；And device relies primarily on p-GaN current barrier layer and buffers with n-GaN
The PN junction formed between Ceng bears pressure, and in order to realize high breakdown voltage, n-GaN buffer layer concentration is unsuitable too high, but low
The cushion of concentration can increase the conducting resistance of device, greatly limit the forward current ability of device, therefore conventional vertical GaN
There is pressure and conducting resistance contradictory relation in HEMT device.
Summary of the invention
To be solved by this invention, it is simply that for the problems referred to above, propose a kind of vertical HEMT device of accumulation type, reach raising
Reduce the conducting resistance of device while device electric breakdown strength, alleviate or solve pressure and conducting resistance contradictory relation.
The technical scheme is that as it is shown on figure 3,
A kind of vertical HEMT device of accumulation type, including the drain electrode 1 being cascading from bottom to up, substrate 2, cushion 3,
Channel layer 5 and barrier layer 6, described barrier layer 6 upper surface two ends are provided with source electrode 7；Described barrier layer 6 upper surface middle part sets
It is equipped with insulated gate structures；Barrier layer 6 upper surface between described source electrode 7 and insulated gate structures has dielectric passivation layer 10；
It is characterized in that, described substrate 2, cushion 3, channel layer 5 are n-type doping；Described current barrier layer 4 adulterates for p-type；
There is barrier layer 4 in described cushion 3；The middle part of described insulated gate structures runs vertically down, and sequentially passes through gesture
Barrier layer 6, channel layer 5 and barrier layer 4 also extend in cushion 3, and insulated gate structures is positioned at the portion of barrier layer 6 upper surface
The part divided and downwardly extend forms T-shape structure；Described insulated gate structures is by insulated gate medium 8 with by insulated gate medium 8
Surround gate electrode 9 to constitute；Described barrier layer 4 is positioned at the both sides of insulated gate medium 8, and and insulated gate medium 8 between have between
Away from, this spacing also forms current apertures；Described source electrode 1 and drain electrode 7 are Ohmic contact.
Further, the transverse width of described insulated gate medium 8 is gradually increased from top to bottom
Further, described gate electrode 9 is made up of first gate electrode 91 and second gate electrode 92, forms splitting bar, the first grid
Electrode 91 is positioned at above second gate electrode 92, and between first gate electrode 91 and second gate electrode 92 by insulated gate medium 8 every
From；Described the connect current potential of second gate electrode 92 is positive potential, negative potential or zero potential.
Further, the p-type doping blocking layer that described current barrier layer 4 is parallel to each other in vertical direction by multilayer is constituted.
Further, during the doping way of described cushion 3 is Uniform Doped, longitudinal divisions Doping and vertical linear doping
One.
Further, described insulated gate structures is positioned at the part of barrier layer 6 upper surface, extends into vertically downward in barrier layer 6.
Further, described insulated gate structures is positioned at the part of barrier layer 6 upper surface, extends in barrier layer 6 vertically downward,
And be connected with the upper surface of channel layer 5.
Further, the material that described insulated gate medium 8 uses is Al2O3、HfO2、SiO2The combination of one or more.
Further, described substrate 2, cushion 3, current barrier layer 4, channel layer 5 and barrier layer 6 material be GaN, AlN,
The combination of one or more in AlGaN, InGaN, InAlN, and channel layer 5 and barrier layer 6 form hetero-junctions
Beneficial effects of the present invention is, on the one hand, under reverse blocking state, insulated gate structures can improve device current effectively
Barrier layer and the electric field concentration effect of buffer layer interface, introduce new electric field spike simultaneously, make in insulated gate structures end
Device electric fields distribution is more uniform, thus improves the breakdown voltage of device；On the other hand, insulated gate under forward conduction state
Electrode structure side-walls forms the electron accumulation layer of high concentration, greatly reduces the conducting resistance of device, thus ensure that device has
There is good forward current driving force.
Accompanying drawing explanation
Fig. 1 is conventional laterally HEMT device structure.
Fig. 2 is conventional vertical HEMT device structure.
Fig. 3 is the accumulation type vertical HEMT device structure that the present invention proposes.
Fig. 4 is the vertical HEMT device structure of the accumulation type with stairstepping gate medium that the present invention proposes.
Fig. 5 be the present invention propose have division insulated gate structures accumulation type vertical HEMT device structure.
Fig. 6 is the accumulation type vertical HEMT device structure that the present invention proposes to have multilayer p-type current barrier layer.
Fig. 7 is that the cushion that the present invention proposes uses sectional doped accumulation type vertical HEMT device structure.
Fig. 8 is the accumulation type vertical HEMT device structure of the grid lower barrierlayer partial etching that the present invention proposes.
Fig. 9 is the accumulation type vertical HEMT device structure that the grid lower barrierlayer that the present invention proposes all etches.
Figure 10 is the accumulation type vertical HEMT device structure and the reverse resistance to piezoelectric field of conventional vertical HEMT-structure that the present invention proposes
Distribution comparison diagram.
Figure 11 is that the accumulation type vertical HEMT device structure that the present invention proposes compares with the curve of output of conventional vertical HEMT-structure
Figure.
Detailed description of the invention
Below in conjunction with the accompanying drawings and embodiment, technical scheme is described in detail:
Fig. 3 shows the full structure cell schematic diagram of the vertical HEMT device of a kind of accumulation type.This example device includes:
Described device includes drain electrode 1, substrate 2, cushion 3, channel layer 5 and the barrier layer being cascading from bottom to up
6, described barrier layer 6 upper surface two ends are provided with source electrode 7；Described barrier layer 6 upper surface middle part is provided with insulated gate structures；
Barrier layer 6 upper surface between described source electrode 7 and insulated gate structures has dielectric passivation layer 10；It is characterized in that, described
Substrate 2, cushion 3, channel layer 5 are n-type doping；Described current barrier layer 4 adulterates for p-type；Described cushion 3 is deposited
On barrier layer 4；The middle part of described insulated gate structures runs vertically down, and sequentially passes through barrier layer 6, channel layer 5 and
Barrier layer 4 also extends in cushion 3, part that insulated gate structures is positioned at barrier layer 6 upper surface and the part downwardly extended
Form T-shape structure；Described insulated gate structures is by insulated gate medium 8 and is surrounded gate electrode 9 by insulated gate medium 8 and constitutes；
Described barrier layer 4 is positioned at the both sides of insulated gate medium 8, and and insulated gate medium 8 between there is spacing, this spacing also forms electricity
Discharge orifice footpath；Described source electrode 1 and drain electrode 7 are Ohmic contact.
The vertical HEMT device of accumulation type that the present invention provides alleviates the pressure lance with conducting resistance of conventional vertical HEMT device
Shield relation.Under reverse blocking state, insulated gate structures can improve device current barrier layer and buffer layer interface effectively
Electric field concentration effect, introduces new electric field spike simultaneously in insulated gate structures end, makes device electric fields distribution more uniform,
Thus improve the breakdown voltage of device；Under forward conduction state, under positive grid voltage effect, insulated gate structures side-walls
Form the electron accumulation layer of high concentration, form the low impedance path of electronics, greatly reduce the conducting resistance of device, thus ensure
Device has a good forward current driving force.
Embodiment 2
Compared with Example 1, the insulated gate medium 8 of this example device presents stairstepping, and other structures are same as in Example 1,
As shown in Figure 4.The introducing of the insulated gate medium 8 of stairstepping can reduce gate capacitance effectively, improves the dynamic property of device,
But the accumulation effect of grid can be weakened.
Embodiment 3
Compared with Example 1, the insulated gate structures of this example device is division insulated gate structures, other structures and embodiment 1
Identical, as shown in Figure 5.Use division insulated gate electrodes structure, gate-drain capacitance can be effectively reduced, thus improve device
Dynamic property；Introduce new electric field spike simultaneously in the interface of gate electrode 91 and splitting bar electrode 92, thus improve drift region
Electric Field Distribution, improves device pressure.Additionally, the current potential of splitting bar electrode 92 can be positive potential, negative potential or zero potential.
Embodiment 4
Compared with Example 1, the current barrier layer 4 of this example device is parallel to each other by multilayer in the vertical direction and size is identical
P-type doping blocking layer is constituted, and other structures are same as in Example 1, as shown in Figure 6.The introducing of multilayer p-type doping blocking layer
Can effectively improve the Electric Field Distribution of cushion, improve average field intensity, improve device pressure；Additionally, due to p-type is mixed
The miscellaneous barrier layer depletion action to cushion, can improve the doping content of cushion to a certain extent, thus reduce leading of device
Energising resistance, improves forward current fan-out capability.
Embodiment 5
Compared with Example 1, the cushion 3 of this example device uses sectional doped, and other structures are same as in Example 1, such as figure
Shown in 7.Cushion uses the sectional doped Electric Field Distribution that can effectively optimize cushion, and introduces at doping interface
New electric field spike, thus it is pressure to improve device.
Embodiment 6
Compared with Example 1, the grid lower barrierlayer 6 of this example device is taked all to etch, and other structures are same as in Example 1,
As shown in Figure 8.Grid lower barrierlayer is taked all to etch and can effectively be exhausted 2DEG concentration below grid, is greatly enhanced threshold
Threshold voltage, thus realize enhancement mode, but damage can be caused in cushion interface by grid lower barrierlayer all etchings, affects device
Electric property.
Embodiment 7
Compared with Example 1, the grid lower barrierlayer 6 of this example device takes partial etching, and other structures are same as in Example 1,
As shown in Figure 9.Compared with Example 6, grid lower barrierlayer partial etching can avoid the boundary caused because of etching to a certain extent
Surface damage.
The vertical HEMT device of accumulation type described by above-mentioned several embodiments of the present invention, can use GaN, AlN, AlGaN,
The combination of one or more in InGaN, InAlN is as substrate 2, cushion 3 current barrier layer 4, channel layer 5 and potential barrier
The material of layer 6；For passivation layer 10, the material that industry is commonly used is SiNx, it is possible to use Al2O3, the dielectric material such as AlN,
Insulated gate medium 8 can use the material identical with passivation layer；Source electrode 7, drain electrode 1 typically use metal alloy, conventional
There is Ti/Al/Ni/Au or Mo/Al/Mo/Au etc.；Gate electrode 9 typically uses the metal alloy that work function is bigger, such as Ni/Au
Or Ti/Au etc..
Figure 10, Figure 11 are the accumulation type vertical HEMT device structure and conventional vertical HEMT-structure that the present invention proposes respectively
Reverse pressure time Electric Field Distribution comparison diagram and curve of output comparison diagram.Sentaurus TCAD software is used to emulate, two kinds of knots
Structure is 11 μm at device longitudinal size, and lateral dimension is 4 μm, under conditions of buffer layer thickness is 9.5 μm, and the present invention
The breakdown voltage of the structure proposed brings up to 1848V from the 585V of conventional vertical HEMT, and breakdown voltage improves 215%；This
The conducting resistance of the structure that invention proposes is reduced to 0.83m Ω cm2 from the 1.86m Ω cm2 of conventional vertical HEMT, leads
Energising resistance reduction by 124%.
Claims (9)
1. the vertical HEMT device of accumulation type, including the drain electrode (1) being cascading from bottom to up, substrate (2),
Cushion (3), channel layer (5) and barrier layer (6), described barrier layer (6) upper surface two ends are provided with source electrode (7)；
Described barrier layer (6) upper surface middle part is provided with insulated gate structures；Between described source electrode (7) and insulated gate structures
Barrier layer (6) upper surface has dielectric passivation layer (10)；It is characterized in that, described substrate (2), cushion (3), raceway groove
Layer (5) is n-type doping；There is current barrier layer (4) in described cushion (3), described barrier layer (4) are p-type doping；
The middle part of described insulated gate structures runs vertically down, and sequentially passes through barrier layer (6), channel layer (5) and barrier layer
(4) part that and extend in cushion (3), insulated gate structures is positioned at barrier layer (6) upper surface and the portion downwardly extended
Divide and form T-shape structure；Described insulated gate structures surrounds gate electrode by insulated gate medium (8) with by insulated gate medium (8)
(9) constitute；Described barrier layer (4) is positioned at the both sides of insulated gate medium (8), and and insulated gate medium (8) between have
Spacing, this spacing also forms current apertures；Described source electrode (1) and drain electrode (7) are Ohmic contact.
A kind of vertical HEMT device of accumulation type the most according to claim 1, it is characterised in that described insulated gate medium
(8) transverse width is gradually increased from top to bottom.
A kind of vertical HEMT device of accumulation type the most according to claim 1, it is characterised in that described gate electrode (9)
Being made up of first gate electrode (91) and second gate electrode (92), form splitting bar, first gate electrode (91) is positioned at second gate
Electrode (92) top, and isolated by insulated gate medium (8) between first gate electrode (91) and second gate electrode (92)；Institute
Stating second gate electrode (92) connect current potential is positive potential, negative potential or zero potential.
4. according to the vertical HEMT device of a kind of accumulation type described in claim 1-3 any one, it is characterised in that described
The p-type doping blocking layer that current barrier layer (4) is parallel to each other in vertical direction by multilayer is constituted.
A kind of vertical HEMT device of accumulation type the most according to claim 1, it is characterised in that described cushion (3)
Doping way be Uniform Doped, longitudinal divisions Doping and vertical linear doping in one.
A kind of vertical HEMT device of accumulation type the most according to claim 1, it is characterised in that described insulated gate electrode is tied
Structure is positioned at the part of barrier layer (6) upper surface, extends into vertically downward barrier layer (6) from surface.
A kind of vertical HEMT device of accumulation type the most according to claim 6, it is characterised in that described insulated gate electrode is tied
Structure is positioned at the part of barrier layer (6) upper surface, extends into vertically downward barrier layer (6) from surface, and with channel layer (5)
Upper surface connect.
8. according to the vertical HEMT device of a kind of accumulation type described in claim 1-7 any one, described insulated gate medium (8)
The material used is Al2O3、HfO2、SiO2The combination of one or more.
The vertical HEMT device of a kind of accumulation type described in any one the most according to Claim 8, it is characterised in that described lining
The end (2), cushion (3), current barrier layer (4), channel layer (5) and barrier layer (6) material are GaN, AlN, AlGaN,
The combination of one or more in InGaN, InAlN, and channel layer (5) and barrier layer (6) form hetero-junctions.
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Cited By (10)
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| CN106252404A (en) * | 2016-10-18 | 2016-12-21 | 电子科技大学 | A kind of longitudinal enhancement mode MIS HEMT device with high K dielectric groove |
| CN107393954A (en) * | 2017-08-02 | 2017-11-24 | 电子科技大学 | A kind of GaN hetero-junctions vertical field effect pipe |
| CN108598163A (en) * | 2018-05-14 | 2018-09-28 | 电子科技大学 | A kind of GaN hetero-junctions longitudinal direction power device |
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