CN105514080B - 具有再分布层和加强件的电子器件及相关方法 - Google Patents

具有再分布层和加强件的电子器件及相关方法 Download PDF

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CN105514080B
CN105514080B CN201410537567.2A CN201410537567A CN105514080B CN 105514080 B CN105514080 B CN 105514080B CN 201410537567 A CN201410537567 A CN 201410537567A CN 105514080 B CN105514080 B CN 105514080B
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layer
electronic device
conducting connecting
connecting part
multiple conducting
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CN105514080A (zh
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栾竟恩
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STMicroelectronics Pte Ltd
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STMicroelectronics Pte Ltd
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Priority to CN201410537567.2A priority Critical patent/CN105514080B/zh
Priority to CN201811326650.XA priority patent/CN109637934B/zh
Priority to US14/741,535 priority patent/US9466550B2/en
Publication of CN105514080A publication Critical patent/CN105514080A/zh
Priority to US15/251,209 priority patent/US9698105B2/en
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Abstract

本发明涉及具有再分布层和加强件的电子器件及相关方法。电子器件可以包括：集成电路(IC)；导电连接件，耦合至IC；散热层，邻近IC并且与导电连接件相对。电子器件可以包括：封装材料，围绕IC和导电连接件；再分布层，具有耦合至导电连接件的导电迹线；加强件，位于散热层和再分布层之间；以及扇出部件，位于散热层和再分布层之间，并且位于封装材料内。

Description

具有再分布层和加强件的电子器件及相关方法
技术领域
本公开涉及集成电路器件领域，并且更具体地涉及集成电路器件的封装以及相关方法。
背景技术
在具有集成电路(IC)的电子器件中，IC典型地安装在电路板上。为了电路板和IC之间的电耦合连接，IC典型地被“封装”。IC封装通常提供用于物理保护IC的小包装以及提供用于耦合至电路板的接触焊盘。在一些应用中，封装IC可以通过焊接凸点耦合至电路板。
IC封装的一种手段包括方形扁平无引脚(QFN)封装。QFN封装可以提供一些优点，诸如减小的引线电感、近芯片尺度足迹、薄侧面以及低重量。另外，QFN封装典型地包括周界I/O焊盘(perimeter I/O pad)以便于电路板迹线布线，并且露出的铜裸片焊盘(die-pad)技术提供增强的热和电性能。QFN封装可能正好适合于其中尺寸、重量、以及热和电性能重要的应用。
首先参照图1，现在描述典型的球栅阵列(BGA)电子器件200。电子器件200包括散热层201、一对加强件(stiffener)203a-203b、以及位于加强件和散热层之间的粘合层202a、202c。电子器件200包括其中具有导电迹线208的电路板层205、位于电路板层和加强件203a-203b之间的另一粘合层204a-204b、以及由电路板层承载的多个球状接触件207a-2071。电子器件200包括IC 206、将IC耦合至电路板层205的多个球状接触件209a-209j、位于散热层201和IC之间的粘合层202b、以及在IC周围并且围绕多个球状接触件的底部填充材料210。
发明内容
总体地，电子器件可以包括：IC；多个导电连接件，耦合至IC；以及散热层，邻近IC并且与多个导电连接件相对。电子器件可以包括：封装材料，围绕IC和多个导电连接件；再分布层，具有耦合至多个导电连接件的多个导电迹线；加强件，位于散热层和再分布层之间；以及扇出部件，位于散热层和再分布层之间并且位于封装材料内。
更具体地，电子器件可以进一步包括位于散热层和IC之间的热界面层。电子器件可以进一步包括耦合至再分布层的多个导电焊球。加强件可以具有邻近封装材料的内表面和限定电子器件的外部表面的外表面。加强件可以邻接并且保持封装材料。
再分布层可以包括介电层。多个导电迹线由介电层承载，并且耦合至多个导电连接件。扇出部件可以包括例如陶瓷材料。多个导电连接件可以包括焊接凸点和导柱(pillar)中的至少一个。
另一方面涉及一种制造电子器件的方法。该方法可以包括：形成多个导电连接件，该多个导电连接件耦合至IC；将散热层定位成邻近IC并且与多个导电连接件相对；以及形成封装材料，该封装材料围绕IC和多个导电连接件。该方法可以包括：定位再分布层，该再分布层具有耦合至多个导电连接件的多个导电迹线；将加强件定位成位于散热层和再分布层之间；以及将扇出部件定位成位于散热层和再分布层之间并且位于封装材料内。
附图说明
图1是根据现有技术的电子器件的截面图。
图2是根据本公开的电子器件的截面图。
图3-图9是用于制造图2中电子器件的方法的各步骤的截面图。
具体实施方式
现有技术的电子器件200可能存在一些潜在缺陷。由于热膨胀系数(CTE)失配，电子器件200可能会有关于球状接触件207a-2071、209a-209j的可靠性问题。由于外部物理力和热，电子器件200还可能受困于翘曲。此外，电子器件200的设计产生高成本制造工艺和降低的产量。电子器件200还受困于具有大封装尺寸，同时还伴随着侧面厚、布线差、散热不良、噪声控制不好、以及射频(RF)屏蔽不佳的问题。
现在将参照附图更为全面地描述本公开，其中示出了本发明的若干实施例。然而，本公开可以很多不同的形式实施，并且不应被解释为限于本文所描述的实施例。当然，提供这些实施例是为了使本公开充分和完整，并且可以向本领域技术人员全面传达本公开的保护范围。本文中相同的标号表示相同的元件。
参照图2，描述了根据本公开的电子器件10。电子器件10示意性地包括IC 36，该IC具有多个导电接触件20a-20e、连接至IC的导电接触件的多个导电连接件21a-21e、以及邻近IC并与多个导电连接件相对的散热层11。多个导电连接件21a-21e可以包括多个焊接凸点或者多个导柱(例如，铜、铝)。
电子器件10示意性地包括：封装材料14，围绕IC 36和多个导电连接件21a-21e；再分布层16，具有耦合至多个导电连接件的多个导电迹线18a-18k；加强件13，位于散热层11和再分布层之间；以及扇出部件15，位于散热层和再分布层之间，并且位于封装材料内。扇出部件15可以包括例如陶瓷和/或有机材料。扇出部件15横向地定位在加强件13和IC 36之间。有利地，解决了电路板层205和球状接触件207a-2071、209a-209j的CTE失配的现有技术的问题。
更具体地，电子器件10示意性地包括位于散热层11和IC 36之间的热界面层12。电子器件10示意性地包括由再分布层16承载的多个导电焊球19a-19k，以提供BGA型连接。
加强件13具有邻近封装材料14的内表面23和限定电子器件10的外部表面的外表面22。加强件13可以利用内表面23邻接和/或保持封装材料14。
再分布层16示意性地包括介电层17。多个导电迹线18a-18k由介电层17承载，并且耦合至多个导电连接件21a-21e。有利地，电子器件10没有如图1的现有技术手段一样在IC36下方使用衬底。在电子器件10中，衬底被替换为再分布层16。
附加地，并且有利地，还可以使用晶片级封装技术来制造电子器件10，并且电子器件10可以包括诸如电容器的集成电子部件。此外，电子器件10缺少用于扇出的硅***件，该硅***件而是被移至一侧。与现有技术的设计相比，电子器件10还提升了可靠性，并且解决了倒装凸块可靠性和BGA接合可靠性的冲突。另外，电子器件10具有改进的散热效率、减少的翘曲以及低材料CTE失配。
另一方面涉及一种制造电子器件10的方法。该方法可以包括：形成多个导电连接件21a-21e，该多个导电连接件耦合至IC 36；将散热层11定位成邻近IC并且与多个导电连接件相对；以及形成封装材料14，该封装材料围绕IC和多个导电连接件。该方法可以包括：定位再分布层16，该再分布层16具有耦合至多个导电连接件21a-21e的多个导电迹线18a-18k；将加强件13定位成位于散热层11和再分布层之间；以及将扇出部件15定位成位于散热层和再分布层之间并且位于封装材料14内。
现另外参照图3-图9，描述用于制造电子器件10的方法的示例性实施例。应理解，示出的示例产生了两个电子器件10a、10b，仅用于图示目的，并且公开的方法可以使用晶片级技术同时制造更多的器件。
如图3所示，制备用于制造步骤的基底，该基底包括载体层31以及在载体层31上的粘合层32。如图4所示，例如使用贴装(PnP，pick and place)机将IC 36a-36b、扇出部件15a-15b、和加强件13a-13b放置在粘合层32上。如图5所示，在载体层31上方形成封装材料14。如图6所示，使载体层31的上表面经受研磨步骤以移除多余的封装材料14。如图7所示，在载体层31上反转封装部件，并且形成再分布层16。如图8所示，邻近再分布层16形成多个导电焊球19a-19k。如图9所示，使用图示的切割刀(saw blade)33(切割刀在通过粘合层32时半路停止)分离模制的面板或晶片或封装部件。下一步可以包括分解粘合层32以释放电子器件10a、10b，并附接相应的散热层11a、11b。
本领域技术人员在得到上文描述和相关附图中呈现的教导之后能够想到本公开的很多修改和其他实施例。因此，应理解，本公开不旨在限于披露的特定实施例，而是旨在将各种修改和实施例包含在所附权利要求的范围内。

Claims (22)

1.一种电子器件，包括：
集成电路(IC)；
多个导电连接件，耦合至所述IC；
散热层，邻近所述IC，并且与所述多个导电连接件相对；
封装材料，围绕所述IC和所述多个导电连接件；
再分布层，具有耦合至所述多个导电连接件的多个导电迹线；
加强件，位于所述散热层和所述再分布层之间；以及
扇出部件，位于所述散热层和所述再分布层之间，并且位于所述封装材料内。
2.根据权利要求1所述的电子器件，进一步包括位于所述散热层和所述IC之间的热界面层。
3.根据权利要求1所述的电子器件，进一步包括耦合至所述再分布层的多个导电焊球。
4.根据权利要求1所述的电子器件，其中，所述加强件具有邻近所述封装材料的内表面和限定所述电子器件的外部表面的外表面。
5.根据权利要求1所述的电子器件，其中，所述加强件邻接所述封装材料。
6.根据权利要求1所述的电子器件，其中，所述再分布层包括介电层；以及其中，所述多个导电迹线由所述介电层承载并且耦合至所述多个导电连接件。
7.根据权利要求1所述的电子器件，其中，所述扇出部件包括陶瓷材料。
8.根据权利要求1所述的电子器件，其中，所述多个导电连接件包括焊接凸点和导柱中的至少一个。
9.一种电子器件，包括：
集成电路(IC)；
多个导电连接件，耦合至所述IC；
散热层，邻近所述IC，并且与所述多个导电连接件相对；
热界面层，位于所述散热层和所述IC之间；
封装材料，围绕所述IC和所述多个导电连接件；
再分布层，具有耦合至所述多个导电连接件的多个导电迹线；
加强件，位于所述散热层和所述再分布层之间，并且具有邻近所述封装材料的内表面和限定所述电子器件的外部表面的外表面；以及
扇出部件，位于所述散热层和所述再分布层之间，并且位于所述封装材料内。
10.根据权利要求9所述的电子器件，进一步包括耦合至所述再分布层的多个导电焊球。
11.根据权利要求9所述的电子器件，其中，所述加强件邻接所述封装材料。
12.根据权利要求9所述的电子器件，其中，所述再分布层包括介电层；以及其中，所述多个导电迹线由所述介电层承载并且耦合至所述多个导电连接件。
13.根据权利要求9所述的电子器件，其中，所述扇出部件包括陶瓷材料。
14.根据权利要求9所述的电子器件，其中，所述多个导电连接件包括焊接凸点和导柱中的至少一个。
15.一种制造电子器件的方法，包括：
形成多个导电连接件，所述多个导电连接件耦合至集成电路(IC)；
将散热层定位成邻近所述IC并且与所述多个导电连接件相对；
形成封装材料，所述封装材料围绕所述IC和所述多个导电连接件；
定位再分布层，所述再分布层具有耦合至所述多个导电连接件的多个导电迹线；
将加强件定位成位于所述散热层和所述再分布层之间；以及
将扇出部件定位成位于所述散热层和所述再分布层之间并且位于所述封装材料内。
16.根据权利要求15所述的方法，进一步包括形成位于所述散热层和所述IC之间的热界面层。
17.根据权利要求15所述的方法，进一步包括形成耦合至所述再分布层的多个导电焊球。
18.根据权利要求15所述的方法，其中，所述加强件具有邻近所述封装材料的内表面和限定所述电子器件的外部表面的外表面。
19.根据权利要求15所述的方法，其中，所述加强件邻接所述封装材料。
20.根据权利要求15所述的方法，其中，所述再分布层包括介电层；以及其中，所述多个导电迹线由所述介电层承载并且耦合至所述多个导电连接件。
21.根据权利要求15所述的方法，其中，所述扇出部件包括陶瓷材料。
22.根据权利要求15所述的方法，其中，所述多个导电连接件包括焊接凸点和导柱中的至少一个。
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