CN105230139A - 元器件内置基板及其制造方法 - Google Patents

元器件内置基板及其制造方法 Download PDF

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Publication number
CN105230139A
CN105230139A CN201380076694.0A CN201380076694A CN105230139A CN 105230139 A CN105230139 A CN 105230139A CN 201380076694 A CN201380076694 A CN 201380076694A CN 105230139 A CN105230139 A CN 105230139A
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China
Prior art keywords
components
parts
metal level
built
adhesive layer
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CN201380076694.0A
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Inventor
户田光昭
松本徹
清水良一
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Meiko Electronics Co Ltd
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Meiko Electronics Co Ltd
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Publication of CN105230139A publication Critical patent/CN105230139A/zh
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    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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Abstract

元器件内置基板(1)具有:绝缘层(3);形成为夹住所述绝缘层(3)的第1金属层(4)及第2金属层(5);元器件(2),其埋设于所述绝缘层(3)内,并且未形成连接端子(2a)的连接端子非形成面(2c)位于靠近所述第1金属层(4)的一侧;粘合层(6),其位于所述元器件(2)的所述连接端子非形成面(2c)上;导通孔(7),其将所述第2金属层(5)和所述元器件(2)的所述连接端子(2a)电气连接,所述粘合层(6)的与所述元器件(2)的接触面侧的面积小于所述元器件(2)的连接端子非形成面(2c)的面积。

Description

元器件内置基板及其制造方法
技术领域
本发明涉及一种内置电气或电子元器件的元器件内置基板及其制造方法。
背景技术
一直以来,为实现各种电气、电子设备的小型化、薄型化、轻量化以及多功能化,开展了各种研究开发。尤其在手机、笔记本电脑、数码相机等民生用品中,强烈要求在实现多功能化的同时,实现小型化、薄型化及轻量化。此外,在各种电气、电子设备中,传输信号的高频化和高速化已实现,因此也需要防止与之相随的信号噪音的增大。
为了实现此要求,作为组装于电气、电子设备的电路基板,一直以来都在针对元器件内置基板以及元器件内置多层电路基板进行研究开发及制造,元器件内置基板具备将以往安装于基板表面的各种电气或电子元器件内置于基板绝缘层即绝缘基材内的构造,而元器件内置多层电路基板将该元器件内置基板层叠而成。例如,专利文献1中公开了一种元器件内置基板及其制造方法。
在专利文献1所公开的元器件内置基板的制造方法中,是在支承体上形成由铜箔构成的导电薄膜层,并在该导电薄膜层上涂布粘合剂。接着,通过该粘合剂,安装内置的电气或电子元器件(内置元器件),之后形成绝缘层(绝缘基材)以将该内置元器件覆盖。经过此制造工序形成的元器件内置基板中,基板自身的厚度比以往要薄,并且与安装在基板表面上相比,能够内置更多的电气或电子元器件,可用于各种各样用途的电气、电子设备。
此外,使用金属氧化膜半导体的场效应晶体管(MOSFET:Metal-Oxide-SemiconductorField-EffectTransistor)、或者集成电路(IC:IntegratedCircuit)等IC元器件作为内置元器件时,必须形成从埋设有该内置元器件的绝缘层外部直达该内置元器件的导通孔。该导通孔贯穿形成于绝缘层两面的金属层、以及由用于将内置元器件粘贴在该金属层上的绝缘材料构成的粘合剂,并且在绝缘层内延伸,使得从绝缘层外部电气连接该内置元器件的连接端子。
先行技术文献
专利文献
专利文献1:专利第4874305号公报
发明的公开
发明所要解决的技术问题
近年来,存在有各种各样的电气、电子设备,因此为对应这些电气、电子设备的种类,开发了各种各样的元器件内置基板。例如,开发了将多个IC元器件埋设于绝缘层内的元器件内置基板、以及将1个IC元器件埋设于绝缘层内的元器件内置基板。在此,仅埋设1个IC元器件时,为了实现元器件内置基板的小型化,需要减小绝缘层,将元器件内置基板的大部分设定为IC元器件。而且,为了将该IC元器件可靠地粘贴于金属层,要使粘合层的形成面积与IC元器件安装面的面积相等或者更大。
但是,若粘合层的形成面积变大,则在形成金属层后的真空加热工序中,施加于粘合层的压力变大,但构成绝缘层的绝缘材料由于硬化收缩,在与该压力不同的方向上会产生应力,造成金属层从支承体上剥离。如此,由于金属层剥离,导致金属层上产生皱褶,使得元器件内置基板自身缺乏可靠性。
因此,虽然通过减小粘合层的形成面积,可抑制产生上述皱褶,但是在形成有导通孔的区域中存在有特性不同的粘合层及绝缘层,由于形成导通孔时的蚀刻率不同,各层的构成材料会有所残留,可能导致导通孔连接不良的问题。
本发明鉴于此课题而完成,其目的在于提供一种使位于绝缘层上的金属层不剥离、且不发生导通孔连接不良的元器件内置基板及其制造方法。
解决技术问题所采用的技术方案
为了达成上述目的,本发明的元器件内置基板的特征在于,具有:由绝缘材料构成的绝缘层;形成为夹住所述绝缘层的第1金属层及第2金属层;电气或电子元器件,该电气或电子元器件埋设于所述绝缘层内,并且未形成连接端子的连接端子非形成面位于靠近所述第1金属层的一侧;粘合层,该粘合层埋设于所述绝缘层内,并且位于所述元器件的所述连接端子非形成面上;及导通孔,该导通孔在所述绝缘层内延伸,并且将所述第2金属层和所述元器件的所述连接端子电气连接,所述粘合层的与所述元器件的接触面侧的面积小于所述元器件的连接端子非形成面的面积。
在上述元器件内置基板中,所述粘合层的与所述元器件的接触面侧的面积优选在所述元器件的连接端子非形成面的面积的13%~40%范围内。
在上述任意元器件内置基板中,所述粘合层的与所述元器件的接触面侧的面积优选在所述第1金属层的形成面侧中所述元器件内置基板的面积的7%~25%范围内。
在上述任意元器件内置基板中,所述粘合面的平面形状优选为圆形。
此外,为了达成上述目的,本发明的元器件内置基板的制造方法的特征在于,具有:准备工序,准备在表面上形成有第1金属层的支承板;搭载工序,在所述第1金属层的表面上经由粘合层搭载电气或电子元器件,使得未形成连接端子的连接端子非形成面位于靠近所述第1金属层的一侧;绝缘层形成工序,以覆盖所述第1金属层及所述元器件的方式层叠绝缘材料,并形成埋设所述元器件的绝缘层;金属层形成工序,在所述绝缘层上形成第2金属层;及导通孔形成工序,形成在所述绝缘层内延伸的导通孔,以使所述第2金属层和所述元器件的所述连接端子电气连接,在所述搭载工序中,所述粘合层的与所述元器件的接触面侧的面积小于所述元器件的连接端子非形成面的面积。
在上述元器件内置基板制造方法的所述搭载工序中,所述粘合层与所述元器件接触面侧的面积优选设定为所述元器件的连接端子非形成面的面积的13%~40%。
在上述任一元器件内置基板制造方法的所述搭载工序中,所述粘合层与所述元器件接触面侧的面积优选设定为所述第1金属层的形成面侧中元器件内置基板的面积的7%~25%。
在上述任一元器件内置基板制造方法的所述搭载工序中,优选以所述粘合层的平面形状为圆形的方式形成所述粘合层。
发明效果
在本发明的元器件内置基板及其制造方法中,元器件的连接端子非形成面以靠近第1金属层的方式配置,粘合层的形成面积设定为小于元器件的连接端子非形成面的面积,因此能够防止第1金属层从绝缘层剥离以及导通孔连接不良。
在本发明的元器件内置基板及其制造方法中,粘合层的平面形状设定为圆形,因此在形成粘合层时,不会在粘合层内产生气泡及空隙等,能够强力粘贴元器件。
附图说明
图1是表示本发明实施例的元器件内置基板的概要剖面图。
图2是表示本发明实施例的元器件内置基板的制造方法的各制造工序的概要剖面图。
图3是表示本发明实施例的元器件内置基板的制造方法的各制造工序的概要剖面图。
图4是表示本发明实施例的元器件内置基板的制造方法的各制造工序的概要剖面图。
图5是表示本发明实施例的元器件内置基板的制造方法的各制造工序的概要剖面图。
图6是表示本发明实施例的元器件内置基板的制造方法的各制造工序的概要剖面图。
图7是表示本发明实施例的元器件内置基板的制造方法的各制造工序的概要剖面图。
具体实施方式
以下,参照附图,基于实施例,详细说明本发明的实施方式。另外,本发明并不限定于以下说明的内容,在不变更其要旨的范围内可任意变更实施。此外,用于说明实施例的附图,均为模式性表示本发明的元器件内置基板及其构成部件的图,为加强理解,进行了局部强调、放大、缩小或省略等,元器件内置基板及其构成部件的比例尺和形状等可能未正确表示。并且,实施例中所用的各种数据均为示例,可根据需要进行各种变更。
<实施例>
首先,参照图1,针对本发明的本实施例的元器件内置基板的结构进行详细说明。此处,图1是表示实施例的元器件内置基板的剖面图。
如图1所示,本实施例的元器件内置基板1具有:作为一般电气或电子元器件的IC元器件2;形成为埋设IC元器件2的绝缘层3;夹住绝缘层3形成的第1金属层4及第2金属层5;用于将IC元器件2粘贴于第1金属层4上的粘合层6;以及在绝缘层3内延伸,将第2金属层5和IC元器件2电气连接的导通孔7。此外,本实施例的元器件内置基板1的尺寸是大约4mm的方形,厚度约为0.4mm。
IC元器件2在第1面2b(连接端子形成面)侧具有连接端子2a,该连接端子2a用于将IC元器件2的内部和外部电气连接,并将从外部供应的电力、电流、电压或电气信号引向IC元器件2的内部。此外,在IC元器件2中,位于第1面2b相反侧的第2面2c未形成连接端子2a。即,第2面2c为连接端子非形成面。并且,如图1所示,IC元器件2埋设于绝缘层3内,使得未形成连接端子的第2面2c位于靠近第1金属层4的一侧。即,在本实施例中,IC元器件2在所谓面朝上的状态下进行埋设。本实施例中的IC元器件2的尺寸是大约3.4mm的方形,厚度约为0.2mm。
另外,虽然在本实施例中,内置于元器件内置基板1中的元器件采用的是IC元器件2,但是内置于元器件内置基板1中的元器件不限定于此。例如,也可将电阻、电容器等其他电气或电子元器件埋设于绝缘层3内。
在本实施例中,绝缘层3使用预浸料等绝缘树脂材料。此处,绝缘层3的材料优选使用热膨胀系数接近IC元器件2的材料。这是因为,在使该绝缘材料硬化时,可以缓和对IC元器件2施加的应力。另外,绝缘层3的材料不限定于绝缘树脂材料,只要能够埋设IC元器件2,并且在电气特性及可靠性等方面不存在问题,即可使用其他一般绝缘材料。
第1金属层4形成在绝缘层3的表面、并且是靠近IC元器件2的第2面2c的面上。在本实施例中,第1金属层4由铜构成。此外,在第1金属层4上实施图案化,形成有所需的布线图案。另外,第1金属层4的材料不限定于铜,只要在电气特性及可靠性等方面不存在问题,即可使用其他一般金属材料。
第2金属层5形成在绝缘层3的表面、并且是与靠近IC元器件2的第2面2c的面相反一侧的面上。在本实施例中,第2金属层5与第1金属层4相同,由铜构成。此外,在第2金属层5上也实施图案化,形成有所需的布线图案。另外,第1金属层4的材料不限定于铜,只要在电气特性及可靠性等方面不存在问题,即可使用其他一般金属材料。
在本实施例中,粘合层6使用由一般绝缘材料构成的粘合剂。如图1所示,粘合层6形成于IC元器件2的第2面2c上,并且与第1金属层4接触。
此外,粘合层6形成为收纳于IC元器件2的第2面2c内。即,粘合层6的与IC元器件2的接触面侧的面积(粘合剂的涂布面积)小于IC元器件2的第2面2c的面积。更具体而言,粘合层6的与IC元器件2的接触面侧的面积优选在IC元器件2的第2面2c面积的13%~40%范围内。在本实施例中,粘合剂的涂布尺寸约为φ1.5mm,粘合层6的与IC元器件2的接触面侧的面积(约1.77mm2)为IC元器件2的第2面2c(约11.56mm2)面积的大约15%。另外,在本实施例中,粘合剂的涂布尺寸设定为约φ1.5mm,形成了平面形状为圆形的粘合层6,但是粘合层的平面形状不限定于圆形,也可以是多边形或者椭圆。
并且,与元器件内置基板1自身相比,粘合层6的与IC元器件2的接触面侧的面积优选在第1金属层4的形成面侧中元器件内置基板1的面积的7%~25%范围内。在本实施例中,粘合层6的与IC元器件2的接触面侧的面积为第1金属层4的形成面侧中的元器件内置基板1的面积(约16mm2)的大约10%。
通过以上述方式形成粘合层6,IC元器件2的第2面2c的大部分被绝缘层3覆盖。并且,绝缘层3也位于粘合层6的周围。即,粘合层6也处于埋设于绝缘层3的状态。
导通孔7设定为在绝缘层3内延伸,用于将IC元器件2的各个连接端子2和第2金属层5电气连接。导通孔7的材料使用铜等导电体。另外,导通孔7的材料不限定于铜,只要在电气特性及可靠性等方面不存在问题,即可使用其他一般金属材料。
下面,针对本发明实施例的元器件内置基板的制造方法,参照图2至图7进行详细说明。图2至图7是本发明实施例的元器件内置基板的制造方法中各制造工序的概要剖面图。
首先,如图2所示,进行准备支承板11的准备工序。具体而言,在具有刚性的支承板11上形成第1金属层4,准备表面覆盖有第1金属层4的支承板11。支承板11根据工艺条件,具有必要程度的刚性。例如,支承板11采用具有刚性的SUS(不锈钢)板或铝板等形成。如上所述,在本实施例中,第1金属层4由铜构成,但是作为第1金属层4的具体形成方法,可以采用以下方法:例如若支承板11由SUS板构成,则析出铜镀层,形成第1金属层4,或者若支承板11是铝板,则粘贴铜箔形成第1金属层4。
然后如图3所示,通过例如点胶机或印刷等方式,在第1金属层4上形成由绝缘材料构成的粘合层6。在图3中,粘合层6形成于第1金属层4的2处部位,但是在本实施例的元器件内置基板的制造方法中,为了同时形成多个埋设有1个IC元器件2的元器件内置基板1,实际上以矩阵状形成多个粘合层6。因此,要根据元器件内置基板1的制造数量,决定IC元器件2的数量,并对应该IC元器件数量形成粘合层6。
此处,在本实施例中,构成粘合层6的粘合剂涂布尺寸设定为约φ1.5mm,粘合层6的与IC元器件2的接触面侧的面积设定为IC元器件2的第2面2c面积的约15%,且为第1金属层4的形成面侧中的元器件内置基板1面积的约10%。
然后如图4所示,进行经由粘合层6将IC元器件2搭载于第1金属层4上的搭载工序。具体而言,使用具备吸嘴的表面安装机(贴片机),将内置元器件即IC元器件2搭载于粘合层6上。此处,以未形成连接端子2a的第2面2c与粘合层6粘合,且形成有连接端子2a的第1面2b与粘合层6分离的方式,搭载IC元器件2。即,IC元器件2在所谓面朝上的状态下搭载。
然后如图5所示,进行形成绝缘层3的绝缘层形成工序。在该绝缘层形成工序中,以覆盖IC元器件2、第1金属层4及粘合层6的方式,(即,对IC元器件2、第1金属层4及粘合层6)层叠要形成绝缘层3的绝缘树脂材料,将IC元器件2及粘合层6埋设于绝缘层3内。具体而言,对IC元器件2及粘合层6层叠预浸料等绝缘树脂材料,然后将其在真空下加热冲压。该冲压例如采用真空加压式的冲压机进行。此外,在形成绝缘层3时,在第1金属层4所在面的相反侧的表面上,形成另外的第2金属层5。通过此种金属层形成工序,由第1金属层4和第2金属层5夹住绝缘层3。
此处,在本实施例中,构成粘合层6的粘合剂涂布尺寸设定为约φ1.5mm,粘合层6的与IC元器件2的接触面侧的面积设定为IC元器件2的第2面2c面积的约15%,且为第1金属层4的形成面侧中的元器件内置基板1面积的约10%,因此绝缘层3覆盖了IC元器件2的第2面2c的大部分。由此,层叠的预浸料等绝缘树脂材料在真空加热时,朝向第1金属层4对粘合层6施加的压力会相对变小。此外,通过该真空加热处理,位于粘合层6周围的绝缘树脂材料上伴随硬化收缩会产生应力,该应力朝向第2金属层5的形成面侧施加,因此该压力与该应力相互抵消。由此,抑制第1金属层4从支承板11剥离。
另外,粘合层6的与IC元器件2的接触面侧的面积与IC元器件2的第2面2c的面积、或者第1金属层4的形成面侧上元器件内置基板1的面积的比率不限定于上述数值。特别是,通过使粘合层6的与IC元器件2的接触面侧的面积设定为在IC元器件2的第2面2c面积的13%~40%的范围内,且在第1金属层4的形成面侧中元器件内置基板1面积的7%~25%的范围内,能够充分达到上述效果。
而且,在本实施例中,构成粘合层6的粘合剂涂布尺寸设定为约φ1.5mm,粘合层6的平面形状设定为圆形。由此,粘合剂能够恰当熔融,不会在粘合层6内形成气泡(气孔)和空隙等。因此,能够将IC元器件2强力粘贴在第1金属层4上。
接着,如图6所示,除去支承板11,并且形成通孔12。通孔12的形成方法是,首先除去支承板11,然后向通孔形成位置照射例如CO2激光,形成除去CO2激光照射部分的材料的各个通孔。另外,不仅限于CO2激光,也可使用例如UV-YAG或准分子等高频激光。由此,通孔12贯穿第2金属层5,并且在绝缘层3内延伸,到达连接端子2a。
形成通孔12后,实施去胶渣处理,将形成通孔时残留的树脂除去。此外,在连接端子2a上再实施软蚀刻处理,将由于形成通孔而露出的连接端子2a的露出面的氧化物和有机物除去。这样,可使新鲜的金属表面露出,与之后电镀处理中析出金属的密合性提高,并最终提高电气连接的可靠性。
在此,形成有通孔12的连接端子2a周围仅存在由绝缘树脂材料构成的绝缘层3,不存在特性相异的绝缘树脂材料。特性相异的绝缘树脂材料在形成通孔时由于蚀刻率不同会导致绝缘树脂材料残留,而本实施例中形成通孔12时进行的蚀刻处理则不会产生这种情况。由此,最终完成的元器件内置基板1不会发生导通孔7连接不良的情况,并且具备优异的电气特性及可靠性。
然后如图7所示,在通孔12内填充导电体,形成导通孔7,并且在第1金属层4及第2金属层5上形成图案。具体而言,对通孔12实施去胶渣处理和半蚀刻处理,并进行化学镀铜或电镀铜等电镀处理,然后在通孔12上析出镀层,填充导电体,形成导通孔7。然后,对配置于绝缘层3的两面的第1金属层4及第2金属层5实施蚀刻处理。
再沿图7中的虚线VII-VII切断绝缘层3,形成切割好的多个元器件内置基板20。绝缘层3的切断使用一般切片装置的切割工序进行。
如上所示,关于本实施例所述的元器件内置基板1及其制造方法,其特征在于,将IC元器件2的连接端子非形成面即第2面2c与第1金属层4靠近配置,使作为粘合层6的粘合剂的涂布面积小于IC元器件2的第2面2c的面积。通过此种结构,本实施例所述的元器件内置基板1中,位于绝缘层3表面上的第1金属层4不会剥离,且不会发生导通孔7连接不良的情况。
符号说明
1元器件内置基板
2IC元器件
2a连接端子
2b第1面
2c第2面
3绝缘层
4第1金属层
5第2金属层
6粘合层
7导通孔
11支承板
12通孔

Claims (8)

1.一种元器件内置基板,其特征在于,具有:
由绝缘材料构成的绝缘层;
形成为夹住所述绝缘层的第1金属层及第2金属层;
电气或电子元器件,该电气或电子元器件埋设于所述绝缘层内,并且未形成连接端子的连接端子非形成面位于靠近所述第1金属层的一侧;
粘合层,该粘合层埋设于所述绝缘层内,并且位于所述元器件的所述连接端子非形成面上;及
导通孔,该导通孔在所述绝缘层内延伸,并且将所述第2金属层和所述元器件的所述连接端子电气连接,
所述粘合层的与所述元器件的接触面侧的面积小于所述元器件的连接端子非形成面的面积。
2.如权利要求1所述的元器件内置基板,其特征在于,所述粘合层的与所述元器件的接触面侧的面积为所述元器件的连接端子非形成面的面积的13%~40%。
3.如权利要求1或2所述的元器件内置基板,其特征在于,所述粘合层的与所述元器件的接触面侧的面积为所述第1金属层的形成面侧中所述元器件内置基板的面积的7%~25%。
4.如权利要求1至3中任一项所述的元器件内置基板,其特征在于,所述粘合层的平面形状为圆形。
5.一种元器件内置基板的制造方法,其特征在于,具有:
准备工序,准备在表面上形成有第1金属层的支承板;
搭载工序,在所述第1金属层的表面上经由粘合层搭载电气或电子元器件,使得未形成连接端子的连接端子非形成面位于靠近所述第1金属层的一侧;
绝缘层形成工序,以覆盖所述第1金属层及所述元器件的方式层叠绝缘材料,并形成埋设所述元器件的绝缘层;
金属层形成工序,在所述绝缘层上形成第2金属层;及
导通孔形成工序,形成在所述绝缘层内延伸的导通孔,以使所述第2金属层和所述元器件的所述连接端子电气连接,
在所述搭载工序中,所述粘合层的与所述元器件的接触面侧的面积小于所述元器件的连接端子非形成面的面积。
6.如权利要求5所述的元器件内置基板的制造方法,其特征在于,在所述搭载工序中,所述粘合层的与所述元器件的接触面侧的面积设定为所述元器件的连接端子非形成面面积的13%~40%。
7.如权利要求5或6所述的元器件内置基板的制造方法,其特征在于,在所述搭载工序中,所述粘合层的与所述元器件的接触面侧的面积设定为所述第1金属层的形成面侧的元器件内置基板面积的7%~25%。
8.如权利要求5至7中任一项所述的元器件内置基板的制造方法,其特征在于,在所述搭载工序中,以所述粘合层的平面形状为圆形的方式形成所述粘合层。
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